JPS56122548A - Multiple receiving and transmitting equipment - Google Patents
Multiple receiving and transmitting equipmentInfo
- Publication number
- JPS56122548A JPS56122548A JP2686680A JP2686680A JPS56122548A JP S56122548 A JPS56122548 A JP S56122548A JP 2686680 A JP2686680 A JP 2686680A JP 2686680 A JP2686680 A JP 2686680A JP S56122548 A JPS56122548 A JP S56122548A
- Authority
- JP
- Japan
- Prior art keywords
- high speed
- control code
- adaptor
- receiving
- control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/12—Arrangements providing for calling or supervisory signals
Abstract
PURPOSE:To prevent a receiving error of a control code and also make it unnecessary to discriminate a character of a general data, by transmitting and receiving a general data and a control code by use of separate channels of the high speed circuit. CONSTITUTION:The high speed transmission and receiving control part 10 selectively operates the low speed adaptor 17 and the control code generation part 16 by use of the selective signal line 11. A data and a control code from the low speed circuit 15 are loaded on the high speed channel bus line 12 by the adaptor 17 and the control code generation part 16 under control of the control part 10, and are sent out to the high speed circuit 14 through the high speed adaptor 13. A multiple frame which is received by the high speed adaptor from the high speed circuit 14, at the time of receiving, is divided into 8 bits each, and the data of channels 1-n are transmitted and distributed to the low speed circuit 15 corresponding through the low speed adaptor 17. Also, the control code of 8 bits of channel (n) is decoded by the control code generation part, and the state of each channel is controlled.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2686680A JPS56122548A (en) | 1980-03-04 | 1980-03-04 | Multiple receiving and transmitting equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2686680A JPS56122548A (en) | 1980-03-04 | 1980-03-04 | Multiple receiving and transmitting equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56122548A true JPS56122548A (en) | 1981-09-26 |
Family
ID=12205204
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2686680A Pending JPS56122548A (en) | 1980-03-04 | 1980-03-04 | Multiple receiving and transmitting equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56122548A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08237213A (en) * | 1995-02-28 | 1996-09-13 | Nec Corp | Control signal multiplex communication system |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51150203A (en) * | 1975-06-18 | 1976-12-23 | Hitachi Ltd | Information transmission system |
-
1980
- 1980-03-04 JP JP2686680A patent/JPS56122548A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS51150203A (en) * | 1975-06-18 | 1976-12-23 | Hitachi Ltd | Information transmission system |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08237213A (en) * | 1995-02-28 | 1996-09-13 | Nec Corp | Control signal multiplex communication system |
JP2870441B2 (en) * | 1995-02-28 | 1999-03-17 | 日本電気株式会社 | Control signal multiplex communication system |
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