ES8202463A1 - Un sistema de transmision por barra de distribucion - Google Patents

Un sistema de transmision por barra de distribucion

Info

Publication number
ES8202463A1
ES8202463A1 ES497243A ES497243A ES8202463A1 ES 8202463 A1 ES8202463 A1 ES 8202463A1 ES 497243 A ES497243 A ES 497243A ES 497243 A ES497243 A ES 497243A ES 8202463 A1 ES8202463 A1 ES 8202463A1
Authority
ES
Spain
Prior art keywords
impedance
data
state
level state
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES497243A
Other languages
English (en)
Other versions
ES497243A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of ES497243A0 publication Critical patent/ES497243A0/es
Publication of ES8202463A1 publication Critical patent/ES8202463A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40—Bus networks
    • H04L12/40006—Architecture of a communication node
    • H04L12/40032—Details regarding a bus interface enhancer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
  • Small-Scale Networks (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

SISTEMA DE TRANSMISION POR BARRA DE DISTRIBUCION. CONECTADOS A LA LINEA DE TRANSMISION (TL), HAY DOS O MAS CIRCUITOS DE EXCITACION, ESTANDO LOS EXTREMOS DE LA LINEA PUESTOS A MASA A TRAVES DE UNAS RESISTENCIAS TERMINALES (R4A Y R4C). CADA CIRCUITO DE EXCITACION PUEDE TRABAJAR EN TRES ESTADOS: ESTADO DE NIVEL ALTO, EN QUE EL PRIMER TRANSISTOR (TR4) NO ES CONDUCTIVO Y EL SEGUNDO (TR3) SI; Y ESTADO DE ALTA IMPEDANCIA, EN QUE LOS DOS TRANSISTORES (TR4 Y TR3) SON NO CONDUCTIVOS. DURANTE LAS ETAPAS INICIALES Y FINAL DE LA TRANSMISION EL CIRCUITO TRANSMISOR TRABAJA EN NIVEL BAJO O ALTO, PARA LO CUAL LOS DATOS SE SOMETEN A MODULACION DE AMPLIFICACION O DE ANCHURA DE IMPULSO.
ES497243A 1979-11-29 1980-11-28 Un sistema de transmision por barra de distribucion Expired ES8202463A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15457579A JPS5676654A (en) 1979-11-29 1979-11-29 Bus transmission system

Publications (2)

Publication Number Publication Date
ES497243A0 ES497243A0 (es) 1982-01-16
ES8202463A1 true ES8202463A1 (es) 1982-01-16

Family

ID=15587215

Family Applications (1)

Application Number Title Priority Date Filing Date
ES497243A Expired ES8202463A1 (es) 1979-11-29 1980-11-28 Un sistema de transmision por barra de distribucion

Country Status (7)

Country Link
US (1) US4388725A (es)
EP (1) EP0030095B1 (es)
JP (1) JPS5676654A (es)
BR (1) BR8007819A (es)
CA (1) CA1150793A (es)
DE (1) DE3065913D1 (es)
ES (1) ES8202463A1 (es)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4500988A (en) * 1982-03-08 1985-02-19 Sperry Corporation VLSI Wired-OR driver/receiver circuit
JPS58205395A (ja) * 1982-05-25 1983-11-30 Sony Corp リモ−トコントロ−ル装置
US4475191A (en) * 1982-12-10 1984-10-02 At&T Bell Laboratories Distributed time division multiplexing bus
US4516248A (en) * 1983-01-21 1985-05-07 E-Systems, Inc. Variable threshold receiver
GB8316463D0 (en) * 1983-06-16 1983-07-20 Secr Defence Priority resolution in bus oriented computer systems
US4803699A (en) * 1984-05-22 1989-02-07 Rolm Corporation Bus apparatus with a plurality of transmitters
JPH0323693Y2 (es) * 1984-10-19 1991-05-23
CA1241084A (en) * 1985-06-10 1988-08-23 Terry O. Wilson Bidirectional bus arrangement for a digital communication system
JPS61296837A (ja) * 1985-06-26 1986-12-27 Toshiba Corp デイジタル伝送システムにおける送受信回路
US4756006A (en) * 1986-02-26 1988-07-05 International Business Machines Corporation Bus transceiver
US4841295A (en) * 1986-07-24 1989-06-20 American Telephone And Telegraph Company, At&T Bell Laboratories Local area network with biasing arrangement for facilitating access contention between work stations connected to a common bus
DE3807566A1 (de) * 1988-03-08 1989-09-21 Nixdorf Computer Ag Schaltungsanordnung zum erkennen fehlerhafter pegelzustaende digitaler signale, die auf eine busleitung eingespeist werden
EP0403663B1 (en) * 1989-01-09 1996-07-17 Fujitsu Limited Digital signal multiplexer and separator
US5121487A (en) * 1989-02-21 1992-06-09 Sun Microsystems, Inc. High speed bus with virtual memory data transfer capability using virtual address/data lines
US5274671A (en) * 1991-08-14 1993-12-28 Hewlett Packard Company Use of output impedance control to eliminate mastership change-over delays in a data communication network
US5940443A (en) * 1994-11-04 1999-08-17 Harris Corporation Parallel telephone bus segmentation system
DE69523136T2 (de) * 1995-01-30 2002-06-20 Alcatel Sa Übertragungsverfahren und Sender mit einem entkoppelten niedrigen Pegel und mit mindestens einem gekoppelten hohen Pegel, Schnittstellenschaltung und Systemkomponente für ein Telekommunikationsnetzwerk, die einen solchen Sender enthalten
US6421390B1 (en) * 1995-12-26 2002-07-16 The Regents Of The University Of California High-speed pulse-shape generator, pulse multiplexer
US6351489B1 (en) * 1996-09-30 2002-02-26 Rosemount Inc. Data bus communication technique for field instrument
JP4052697B2 (ja) * 1996-10-09 2008-02-27 富士通株式会社 信号伝送システム、および、該信号伝送システムのレシーバ回路
US6421391B1 (en) * 1997-09-22 2002-07-16 Ncr Corporation Transmission line for high-frequency clock
JP4197755B2 (ja) 1997-11-19 2008-12-17 富士通株式会社 信号伝送システム、該信号伝送システムのレシーバ回路、および、該信号伝送システムが適用される半導体記憶装置
JP3859943B2 (ja) * 2000-07-25 2006-12-20 エルピーダメモリ株式会社 データ送信装置、データ転送システムおよび方法
US7099416B2 (en) * 2002-02-06 2006-08-29 Broadcom Corporation Single ended termination of clock for dual link DVI receiver
DE10218513B4 (de) * 2002-04-25 2008-08-21 Qimonda Ag Schaltungsanordnung und Verfahren zur Übertragung digitaler Signale
US7596699B2 (en) * 2004-02-24 2009-09-29 Intersil Americas Inc. Battery authentication system
US7512794B2 (en) * 2004-02-24 2009-03-31 Intersil Americas Inc. System and method for authentication
US7729427B2 (en) * 2004-02-24 2010-06-01 Intersil Americas Inc. Pseudo-synchronous one wire bidirectional bus interface
JP4631825B2 (ja) * 2006-07-31 2011-02-16 株式会社デンソー 通信システム
JP5794628B2 (ja) * 2011-10-07 2015-10-14 国立大学法人京都工芸繊維大学 通信システム、通信装置及び通信方法
US9210015B2 (en) 2014-03-20 2015-12-08 Infineon Technologies Ag Edge-based communication
US9509444B2 (en) 2014-03-20 2016-11-29 Infineon Technologies Ag Efficient checksum communication between devices
CN104933000B (zh) * 2014-03-20 2019-08-02 英飞凌科技股份有限公司 基于边沿的通信
US9762419B2 (en) 2014-08-13 2017-09-12 Infineon Technologies Ag Edge-based communication with a plurality of slave devices

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3237164A (en) * 1962-06-29 1966-02-22 Control Data Corp Digital communication system for transferring digital information between a plurality of data processing devices
DE2025740C3 (de) * 1970-05-26 1979-09-27 Siemens Ag, 1000 Berlin Und 8000 Muenchen Sammelleitungsanordnung
JPS49145509U (es) * 1973-04-13 1974-12-16
DE2335408C2 (de) * 1973-07-12 1975-08-07 Telefonbau Und Normalzeit Gmbh, 6000 Frankfurt Schaltungsanordnung zur Realisierung einer Oderfunktion bei der Übertragung schneller digitaler Signale über lange Leitungen
US3858059A (en) * 1973-08-01 1974-12-31 Litton Business Systems Inc High speed driver circuit
US4083005A (en) * 1976-11-01 1978-04-04 Burroughs Corporation Three-level serial digital data communication system
US4101734A (en) * 1976-11-15 1978-07-18 Signetics Corporation Binary to multistate bus driver, receiver and method
JPS53119602A (en) * 1977-03-28 1978-10-19 Ricoh Co Ltd Data transmission system
US4186379A (en) * 1977-04-28 1980-01-29 Hewlett-Packard Company High-speed data transfer apparatus

Also Published As

Publication number Publication date
EP0030095A1 (en) 1981-06-10
EP0030095B1 (en) 1983-12-14
US4388725A (en) 1983-06-14
DE3065913D1 (en) 1984-01-19
ES497243A0 (es) 1982-01-16
CA1150793A (en) 1983-07-26
BR8007819A (pt) 1981-06-16
JPS641986B2 (es) 1989-01-13
JPS5676654A (en) 1981-06-24

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