ES8105124A1 - Improvements in or relating to circuit arrangements for identifying alignment words for use in digital signal transmission systems - Google Patents

Improvements in or relating to circuit arrangements for identifying alignment words for use in digital signal transmission systems

Info

Publication number
ES8105124A1
ES8105124A1 ES494704A ES494704A ES8105124A1 ES 8105124 A1 ES8105124 A1 ES 8105124A1 ES 494704 A ES494704 A ES 494704A ES 494704 A ES494704 A ES 494704A ES 8105124 A1 ES8105124 A1 ES 8105124A1
Authority
ES
Spain
Prior art keywords
demultiplexer
relating
digital signal
signal transmission
transmission systems
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES494704A
Other languages
Spanish (es)
Other versions
ES494704A0 (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Italtel SpA
Original Assignee
Societa Italiana Telecomunicazioni Siemens SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Societa Italiana Telecomunicazioni Siemens SpA filed Critical Societa Italiana Telecomunicazioni Siemens SpA
Publication of ES494704A0 publication Critical patent/ES494704A0/en
Publication of ES8105124A1 publication Critical patent/ES8105124A1/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal
    • H04J3/0608—Detectors therefor, e.g. correlators, state machines
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/13—Adaptive entropy coding, e.g. adaptive variable length coding [AVLC] or context adaptive binary arithmetic coding [CABAC]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/90—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using coding techniques not provided for in groups H04N19/10-H04N19/85, e.g. fractals
    • H04N19/91—Entropy coding, e.g. variable length coding [VLC] or arithmetic coding

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

A circuit arrangement is provided for identifying an alignment word of m bits from a demultiplexer DM of a digital communication system having n channels. The circuit arrangement Fig. 2 (not shown) includes a memory comprising n shift registers of length (n + m)/n for receiving n bit flows from the demultiplexer DM. A decoder DC energizes one of its n outputs according to the way in which the bits of the alignment word have been distributed in the shift registers of the memory. A coder CM provides a code q corresponding to the energized output, where n</=2<q>, and supplies this code as a control signal to an exchange matrix MS which reorganizes the n bit flows, if necessary, into n bit flows of the n channels. Thus, the demultiplexer output is aligned by the circuit arrangement, which is only required to operate at 1/n times the speed of the demultiplexer.
ES494704A 1979-10-11 1980-09-02 Improvements in or relating to circuit arrangements for identifying alignment words for use in digital signal transmission systems Expired ES8105124A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT7926405A IT1207258B (en) 1979-10-11 1979-10-11 CIRCUIT PROVISION SUITABLE FOR RECOGNIZING THE WORD OF ALIGNMENT, FOR PARTICULAR APPLICATION IN THE RECEIVING SECTION OF A MULTIPLATOR DIGITAL SIGNALS.

Publications (2)

Publication Number Publication Date
ES494704A0 ES494704A0 (en) 1981-06-01
ES8105124A1 true ES8105124A1 (en) 1981-06-01

Family

ID=11219415

Family Applications (1)

Application Number Title Priority Date Filing Date
ES494704A Expired ES8105124A1 (en) 1979-10-11 1980-09-02 Improvements in or relating to circuit arrangements for identifying alignment words for use in digital signal transmission systems

Country Status (10)

Country Link
JP (1) JPS5661849A (en)
AR (1) AR228857A1 (en)
AU (1) AU6315280A (en)
BR (1) BR8005874A (en)
DE (1) DE3038360A1 (en)
ES (1) ES8105124A1 (en)
FR (1) FR2467516A1 (en)
GB (1) GB2063626A (en)
IT (1) IT1207258B (en)
SE (1) SE8007125L (en)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1207280B (en) * 1979-10-29 1989-05-17 Telecomunicazionesiemens S P A CIRCUIT PROVISION SUITABLE FOR SYNCHRONIZING A DEMULTIPLATION UNIT, FOR PARTICULAR APPLICATION IN THE RECEIVING SECTION OF A MULTIPLATOR DIGITAL SIGNALS.
IT1151019B (en) * 1980-06-30 1986-12-17 Sits Soc It Telecom Siemens TIMING CIRCUIT FOR RECEPTION OF PCM SIGNALS
DE3212450A1 (en) * 1982-04-02 1983-10-13 Siemens AG, 1000 Berlin und 8000 München SYNCHRONIZING DEVICE OF A DIGITAL SIGNAL DEMULTIPLEX DEVICE
DE3230027A1 (en) * 1982-08-12 1984-02-16 Siemens Ag SYNCHRONIZING ARRANGEMENT
DE3230064A1 (en) * 1982-08-12 1984-02-16 Siemens AG, 1000 Berlin und 8000 München ARRANGEMENT FOR SYNCHRONOUS DEMULTIPLEXING A TIME MULTIPLEX SIGNAL
FR2538647B1 (en) * 1982-12-28 1990-01-12 Billy Jean Claude DEMULTIPLEXING CIRCUIT FOR A HIGH-THROUGHPUT FRAMED DIGITAL SIGNAL
FR2549323B1 (en) * 1983-07-12 1985-10-25 Lignes Telegraph Telephon SYNCHRONIZATION DEVICE FOR DIGITAL TRANSMISSION WITH FRAMES, AND RECEIVER COMPRISING SUCH A DEVICE
DE3401728C2 (en) * 1984-01-19 1986-02-27 ANT Nachrichtentechnik GmbH, 7150 Backnang Digital transmission system
DE3438369A1 (en) * 1984-10-19 1986-04-24 ANT Nachrichtentechnik GmbH, 7150 Backnang Digital data transmission system
DE3905594A1 (en) * 1989-02-23 1990-08-30 Standard Elektrik Lorenz Ag METHOD FOR ASSIGNING DIGITAL SIGNALS TO PARALLEL RECEIVING CHANNELS
US5253254A (en) * 1991-09-18 1993-10-12 Dsc Communications Corporation Telecommunications system with arbitrary alignment parallel framer
FR2743245B1 (en) * 1995-12-29 1998-01-23 Thomson Multimedia Sa DEMULTIPLEXING DEVICE
JPH1032555A (en) * 1996-07-18 1998-02-03 Nippon Telegr & Teleph Corp <Ntt> Channel selection separation circuit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1282074B (en) * 1966-01-21 1968-11-07 Deutsche Bundespost Method and circuit arrangement for the synchronization of PCM time division multiple systems
GB1246879A (en) * 1969-06-17 1971-09-22 Marconi Co Ltd Improvements in or relating to digital signal multiplexing systems

Also Published As

Publication number Publication date
SE8007125L (en) 1981-04-12
JPS5661849A (en) 1981-05-27
AR228857A1 (en) 1983-04-29
IT7926405A0 (en) 1979-10-11
ES494704A0 (en) 1981-06-01
IT1207258B (en) 1989-05-17
BR8005874A (en) 1981-05-19
GB2063626A (en) 1981-06-03
FR2467516A1 (en) 1981-04-17
DE3038360A1 (en) 1981-04-23
AU6315280A (en) 1981-04-16

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