ES451051A1 - Un multiplicador digital. - Google Patents
Un multiplicador digital.Info
- Publication number
- ES451051A1 ES451051A1 ES451051A ES451051A ES451051A1 ES 451051 A1 ES451051 A1 ES 451051A1 ES 451051 A ES451051 A ES 451051A ES 451051 A ES451051 A ES 451051A ES 451051 A1 ES451051 A1 ES 451051A1
- Authority
- ES
- Spain
- Prior art keywords
- adder
- serial
- input
- adding cell
- input elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/04—Recursive filters
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/544—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices for evaluating functions by calculation
- G06F7/5443—Sum of products
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49905—Exception handling
- G06F7/4991—Overflow or underflow
- G06F7/49921—Saturation, i.e. clipping the result to a minimum or maximum value
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB3534575A GB1476603A (en) | 1975-08-27 | 1975-08-27 | Digital multipliers |
Publications (1)
Publication Number | Publication Date |
---|---|
ES451051A1 true ES451051A1 (es) | 1977-08-16 |
Family
ID=10376698
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES451051A Expired ES451051A1 (es) | 1975-08-27 | 1976-08-27 | Un multiplicador digital. |
Country Status (4)
Country | Link |
---|---|
CA (1) | CA1073113A (es) |
DE (1) | DE2636028A1 (es) |
ES (1) | ES451051A1 (es) |
GB (1) | GB1476603A (es) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2418579A2 (fr) * | 1977-03-09 | 1979-09-21 | Onera (Off Nat Aerospatiale) | Filtre numerique recursif a coefficients en combinaison reduite de puissances de deux |
EP0042452B1 (en) * | 1980-06-24 | 1984-03-14 | International Business Machines Corporation | Signal processor computing arrangement and method of operating said arrangement |
NL8100307A (nl) * | 1981-01-23 | 1982-08-16 | Philips Nv | Werkwijze voor het verzwakken van een digitaal signaal en een inrichting voor het uitvoeren van deze werkwijze. |
FR2609222B1 (fr) * | 1986-09-25 | 1989-11-24 | France Etat | Procede et dispositif de linearisation par memoire morte de la fonction de transfert d'un quadripole, et application y relative |
GB8703136D0 (en) * | 1987-02-11 | 1987-03-18 | Univ Cardiff | Filtering electrical signals |
FR2990781A1 (fr) | 2012-05-15 | 2013-11-22 | St Microelectronics Grenoble 2 | Multiplieur serie numerique |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3311739A (en) * | 1963-01-10 | 1967-03-28 | Ibm | Accumulative multiplier |
-
1975
- 1975-08-27 GB GB3534575A patent/GB1476603A/en not_active Expired
-
1976
- 1976-08-11 DE DE19762636028 patent/DE2636028A1/de not_active Withdrawn
- 1976-08-20 CA CA259,572A patent/CA1073113A/en not_active Expired
- 1976-08-27 ES ES451051A patent/ES451051A1/es not_active Expired
Also Published As
Publication number | Publication date |
---|---|
DE2636028A1 (de) | 1977-03-10 |
GB1476603A (en) | 1977-06-16 |
CA1073113A (en) | 1980-03-04 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FD1A | Patent lapsed |
Effective date: 19970612 |