ES450041A1 - Un circuito interruptor logico. - Google Patents

Un circuito interruptor logico.

Info

Publication number
ES450041A1
ES450041A1 ES450041A ES450041A ES450041A1 ES 450041 A1 ES450041 A1 ES 450041A1 ES 450041 A ES450041 A ES 450041A ES 450041 A ES450041 A ES 450041A ES 450041 A1 ES450041 A1 ES 450041A1
Authority
ES
Spain
Prior art keywords
interrupt
signal
level
elements
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES450041A
Other languages
English (en)
Spanish (es)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES450041A1 publication Critical patent/ES450041A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26—Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Electronic Switches (AREA)
ES450041A 1975-07-22 1976-07-22 Un circuito interruptor logico. Expired ES450041A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7522817A FR2319250A1 (fr) 1975-07-22 1975-07-22 Circuit logique d'interruption

Publications (1)

Publication Number Publication Date
ES450041A1 true ES450041A1 (es) 1977-07-16

Family

ID=9158192

Family Applications (1)

Application Number Title Priority Date Filing Date
ES450041A Expired ES450041A1 (es) 1975-07-22 1976-07-22 Un circuito interruptor logico.

Country Status (6)

Country Link
BE (1) BE844370A (enExample)
BR (1) BR7604082A (enExample)
ES (1) ES450041A1 (enExample)
FR (1) FR2319250A1 (enExample)
GB (1) GB1534030A (enExample)
IT (1) IT1067376B (enExample)

Also Published As

Publication number Publication date
BR7604082A (pt) 1977-07-05
IT1067376B (it) 1985-03-16
FR2319250A1 (fr) 1977-02-18
BE844370A (fr) 1977-01-24
GB1534030A (en) 1978-11-29
FR2319250B3 (enExample) 1979-04-27

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Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19970612