ES381722A1 - Metodo para conmutar canales pcm. - Google Patents

Metodo para conmutar canales pcm.

Info

Publication number
ES381722A1
ES381722A1 ES381722A ES381722A ES381722A1 ES 381722 A1 ES381722 A1 ES 381722A1 ES 381722 A ES381722 A ES 381722A ES 381722 A ES381722 A ES 381722A ES 381722 A1 ES381722 A1 ES 381722A1
Authority
ES
Spain
Prior art keywords
time
incoming
writing
switching system
channel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES381722A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Spain SA
Original Assignee
Alcatel Espana SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Espana SA filed Critical Alcatel Espana SA
Publication of ES381722A1 publication Critical patent/ES381722A1/es
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H04J3/0629—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Time-Division Multiplex Systems (AREA)
ES381722A 1969-07-14 1970-07-13 Metodo para conmutar canales pcm. Expired ES381722A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH1072869A CH501344A (de) 1969-07-14 1969-07-14 Verfahren zur Durchschaltung von PCM-Kanälen in einer zentralgesteuerten elektronischen Fernmelde-Vermittlungsanlage

Publications (1)

Publication Number Publication Date
ES381722A1 true ES381722A1 (es) 1972-12-01

Family

ID=4366194

Family Applications (1)

Application Number Title Priority Date Filing Date
ES381722A Expired ES381722A1 (es) 1969-07-14 1970-07-13 Metodo para conmutar canales pcm.

Country Status (7)

Country Link
BE (1) BE753348A (es)
CH (1) CH501344A (es)
DE (1) DE2033648C3 (es)
ES (1) ES381722A1 (es)
FR (1) FR2064798A5 (es)
GB (1) GB1271593A (es)
NL (1) NL7009939A (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1540998A (en) * 1975-05-19 1979-02-21 Post Office Digital switching centre
DE2936938C2 (de) * 1979-09-12 1987-01-08 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum Ausgleich der Phasenunterschiede zwischen dem Streckentakt auf einer mit einer PCM-Vermittlungsstelle verbindenden PCM-Zeitmultiplexleitung und dem Amtstakt dieser Vermittlungsstelle
AU558405B2 (en) * 1982-08-26 1987-01-29 British Telecommunications Public Limited Company Aligner for digital tx system

Also Published As

Publication number Publication date
DE2033648A1 (de) 1971-02-18
CH501344A (de) 1970-12-31
NL7009939A (es) 1971-01-18
FR2064798A5 (es) 1971-07-23
DE2033648C3 (de) 1979-04-19
DE2033648B2 (de) 1978-07-20
BE753348A (nl) 1971-01-13
GB1271593A (en) 1972-04-19

Similar Documents

Publication Publication Date Title
KR850700199A (ko) 시분할 스위칭 회로망
US3644680A (en) Time-assignment speech-interpolation control system
US4076964A (en) Time division system for synchronizing functions controlled by different clocks
GB1357150A (en) Time division multiplex communication
US4485468A (en) Control word generation method and source facilities for multirate data time division switching
GB1498446A (en) Time division multiplex digital transmission system
NZ194610A (en) Tdm frame aligner:slip mechanism controls read-write counters
GB1296181A (es)
GB960511A (en) Improvements to pulse transmission system
US3281537A (en) Multiplex switching stage and its associated control circuits
ES381722A1 (es) Metodo para conmutar canales pcm.
GB1270472A (en) High-capacity time division multiplex switching network having blocking characteristics
GB1349370A (en) Time division multiplex telecommunication system
US3794773A (en) Synchronizing unit
GB1456063A (en) Time-division multiplex telecommunication system
US3629846A (en) Time-versus-location pathfinder for a time division switch
GB1336542A (en) System for tranferring information
US5420894A (en) Elastic storage circuit
GB1444804A (en) Telecommunication systems
US3601545A (en) Time division multiplex communication system
US4060698A (en) Digital switching center
GB1330409A (en) Interface circuit for a pcm system
GB1268959A (en) A network for the transmission of pcm signals
GB1350800A (en) Data transmission
GB1316343A (en) Tdm telecommunications systems