FR2064798A5 - - Google Patents

Info

Publication number
FR2064798A5
FR2064798A5 FR7025628A FR7025628A FR2064798A5 FR 2064798 A5 FR2064798 A5 FR 2064798A5 FR 7025628 A FR7025628 A FR 7025628A FR 7025628 A FR7025628 A FR 7025628A FR 2064798 A5 FR2064798 A5 FR 2064798A5
Authority
FR
France
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7025628A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Standard Electric Corp
Original Assignee
International Standard Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Standard Electric Corp filed Critical International Standard Electric Corp
Application granted granted Critical
Publication of FR2064798A5 publication Critical patent/FR2064798A5/fr
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04QSELECTING
    • H04Q11/00Selecting arrangements for multiplex systems
    • H04Q11/04Selecting arrangements for multiplex systems for time-division multiplexing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/062Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0626Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators
    • H04J3/0629Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers plesiochronous multiplexing systems, e.g. plesiochronous digital hierarchy [PDH], jitter attenuators in a network, e.g. in combination with switching or multiplexing, slip buffers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Signal Processing (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Time-Division Multiplex Systems (AREA)
FR7025628A 1969-07-14 1970-07-10 Expired FR2064798A5 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CH1072869A CH501344A (de) 1969-07-14 1969-07-14 Verfahren zur Durchschaltung von PCM-Kanälen in einer zentralgesteuerten elektronischen Fernmelde-Vermittlungsanlage

Publications (1)

Publication Number Publication Date
FR2064798A5 true FR2064798A5 (fr) 1971-07-23

Family

ID=4366194

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7025628A Expired FR2064798A5 (fr) 1969-07-14 1970-07-10

Country Status (7)

Country Link
BE (1) BE753348A (fr)
CH (1) CH501344A (fr)
DE (1) DE2033648C3 (fr)
ES (1) ES381722A1 (fr)
FR (1) FR2064798A5 (fr)
GB (1) GB1271593A (fr)
NL (1) NL7009939A (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2312162A1 (fr) * 1975-05-19 1976-12-17 Post Office Centre de commutation numerique
EP0025577A1 (fr) * 1979-09-12 1981-03-25 Siemens Aktiengesellschaft Circuit pour la compensation des différences de phase entre l'horloge de voie d'une ligne à division temporelle MIC connectée à un central MIC et l'horloge locale de ce central

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU558405B2 (en) * 1982-08-26 1987-01-29 British Telecommunications Public Limited Company Aligner for digital tx system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2312162A1 (fr) * 1975-05-19 1976-12-17 Post Office Centre de commutation numerique
EP0025577A1 (fr) * 1979-09-12 1981-03-25 Siemens Aktiengesellschaft Circuit pour la compensation des différences de phase entre l'horloge de voie d'une ligne à division temporelle MIC connectée à un central MIC et l'horloge locale de ce central

Also Published As

Publication number Publication date
CH501344A (de) 1970-12-31
DE2033648C3 (de) 1979-04-19
DE2033648A1 (de) 1971-02-18
NL7009939A (fr) 1971-01-18
GB1271593A (en) 1972-04-19
BE753348A (nl) 1971-01-13
ES381722A1 (es) 1972-12-01
DE2033648B2 (de) 1978-07-20

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Legal Events

Date Code Title Description
ST Notification of lapse