ES2117854T3 - Soporte de datos con modulo electronico y metodo para la fabricacion del mismo. - Google Patents

Soporte de datos con modulo electronico y metodo para la fabricacion del mismo.

Info

Publication number
ES2117854T3
ES2117854T3 ES95909671T ES95909671T ES2117854T3 ES 2117854 T3 ES2117854 T3 ES 2117854T3 ES 95909671 T ES95909671 T ES 95909671T ES 95909671 T ES95909671 T ES 95909671T ES 2117854 T3 ES2117854 T3 ES 2117854T3
Authority
ES
Spain
Prior art keywords
pct
electronic module
manufacture
sec
modules
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES95909671T
Other languages
English (en)
Other versions
ES2117854T5 (es
Inventor
Yahya Haghiri
Albert Ojster
Renee-Lucia Barak
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Giesecke and Devrient GmbH
Original Assignee
Giesecke and Devrient GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=6509509&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ES2117854(T3) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Giesecke and Devrient GmbH filed Critical Giesecke and Devrient GmbH
Application granted granted Critical
Publication of ES2117854T3 publication Critical patent/ES2117854T3/es
Publication of ES2117854T5 publication Critical patent/ES2117854T5/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • G06K19/07747—Mounting details of integrated circuit chips at least one of the integrated circuit chips being mounted as a module
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S428/00—Stock material or miscellaneous articles
    • Y10S428/901—Printed circuit
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
    • Y10T428/24934—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including paper layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y10T428/31971—Of carbohydrate
    • Y10T428/31993—Of paper

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)

Abstract

UN SOPORTE DE DATOS CONSISTE EN UNA TARJETA ELABORADA DE UNA CAPA SIMPLE Y CAPAS MULTIPLES DONDE SE INCRUSTA UN MODULO ELECTRONICO. LAS CAPAS DE LA TARJETA ESTAN ELABORADAS DE PAPEL Y/O CARTON Y SON LIGADAS CONJUNTAMENTE POR EJEMPLO POR MEDIO DE ADHESIVOS SENSIBLES AL CALOR O SENSIBLES A LA PRESION. LAS TARJETAS PUEDEN SER ELABORADAS POR MEDIO DE UNA TECNICA CONTINUA. LAS CAPAS DE TARJETA INDIVIDUAL SON TOMADAS A PARTIR DE ROLLOS SINFIN, PROVISTAS CON LAS VENTANAS REQUERIDAS PARA LA RECEPCION DEL MODULO, SIENDO ENTONCES LIGADAS DE FORMA CONJUNTA. LOS MODULOS SON INSERTADOS DENTRO DE LAS CAVIDADES RESULTANTES Y LAS TARJETAS INDIVIDUALES SON ESTAMPADAS.
ES95909671T 1994-02-04 1995-02-03 Soporte de datos con modulo electronico y metodo para la fabricacion del mismo. Expired - Lifetime ES2117854T5 (es)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE4403513A DE4403513A1 (de) 1994-02-04 1994-02-04 Chipkarte mit einem elektronischen Modul und Verfahren zur Herstellung einer solchen Chipkarte
DE4403513 1994-02-04

Publications (2)

Publication Number Publication Date
ES2117854T3 true ES2117854T3 (es) 1998-08-16
ES2117854T5 ES2117854T5 (es) 2007-11-16

Family

ID=6509509

Family Applications (1)

Application Number Title Priority Date Filing Date
ES95909671T Expired - Lifetime ES2117854T5 (es) 1994-02-04 1995-02-03 Soporte de datos con modulo electronico y metodo para la fabricacion del mismo.

Country Status (14)

Country Link
US (1) US5888624A (es)
EP (1) EP0742926B2 (es)
JP (1) JPH09508330A (es)
KR (1) KR100408842B1 (es)
CN (1) CN1098506C (es)
AT (1) ATE168206T1 (es)
AU (1) AU1807395A (es)
CA (1) CA2182705C (es)
DE (3) DE9422424U1 (es)
DK (1) DK0742926T4 (es)
ES (1) ES2117854T5 (es)
MX (1) MX9603163A (es)
RU (1) RU2169389C2 (es)
WO (1) WO1995021423A1 (es)

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EP0742926A1 (de) 1996-11-20
JPH09508330A (ja) 1997-08-26
DE4403513A1 (de) 1995-08-10
CA2182705C (en) 2007-05-01
DE59502764D1 (de) 1998-08-13
DK0742926T3 (da) 1999-04-19
AU1807395A (en) 1995-08-21
ATE168206T1 (de) 1998-07-15
EP0742926B1 (de) 1998-07-08
EP0742926B2 (de) 2007-06-27
DE9422424U1 (de) 2002-02-21
KR100408842B1 (ko) 2004-03-26
MX9603163A (es) 1997-03-29
CA2182705A1 (en) 1995-08-10
RU96117590A (ru) 1998-11-27
RU2169389C2 (ru) 2001-06-20
ES2117854T5 (es) 2007-11-16
CN1144571A (zh) 1997-03-05
CN1098506C (zh) 2003-01-08
WO1995021423A1 (de) 1995-08-10
DK0742926T4 (da) 2007-07-16
US5888624A (en) 1999-03-30

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