ES2113847T3 - Interfaz de computador. - Google Patents

Interfaz de computador.

Info

Publication number
ES2113847T3
ES2113847T3 ES90101516T ES90101516T ES2113847T3 ES 2113847 T3 ES2113847 T3 ES 2113847T3 ES 90101516 T ES90101516 T ES 90101516T ES 90101516 T ES90101516 T ES 90101516T ES 2113847 T3 ES2113847 T3 ES 2113847T3
Authority
ES
Spain
Prior art keywords
data
interface
control
coupled
computer interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
ES90101516T
Other languages
English (en)
Inventor
Steven P Davies
William A Richards
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Raytheon Co
Original Assignee
Hughes Aircraft Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Co filed Critical Hughes Aircraft Co
Application granted granted Critical
Publication of ES2113847T3 publication Critical patent/ES2113847T3/es
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
  • Communication Control (AREA)

Abstract

APARATO DE INTERFAZ PARA ORDENADOR QUE PROPORCIONA UN EFICAZ INTERFAZ PARA ORDENADOR, QUE TRANSFIERE SEÑALES DE CONTROL Y DATOS UTILIZANDO UNA VARIEDAD DE PROTOCOLOS DE COMUNICACIONES ENTRE UN PROCESADOR DE SEÑALES Y DISPOSITIVOS EXTERNOS ACOPLADOS AL MISMO. EL INTERFAZ COMPRENDE UNA PLURALIDAD DE PUERTOS DE CONTROL Y TRANSFERENCIA DE DATOS, QUE INCLUYEN UN PUERTO SERIE Y CUATRO PUERTOS PARALELOS CONFIGURABLES. UNA PLURALIDAD DE CONTROLADORES SE ACOPLAN POR INTERFAZ CON EL PROCESADOR DE SEÑALES PARA DIRIGIR EL FLUJO DE SEÑALES DE CONTROL Y DATOS ENTRE DISPOSITIVOS. ADEMAS, Y CON OBJETO DE AUMENTAR LA VELOCIDAD DE OPERACION DEL INTERFAZ, SE DESCRIBEN TAMBIEN CIRCUITOS QUE CONTROLAN BUFFERS DE TRES ESTADOS EN LOS BUSES DE CONTROL Y DATOS ACOPLADOS A LAS PUERTAS SERIE Y PARALELAS CUYOS CIRCUITOS PROPORCIONAN CARACTERISTICAS DE COLECTOR ABIERTO SIN SACRIFICAR LA VELOCIDAD DEL BUFFER DE TRES ESTADOS.
ES90101516T 1989-01-27 1990-01-25 Interfaz de computador. Expired - Lifetime ES2113847T3 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US30378589A 1989-01-27 1989-01-27

Publications (1)

Publication Number Publication Date
ES2113847T3 true ES2113847T3 (es) 1998-05-16

Family

ID=23173684

Family Applications (1)

Application Number Title Priority Date Filing Date
ES90101516T Expired - Lifetime ES2113847T3 (es) 1989-01-27 1990-01-25 Interfaz de computador.

Country Status (6)

Country Link
EP (1) EP0380105B1 (es)
JP (1) JPH0816892B2 (es)
AU (1) AU627543B2 (es)
CA (1) CA2007052A1 (es)
DE (1) DE69032184T2 (es)
ES (1) ES2113847T3 (es)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0201223D0 (en) * 2002-01-19 2002-03-06 Inc Technologies Holdings Ltd Kiosk Technology kit
DE102006005432A1 (de) * 2006-02-07 2007-08-09 Keynote Sigos Gmbh Adaptermodul zur Bereitstellung einer Datenverbindung
AU2010242546A1 (en) 2009-04-30 2011-12-01 Maslen Technology Australia Pty Ltd Door system for refrigerated display cabinets

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4349870A (en) * 1979-09-05 1982-09-14 Motorola, Inc. Microcomputer with programmable multi-function port
JPS59146352A (ja) * 1983-02-09 1984-08-22 Nec Corp シングル・チップ・マイクロコンピュータ
US4716527A (en) * 1984-12-10 1987-12-29 Ing. C. Olivetti Bus converter
US4683534A (en) * 1985-06-17 1987-07-28 Motorola, Inc. Method and apparatus for interfacing buses of different sizes
JPS62107362A (ja) * 1985-11-06 1987-05-18 Toshiba Corp システム構成用ｌｓｉ

Also Published As

Publication number Publication date
EP0380105B1 (en) 1998-04-01
EP0380105A2 (en) 1990-08-01
AU627543B2 (en) 1992-08-27
JPH02239357A (ja) 1990-09-21
EP0380105A3 (en) 1992-01-15
JPH0816892B2 (ja) 1996-02-21
AU4883990A (en) 1990-08-16
CA2007052A1 (en) 1990-07-27
DE69032184T2 (de) 1998-11-19
DE69032184D1 (de) 1998-05-07

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