ATE160474T1 - Programmierbare logische schaltung mit programmierbaren invertern an den eingangs- /ausgangsanschlüssen - Google Patents
Programmierbare logische schaltung mit programmierbaren invertern an den eingangs- /ausgangsanschlüssenInfo
- Publication number
- ATE160474T1 ATE160474T1 AT91906333T AT91906333T ATE160474T1 AT E160474 T1 ATE160474 T1 AT E160474T1 AT 91906333 T AT91906333 T AT 91906333T AT 91906333 T AT91906333 T AT 91906333T AT E160474 T1 ATE160474 T1 AT E160474T1
- Authority
- AT
- Austria
- Prior art keywords
- programmable
- inverters
- array
- input
- inputs
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
- H03K19/1735—Controllable logic circuits by wiring, e.g. uncommitted logic arrays
- H03K19/1736—Controllable logic circuits by wiring, e.g. uncommitted logic arrays in which the wiring can be modified
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/487,750 US5028821A (en) | 1990-03-01 | 1990-03-01 | Programmable logic device with programmable inverters at input/output pads |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE160474T1 true ATE160474T1 (de) | 1997-12-15 |
Family
ID=23936971
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT91906333T ATE160474T1 (de) | 1990-03-01 | 1991-02-22 | Programmierbare logische schaltung mit programmierbaren invertern an den eingangs- /ausgangsanschlüssen |
Country Status (6)
Country | Link |
---|---|
US (1) | US5028821A (de) |
EP (1) | EP0517846B1 (de) |
JP (1) | JPH05507394A (de) |
AT (1) | ATE160474T1 (de) |
DE (1) | DE69128244T2 (de) |
WO (1) | WO1991013495A1 (de) |
Families Citing this family (62)
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JP2880547B2 (ja) * | 1990-01-19 | 1999-04-12 | 三菱電機株式会社 | 半導体記憶装置 |
US5338982A (en) * | 1991-03-29 | 1994-08-16 | Kawasaki Steel Corporation | Programmable logic device |
US5250859A (en) * | 1991-09-27 | 1993-10-05 | Kaplinsky Cecil H | Low power multifunction logic array |
US5235221A (en) * | 1992-04-08 | 1993-08-10 | Micron Technology, Inc. | Field programmable logic array with speed optimized architecture |
US5220215A (en) * | 1992-05-15 | 1993-06-15 | Micron Technology, Inc. | Field programmable logic array with two or planes |
US5300830A (en) * | 1992-05-15 | 1994-04-05 | Micron Semiconductor, Inc. | Programmable logic device macrocell with an exclusive feedback and exclusive external input lines for registered and combinatorial modes using a dedicated product term for control |
US5331227A (en) * | 1992-05-15 | 1994-07-19 | Micron Semiconductor, Inc. | Programmable logic device macrocell with an exclusive feedback line and an exclusive external input line |
US5384500A (en) * | 1992-05-15 | 1995-01-24 | Micron Semiconductor, Inc. | Programmable logic device macrocell with an exclusive feedback and an exclusive external input line for a combinatorial mode and accommodating two separate programmable or planes |
US5287017A (en) * | 1992-05-15 | 1994-02-15 | Micron Technology, Inc. | Programmable logic device macrocell with two OR array inputs |
US5298803A (en) * | 1992-07-15 | 1994-03-29 | Micron Semiconductor, Inc. | Programmable logic device having low power microcells with selectable registered and combinatorial output signals |
US5291079A (en) * | 1992-07-23 | 1994-03-01 | Xilinx, Inc. | Configuration control unit for programming a field programmable gate array and reading array status |
US5319254A (en) * | 1992-07-23 | 1994-06-07 | Xilinx, Inc. | Logic cell which can be configured as a latch without static one's problem |
US5646547A (en) * | 1994-04-28 | 1997-07-08 | Xilinx, Inc. | Logic cell which can be configured as a latch without static one's problem |
US5386154A (en) * | 1992-07-23 | 1995-01-31 | Xilinx, Inc. | Compact logic cell for field programmable gate array chip |
US5365125A (en) * | 1992-07-23 | 1994-11-15 | Xilinx, Inc. | Logic cell for field programmable gate array having optional internal feedback and optional cascade |
US5331226A (en) * | 1992-07-23 | 1994-07-19 | Xilinx, Inc. | Logic cell for field programmable gate array having optional input inverters |
EP0653123A4 (de) * | 1992-07-29 | 1995-12-20 | Xilinx Inc | Logische zelle für benutzerprogrammierbares gatterfeld mit optionalen eingangsinvertern. |
US5497107A (en) * | 1993-05-13 | 1996-03-05 | Texas Instruments Incorporated | Multiple, selectable PLAS having shared inputs and outputs |
US5448185A (en) * | 1993-10-27 | 1995-09-05 | Actel Corporation | Programmable dedicated FPGA functional blocks for multiple wide-input functions |
US5742179A (en) * | 1994-01-27 | 1998-04-21 | Dyna Logic Corporation | High speed programmable logic architecture |
JPH07260874A (ja) * | 1994-03-18 | 1995-10-13 | Fujitsu Ltd | 半導体装置及びその試験方法 |
US5590069A (en) * | 1994-10-17 | 1996-12-31 | Qualcomm Incorporated | Method and apparatus for providing ROM in an integrated circuit having update through single substance layer modification capability |
US5530378A (en) * | 1995-04-26 | 1996-06-25 | Xilinx, Inc. | Cross point interconnect structure with reduced area |
US5617041A (en) * | 1995-06-02 | 1997-04-01 | Xilinx, Inc. | Method and apparatus for reducing coupling switching noise in interconnect array matrix |
US5646546A (en) * | 1995-06-02 | 1997-07-08 | International Business Machines Corporation | Programmable logic cell having configurable gates and multiplexers |
US5970255A (en) | 1995-10-16 | 1999-10-19 | Altera Corporation | System for coupling programmable logic device to external circuitry which selects a logic standard and uses buffers to modify output and input signals accordingly |
DE69521051T2 (de) * | 1995-12-29 | 2001-09-06 | Stmicroelectronics S.R.L., Agrate Brianza | Programmierbare Vorrichtung mit Basismodulen, die mittels Flash-Speicherzellen mit einander verbunden werden |
US6005806A (en) * | 1996-03-14 | 1999-12-21 | Altera Corporation | Nonvolatile configuration cells and cell arrays |
US6526461B1 (en) * | 1996-07-18 | 2003-02-25 | Altera Corporation | Interconnect chip for programmable logic devices |
US6018476A (en) * | 1996-09-16 | 2000-01-25 | Altera Corporation | Nonvolatile configuration cells and cell arrays |
US5959466A (en) | 1997-01-31 | 1999-09-28 | Actel Corporation | Field programmable gate array with mask programmed input and output buffers |
US6150837A (en) * | 1997-02-28 | 2000-11-21 | Actel Corporation | Enhanced field programmable gate array |
US5952852A (en) * | 1997-07-02 | 1999-09-14 | Actel Corporation | Fast wide decode in an FPGA using probe circuit |
US5952846A (en) * | 1997-08-08 | 1999-09-14 | Xilinx, Inc. | Method for reducing switching noise in a programmable logic device |
US6407576B1 (en) * | 1999-03-04 | 2002-06-18 | Altera Corporation | Interconnection and input/output resources for programmable logic integrated circuit devices |
US6271679B1 (en) | 1999-03-24 | 2001-08-07 | Altera Corporation | I/O cell configuration for multiple I/O standards |
US6836151B1 (en) | 1999-03-24 | 2004-12-28 | Altera Corporation | I/O cell configuration for multiple I/O standards |
US6172518B1 (en) | 1999-07-23 | 2001-01-09 | Xilinx, Inc. | Method of minimizing power use in programmable logic devices |
US6334208B1 (en) | 1999-08-11 | 2001-12-25 | Xilinx, Inc. | Method and apparatus for in-system programming with a status bit |
US7171542B1 (en) * | 2000-06-19 | 2007-01-30 | Silicon Labs Cp, Inc. | Reconfigurable interface for coupling functional input/output blocks to limited number of i/o pins |
US8145923B2 (en) * | 2008-02-20 | 2012-03-27 | Xilinx, Inc. | Circuit for and method of minimizing power consumption in an integrated circuit device |
US20100138575A1 (en) | 2008-12-01 | 2010-06-03 | Micron Technology, Inc. | Devices, systems, and methods to synchronize simultaneous dma parallel processing of a single data stream by multiple devices |
US20100174887A1 (en) | 2009-01-07 | 2010-07-08 | Micron Technology Inc. | Buses for Pattern-Recognition Processors |
JP2010277662A (ja) * | 2009-05-29 | 2010-12-09 | Elpida Memory Inc | 半導体装置及びその製造方法 |
US9323994B2 (en) | 2009-12-15 | 2016-04-26 | Micron Technology, Inc. | Multi-level hierarchical routing matrices for pattern-recognition processors |
US8593175B2 (en) * | 2011-12-15 | 2013-11-26 | Micron Technology, Inc. | Boolean logic in a state machine lattice |
US20130275709A1 (en) | 2012-04-12 | 2013-10-17 | Micron Technology, Inc. | Methods for reading data from a storage buffer including delaying activation of a column select |
US9524248B2 (en) | 2012-07-18 | 2016-12-20 | Micron Technology, Inc. | Memory management for a hierarchical memory system |
US9448965B2 (en) | 2013-03-15 | 2016-09-20 | Micron Technology, Inc. | Receiving data streams in parallel and providing a first portion of data to a first state machine engine and a second portion to a second state machine |
US9703574B2 (en) | 2013-03-15 | 2017-07-11 | Micron Technology, Inc. | Overflow detection and correction in state machine engines |
US10430210B2 (en) | 2014-12-30 | 2019-10-01 | Micron Technology, Inc. | Systems and devices for accessing a state machine |
US10769099B2 (en) | 2014-12-30 | 2020-09-08 | Micron Technology, Inc. | Devices for time division multiplexing of state machine engine signals |
US11366675B2 (en) | 2014-12-30 | 2022-06-21 | Micron Technology, Inc. | Systems and devices for accessing a state machine |
US10977309B2 (en) | 2015-10-06 | 2021-04-13 | Micron Technology, Inc. | Methods and systems for creating networks |
US10846103B2 (en) | 2015-10-06 | 2020-11-24 | Micron Technology, Inc. | Methods and systems for representing processing resources |
US10691964B2 (en) | 2015-10-06 | 2020-06-23 | Micron Technology, Inc. | Methods and systems for event reporting |
US10146555B2 (en) | 2016-07-21 | 2018-12-04 | Micron Technology, Inc. | Adaptive routing to avoid non-repairable memory and logic defects on automata processor |
US10019311B2 (en) | 2016-09-29 | 2018-07-10 | Micron Technology, Inc. | Validation of a symbol response memory |
US10268602B2 (en) | 2016-09-29 | 2019-04-23 | Micron Technology, Inc. | System and method for individual addressing |
US10592450B2 (en) | 2016-10-20 | 2020-03-17 | Micron Technology, Inc. | Custom compute cores in integrated circuit devices |
US10929764B2 (en) | 2016-10-20 | 2021-02-23 | Micron Technology, Inc. | Boolean satisfiability |
US10416703B2 (en) * | 2017-08-10 | 2019-09-17 | Ambiq Micro, Inc. | Counter/timer array for generation of complex patterns independent of software control |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4032894A (en) * | 1976-06-01 | 1977-06-28 | International Business Machines Corporation | Logic array with enhanced flexibility |
GB1549642A (en) * | 1976-08-03 | 1979-08-08 | Nat Res Dev | Inverters and logic gates employing inverters |
US4207556A (en) * | 1976-12-14 | 1980-06-10 | Nippon Telegraph And Telephone Public Corporation | Programmable logic array arrangement |
US4717912A (en) * | 1982-10-07 | 1988-01-05 | Advanced Micro Devices, Inc. | Apparatus for producing any one of a plurality of signals at a single output |
US4612459A (en) * | 1984-05-31 | 1986-09-16 | Rca Corporation | Programmable buffer selectively settable to operate in different modes |
US4638189A (en) * | 1984-06-29 | 1987-01-20 | Monolithic Memories, Incorporated | Fast and gate with programmable output polarity |
US4742252A (en) * | 1985-03-29 | 1988-05-03 | Advanced Micro Devices, Inc. | Multiple array customizable logic device |
US4677318A (en) * | 1985-04-12 | 1987-06-30 | Altera Corporation | Programmable logic storage element for programmable logic devices |
US4758746A (en) * | 1985-08-12 | 1988-07-19 | Monolithic Memories, Inc. | Programmable logic array with added array of gates and added output routing flexibility |
US4644192A (en) * | 1985-09-19 | 1987-02-17 | Harris Corporation | Programmable array logic with shared product terms and J-K registered outputs |
US4703206A (en) * | 1985-11-19 | 1987-10-27 | Signetics Corporation | Field-programmable logic device with programmable foldback to control number of logic levels |
US4721868A (en) * | 1986-09-23 | 1988-01-26 | Advanced Micro Devices, Inc. | IC input circuitry programmable for realizing multiple functions from a single input |
US4786904A (en) * | 1986-12-15 | 1988-11-22 | Zoran Corporation | Electronically programmable gate array having programmable interconnect lines |
US4761570A (en) * | 1987-02-12 | 1988-08-02 | Harris Corporation | Programmable logic device with programmable signal inhibition and inversion means |
JPS63260319A (ja) * | 1987-04-17 | 1988-10-27 | Ricoh Co Ltd | 論理集積回路装置 |
US4829203A (en) * | 1988-04-20 | 1989-05-09 | Texas Instruments Incorporated | Integrated programmable bit circuit with minimal power requirement |
US4914322A (en) * | 1988-12-16 | 1990-04-03 | Advanced Micro Devices, Inc. | Polarity option control logic for use with a register of a programmable logic array macrocell |
US4912345A (en) * | 1988-12-29 | 1990-03-27 | Sgs-Thomson Microelectronics, Inc. | Programmable summing functions for programmable logic devices |
-
1990
- 1990-03-01 US US07/487,750 patent/US5028821A/en not_active Expired - Lifetime
-
1991
- 1991-02-22 DE DE69128244T patent/DE69128244T2/de not_active Expired - Fee Related
- 1991-02-22 WO PCT/US1991/001164 patent/WO1991013495A1/en active IP Right Grant
- 1991-02-22 AT AT91906333T patent/ATE160474T1/de active
- 1991-02-22 EP EP91906333A patent/EP0517846B1/de not_active Expired - Lifetime
- 1991-02-22 JP JP91505997A patent/JPH05507394A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0517846B1 (de) | 1997-11-19 |
JPH05507394A (ja) | 1993-10-21 |
EP0517846A4 (en) | 1993-02-24 |
WO1991013495A1 (en) | 1991-09-05 |
DE69128244D1 (de) | 1998-01-02 |
EP0517846A1 (de) | 1992-12-16 |
DE69128244T2 (de) | 1998-06-10 |
US5028821A (en) | 1991-07-02 |
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