ES2059136T3 - Circuito de regulacion de fase. - Google Patents
Circuito de regulacion de fase.Info
- Publication number
- ES2059136T3 ES2059136T3 ES91908354T ES91908354T ES2059136T3 ES 2059136 T3 ES2059136 T3 ES 2059136T3 ES 91908354 T ES91908354 T ES 91908354T ES 91908354 T ES91908354 T ES 91908354T ES 2059136 T3 ES2059136 T3 ES 2059136T3
- Authority
- ES
- Spain
- Prior art keywords
- pll
- regulation
- signals
- television receiver
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000011156 evaluation Methods 0.000 abstract 1
- PWPJGUXAGUPAHP-UHFFFAOYSA-N lufenuron Chemical compound C1=C(Cl)C(OC(F)(F)C(C(F)(F)F)F)=CC(Cl)=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F PWPJGUXAGUPAHP-UHFFFAOYSA-N 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
- H03L7/191—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using at least two different signals from the frequency divider or the counter for determining the time difference
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
- H03L7/1075—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
- H03L7/0895—Details of the current generators
- H03L7/0898—Details of the current generators the source or sink current values being variable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Synchronizing For Television (AREA)
Abstract
LOS CIRCUITOS DE REGULACION PLL EN OSCILADORES HORIZONTALES DEBEN TENER EN ESTADO BLOQUEADO UNA VELOCIDAD DE REGULACION REDUCIDA, PARA QUE NO SE GENERE EL EFECTO JITTER DEBIDO A SEÑALES DE ENTRADA CON PRESENCIA DE RUIDOS. DEBIDO A LA DESFAVORABLE RELACION DE IMPULSOS ENTRE LA LONGITUD DEL IMPULSO SINCRONICO Y LA DURACION DE LINEA (4,7:64) LA VELOCIDAD DE REGULACION A GRANDES DIFERENCIAS DE FASE DE LAS SEÑALES PLL ES SOLO PEQUEÑA Y, P.EJ. AL CONMUTAR ENTRE DIVERSAS FUENTES DE PROGRAMA DE UN RECEPTOR DE TELEVISION, DURA RELATIVAMENTE MUCHO TIEMPO (ALGUNAS SEMI-IMAGENES), HASTA QUE LA SINCRONIZACION DE LINEAS VUELVE A ESTAR EN ESTADO BLOQUEADO. MEDIANTE LA EVALUACION LOGICA DE UN IMPULSO ADICIONAL PRESENTE EN EL RECEPTOR DE TELEVISION O FACILMENTE GENERABLE, LA SEÑAL DE MANDO PARA EL VCO PUEDE CONMUTARSE EN LA PLL, EN CASO DE GRANDES DESVIACIONES DE FASE, P.EJ. A UNA CORRIENTE DE CONTROL CUADRUPLE. PARA REGULACIONES PLL CON SEÑALES DE ENTRADA QUE NO TIENEN UNA RELACION DE IMPULSOS DE 50:50.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4013694A DE4013694A1 (de) | 1990-04-28 | 1990-04-28 | Phasenregelschaltung |
Publications (1)
Publication Number | Publication Date |
---|---|
ES2059136T3 true ES2059136T3 (es) | 1994-11-01 |
Family
ID=6405332
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
ES91908354T Expired - Lifetime ES2059136T3 (es) | 1990-04-28 | 1991-04-19 | Circuito de regulacion de fase. |
Country Status (12)
Country | Link |
---|---|
US (1) | US5334954A (es) |
EP (1) | EP0527167B1 (es) |
JP (1) | JP3119868B2 (es) |
KR (1) | KR100215766B1 (es) |
AU (1) | AU7745191A (es) |
CA (1) | CA2077532C (es) |
DE (2) | DE4013694A1 (es) |
ES (1) | ES2059136T3 (es) |
HK (1) | HK68895A (es) |
HU (1) | HU220468B1 (es) |
SG (1) | SG30581G (es) |
WO (1) | WO1991017603A1 (es) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5574407A (en) * | 1993-04-20 | 1996-11-12 | Rca Thomson Licensing Corporation | Phase lock loop with error consistency detector |
EP0684701B1 (en) * | 1994-05-26 | 2005-01-12 | Matsushita Electric Industrial Co., Ltd. | Frequency synthesizer |
US5534826A (en) * | 1994-10-24 | 1996-07-09 | At&T Corp. | Oscillator with increased reliability start up |
EP0920194A4 (en) * | 1996-08-13 | 2000-11-02 | Fujitsu General Ltd | PHASE CONTROL CIRCUIT FOR DIGITAL DISPLAY DEVICE |
JPH10257041A (ja) * | 1997-03-11 | 1998-09-25 | Sony Corp | フェイズロックドループ回路及び再生装置 |
JP2000232355A (ja) * | 1999-02-09 | 2000-08-22 | Mitsubishi Electric Corp | 位相同期回路 |
JP4407031B2 (ja) * | 2000-09-21 | 2010-02-03 | ソニー株式会社 | 位相同期ループ回路および遅延同期ループ回路 |
CN100554241C (zh) * | 2004-09-17 | 2009-10-28 | 旭化成化学株式会社 | 醇类副产物的工业分离方法 |
EA009650B1 (ru) * | 2004-09-21 | 2008-02-28 | Асахи Касеи Кемикалз Корпорейшн | Промышленный способ выделения побочно полученного спирта |
JP4292214B2 (ja) * | 2004-10-14 | 2009-07-08 | 旭化成ケミカルズ株式会社 | 高純度ジアリールカーボネートの製造方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL169811C (nl) * | 1975-10-03 | 1982-08-16 | Philips Nv | Beeldregelsynchronisatieschakeling, alsmede televisieontvanger daarvan voorzien. |
US4156855A (en) * | 1978-01-26 | 1979-05-29 | Rca Corporation | Phase-locked loop with variable gain and bandwidth |
US4630000A (en) * | 1983-09-21 | 1986-12-16 | Sony Corporation | Apparatus for controlling the frequency of a voltage controlled oscillator |
DE3715929A1 (de) * | 1987-05-13 | 1988-11-24 | Thomson Brandt Gmbh | Schaltungsanordnung zur automatischen umschaltung der regelgeschwindigkeit eines phasenregelkreises |
EP0314219B1 (en) * | 1987-10-26 | 1994-01-19 | Koninklijke Philips Electronics N.V. | Line synchronising circuit |
-
1990
- 1990-04-28 DE DE4013694A patent/DE4013694A1/de not_active Withdrawn
-
1991
- 1991-04-19 HU HU9202776A patent/HU220468B1/hu not_active IP Right Cessation
- 1991-04-19 ES ES91908354T patent/ES2059136T3/es not_active Expired - Lifetime
- 1991-04-19 DE DE59102513T patent/DE59102513D1/de not_active Expired - Fee Related
- 1991-04-19 EP EP91908354A patent/EP0527167B1/de not_active Expired - Lifetime
- 1991-04-19 CA CA002077532A patent/CA2077532C/en not_active Expired - Fee Related
- 1991-04-19 WO PCT/EP1991/000750 patent/WO1991017603A1/de active IP Right Grant
- 1991-04-19 KR KR1019920702596A patent/KR100215766B1/ko not_active IP Right Cessation
- 1991-04-19 AU AU77451/91A patent/AU7745191A/en not_active Abandoned
- 1991-04-19 SG SG1995904801A patent/SG30581G/en unknown
- 1991-04-19 JP JP03507927A patent/JP3119868B2/ja not_active Expired - Fee Related
-
1992
- 1992-11-25 US US07/980,946 patent/US5334954A/en not_active Expired - Lifetime
-
1995
- 1995-05-04 HK HK68895A patent/HK68895A/xx not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
HU220468B1 (hu) | 2002-02-28 |
AU7745191A (en) | 1991-11-27 |
HK68895A (en) | 1995-05-12 |
JPH05507184A (ja) | 1993-10-14 |
HU9202776D0 (en) | 1992-12-28 |
EP0527167B1 (de) | 1994-08-10 |
SG30581G (en) | 1995-09-01 |
HUT64434A (en) | 1993-12-28 |
US5334954A (en) | 1994-08-02 |
EP0527167A1 (de) | 1993-02-17 |
KR100215766B1 (ko) | 1999-08-16 |
JP3119868B2 (ja) | 2000-12-25 |
WO1991017603A1 (de) | 1991-11-14 |
CA2077532C (en) | 2000-10-17 |
CA2077532A1 (en) | 1991-10-29 |
DE59102513D1 (de) | 1994-09-15 |
DE4013694A1 (de) | 1991-10-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
FG2A | Definitive protection |
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