EP3665720A1 - Elektronisches system mit einer unteren umverteilungsschicht und verfahren zur herstellung eines solchen elektronischen systems - Google Patents

Elektronisches system mit einer unteren umverteilungsschicht und verfahren zur herstellung eines solchen elektronischen systems

Info

Publication number
EP3665720A1
EP3665720A1 EP18748943.0A EP18748943A EP3665720A1 EP 3665720 A1 EP3665720 A1 EP 3665720A1 EP 18748943 A EP18748943 A EP 18748943A EP 3665720 A1 EP3665720 A1 EP 3665720A1
Authority
EP
European Patent Office
Prior art keywords
redistribution layer
electronic component
electronic
connection ports
connectors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
EP18748943.0A
Other languages
English (en)
French (fr)
Inventor
Ayad Ghannam
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
3dis Technologies
Original Assignee
3dis Technologies
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 3dis Technologies filed Critical 3dis Technologies
Publication of EP3665720A1 publication Critical patent/EP3665720A1/de
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
EP18748943.0A 2017-08-08 2018-08-08 Elektronisches system mit einer unteren umverteilungsschicht und verfahren zur herstellung eines solchen elektronischen systems Pending EP3665720A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1757588A FR3070091B1 (fr) 2017-08-08 2017-08-08 Systeme electronique comprenant une couche de redistribution inferieure et procede de fabrication d'un tel systeme electronique
PCT/EP2018/071516 WO2019030288A1 (fr) 2017-08-08 2018-08-08 Systeme electronique comprenant une couche de redistribution inferieure et procede de fabrication d'un tel systeme electronique

Publications (1)

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EP3665720A1 true EP3665720A1 (de) 2020-06-17

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EP18748943.0A Pending EP3665720A1 (de) 2017-08-08 2018-08-08 Elektronisches system mit einer unteren umverteilungsschicht und verfahren zur herstellung eines solchen elektronischen systems

Country Status (4)

Country Link
US (1) US11133264B2 (de)
EP (1) EP3665720A1 (de)
FR (1) FR3070091B1 (de)
WO (1) WO2019030288A1 (de)

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Publication number Priority date Publication date Assignee Title
CN113228833A (zh) * 2018-12-31 2021-08-06 3M创新有限公司 软基板上的柔性电路

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01140652A (ja) * 1987-11-26 1989-06-01 Sharp Corp 立体型半導体装置
US7199459B2 (en) * 2003-01-22 2007-04-03 Siliconware Precision Industries Co., Ltd. Semiconductor package without bonding wires and fabrication method thereof
DE102008022733B4 (de) * 2008-05-05 2011-05-26 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Funktionseinheit und Verfahren zu deren Herstellung
FR2965659B1 (fr) 2010-10-05 2013-11-29 Centre Nat Rech Scient Procédé de fabrication d'un circuit intégré
JP6031059B2 (ja) * 2014-03-31 2016-11-24 信越化学工業株式会社 半導体装置、積層型半導体装置、封止後積層型半導体装置、及びこれらの製造方法
US9543170B2 (en) * 2014-08-22 2017-01-10 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor packages and methods of forming the same
US9502364B2 (en) 2014-08-28 2016-11-22 Taiwan Semiconductor Manufacturing Company Limited Semiconductor package and method of forming the same
DE102015104507B4 (de) 2014-12-19 2022-06-30 Taiwan Semiconductor Manufacturing Co., Ltd. Integrierte Fan-Out-Struktur mit Öffnungen in einer Pufferschicht und deren Herstellungsverfahren
US20170098628A1 (en) * 2015-10-05 2017-04-06 Mediatek Inc. Semiconductor package structure and method for forming the same
US10529671B2 (en) * 2016-12-13 2020-01-07 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and method for forming the same

Also Published As

Publication number Publication date
FR3070091A1 (fr) 2019-02-15
WO2019030288A1 (fr) 2019-02-14
FR3070091B1 (fr) 2020-02-07
US11133264B2 (en) 2021-09-28
US20200185331A1 (en) 2020-06-11

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