EP2831905A1 - Dispositif à semi-conducteur et procédé de production d'une couche vitreuse - Google Patents

Dispositif à semi-conducteur et procédé de production d'une couche vitreuse

Info

Publication number
EP2831905A1
EP2831905A1 EP13718805.8A EP13718805A EP2831905A1 EP 2831905 A1 EP2831905 A1 EP 2831905A1 EP 13718805 A EP13718805 A EP 13718805A EP 2831905 A1 EP2831905 A1 EP 2831905A1
Authority
EP
European Patent Office
Prior art keywords
layer
substrate
barrier layer
glass
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP13718805.8A
Other languages
German (de)
English (en)
Inventor
Simon Maus
Ulli Hansen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
MSG Lithoglas GmbH
Original Assignee
MSG Lithoglas GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MSG Lithoglas GmbH filed Critical MSG Lithoglas GmbH
Publication of EP2831905A1 publication Critical patent/EP2831905A1/fr
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/564—Details not otherwise provided for, e.g. protection against moisture
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/0641—Nitrides
    • C23C14/0652—Silicon nitride
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08—Oxides
    • C23C14/081—Oxides of aluminium, magnesium or beryllium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/10—Glass or silica
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/24—Vacuum evaporation
    • C23C14/28—Vacuum evaporation by wave energy or particle radiation
    • C23C14/30—Vacuum evaporation by wave energy or particle radiation by electron bombardment
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/50—Substrate holders
    • C23C14/505—Substrate holders for rotation of the substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02167—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon carbide not containing oxygen, e.g. SiC, SiC:H or silicon carbonitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02178—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02269—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by thermal evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/2855—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table by physical means, e.g. sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the invention relates to technologies for semiconductor components in power electronics, with which a sealing of the semiconductor devices is improved, in particular in relation to the ever increasing demands on the reliability of the semiconductor device components, essentially to the moisture resistance.
  • German Patent No. DE 10 2005 044 522 (Schott) teaches a method of applying porous glass layers to a substrate.
  • the known method comprises the following steps: providing a substrate and a source of matter followed by depositing a glass layer having a degree of porosity of greater than 1% by means of a Physical Vapor Deposition (PVD) process on the substrate.
  • PVD Physical Vapor Deposition
  • the method uses a PVD system which has an electron source, a deflection magnet and an electron source.
  • An electron beam from the electron source is directed to a disk-shaped target made of glass, preferably of low-melting borosilicate glass.
  • the electron beam vaporizes the target and the material from the target deposits on the substrate to form the glassy layer.
  • high performance polymers such as e.g. Polyimides used for sealing the surfaces of the components.
  • This is e.g. in document US 2008/0224303 Al.
  • These high-performance polymers have the advantage that they can be applied and also structured with photolithographic processes customary in the semiconductor industry.
  • these high-performance polymers have very good breakdown strengths.
  • the curing (curing) processes required after application of the layers in this known process up to a few 100.degree. C. lead to a stressing of the layers due to the fact that the substrate material silicon (conventional substrate material for power semiconductors) is significantly different thermal expansion behavior. The latter can lead to a possible malfunction of the component or to an increased mechanical load of the underlying layer structure at high temperature loads, such as may occur during operation of power semiconductor elements, which can greatly reduce the service life of the component.
  • the seals with the hitherto used high-performance polymers do not have sufficient hermeticity against ambient moisture, even if they are applied at comparatively high layer thicknesses.
  • a method for producing an electrically insulating and in particular moisture-resistant hermetic layer on a power semiconductor device by thermal evaporation of a glassy Schichtaufdampfmaterials is disclosed.
  • This hermetic encapsulation of a component could be implemented, for example, by the application of at least one thin layer of borosilicate glass and / or particularly preferably by combination with other glassy inorganic layers.
  • the deposition of the glass layer can be provided in a form A as a plasma-assisted electron beam evaporation. Due to the plasma utilization, a grain pakt ist / V erdichtung the glass layer is generated.
  • the thus densified layer has a significantly reduced moisture diffusion and can thus protect a component, in particular an electronic component, from atmospheric influences.
  • the properties of the vapor-deposited borosilicate glass layers as a moisture barrier could be demonstrated by a temperature and humidity deposition on silicon substrates. A possible incorporation of moisture into the layer would result in a bending of the coated silicon substrates due to the increase in the layer tension. Even after aging at 85 ° C. and 85% relative humidity, no increase in deflection could be measured after 1000 hours.
  • hermeticity of the borosilicate glass layers could be demonstrated by a helium leak test according to Mil Std 883, method 1014. For an approximately 8 ⁇ thick layer so a leakage rate of less than 10- 8 mbar * l / s has been determined.
  • the plasma utilization during the deposition allows a targeted influencing of the layer stress.
  • the vapor-deposited glass layers can be adapted in this way and by the composition of their composition to the thermal expansion behavior of the substrate material used.
  • the invention can be used for example for the following components in power electronics application: P IIS 'diode, Schottky diode, power MOSFET, IGBT, BJT or thyristor.
  • Figures 1-4 show a schematic representation of the deposition of a layer on a substrate
  • FIG. 5 shows a plant for producing a sealing layer
  • FIG. 6 shows an example of a component with the sealing layer.
  • FIG. 5 shows a system 20 for producing a sealing layer on a semiconductor device.
  • the vacuum chamber 4 has a substrate holder 6, on the substrates if necessary. Electronic components 1 are applied.
  • the temperature of the substrates to be coated is between 25 and 120 ° C during the coating.
  • a rotary drive 5 is arranged in the vacuum chamber 4, that the substrate holder 6 can be rotated about an axis 9.
  • the vacuum chamber 4 further has an electron beam evaporator 7 and a plasma source 8.
  • the installation in FIG. 5 is shown only by way of example. In use, the vacuum is in the range of 10 '3 to 10 "6 mbar.
  • the plasma source is a high-frequency, magnetfelduntcrconstitutede plasma source with Apassnet factory, which produces a quasi-neutral plasma jet.
  • Apassnet factory which produces a quasi-neutral plasma jet.
  • noble gas plasmas or oxygen plasmas may be used.
  • Borosilicate glass layers have, in addition to their high barrier effect to ambient moisture, a very good chemical resistance.
  • the residual stresses resulting from the plasma-assisted deposition in the layer of borosilicate glass in comparison to the layers of Polymers moderate.
  • borosilicate glass has very good electrical properties, for example, the dielectric strength of the layers is up to 250 V / ⁇ .
  • layers of e.g. Borosilicate glass with a thickness between see 50nm and some ⁇ ⁇ , preferably between lOOnm and ⁇ ⁇ produce.
  • the growth rate is in the range of 100 to 500 nm / min and is therefore higher than other depositions such as e.g. while sputtering.
  • the system 20 allows both direct deposition on the metallization of a semiconductor device, as well as deposition on other inorganic layers such.
  • Silicon nitride On their own, layers of silicon nitride do not have a sufficient barrier effect with respect to ambient moisture and, especially at high layer thicknesses, can strongly stress the component through the stress introduced into the layer composite
  • a borosilicate glass layer can be deposited on a glassy layer of aluminum oxide previously deposited by plasma-assisted electron beam evaporation.
  • Systems made of borosilicate glass have, as described above, a very high barrier action against moisture. In most cases, however, such systems include a proportion of alkaline components in the range of up to a few wt .-%. These alkaline components could migrate in the sometimes very strong electric fields in applications in power semiconductor devices in the boundary layer to the substrate and thus adversely affect the corresponding circuits of the device. This can be avoided, for example, by the deposition of specially synthesized alkali-free glass systems.
  • Alumina is plasma-assisted vaporizable and therefore the deposition can be made in the same system 20.
  • Aluminum oxide barrier layers may have a thickness between 50 nm and ⁇ ⁇ , preferably between 1 OOnm and 4 ⁇ .
  • Silicon nitride barrier layers are deposited in one aspect of the invention by sputtering or in a CVD process.
  • sputtered metallic films of titanium-tungsten or titanium which form a particularly dense nitride phase by additional introduction of nitrogen during the deposition process.
  • the glass layers described or the combination with other inorganic glassy layers have in general compared to the polymer layers used according to the prior art, such as polyimides, the advantage of an adapted to the substrate 1 expansion behavior.
  • a variant of the method can be provided to carry out the deposition of, for example, alumina and Borosilikatgias in the same system 20 in successive process steps.
  • a smooth transition of the different materials can be realized by co-evaporation from different sources.
  • the deposition in the same vacuum chamber 4 also has the advantage that the substrate 1 or the layer deposited first between the deposits can not incorporate ambient moisture, which could lead to a reduced layer adhesion of the last deposited layer or additional stresses in the layer composite.
  • a deposition of glassy Schichtaufdampfmaterialien at substrate temperatures below 120 ° C can be realized. This allows the direct coating of pre-structured resist masks and consequently a gentle additive structuring of the deposited inorganic layers by means of an advantageous lift-off
  • FIGS. 1-4 show a schematic representation of the deposition of an additively structured layer of a layer vapor deposition material on a substrate 1.
  • FIG. 1 shows the substrate 1 to be coated.
  • the substrate 1 may be e.g. a semiconductor substrate or a photovoltaic substrate.
  • FIG. 2 shows a representation of the substrate 1 with a photoresist layer 2 deposited thereon, which has microstructures corresponding to a negative image of the structured layer to be deposited. This PhotolackscMcht 2 is formed by lithography.
  • the substrate 1 with a deposited thereon layer of a Scht chtaufdamp m aterial 3 was shown.
  • this layer 3 can also be constructed in multiple layers from different materials.
  • Such various materials may include multi-component systems such as e.g. Borosilicate glass or one-component systems such as e.g. Be alumina.
  • Multicomponent systems of borosilicate glass of the following composition range are preferably suitable:
  • FIG. 4 shows an illustration of the substrate 1 from FIG. 3, the photoresist layer 2 being detached and the deposited layer of the vapor-deposited vapor material being structured on the substrate 1.
  • this layer can also be constructed in multiple layers of different materials.
  • FIG. 5 shows a schematic representation of the device for depositing a layer of a vapor deposition material, which is applied in this arrangement by means of a plasma-enhanced Elektronenstrahlaufdampfmaschines.
  • Fig. 6 shows an exemplary electronic component manufactured by the method.
  • FIG. 6 shows an IGBT, as from the patent application no. DE 10
  • the IGBT consists of a substrate 1, which is usually made of silicon. On the surface there are p-type regions 10. The p-type region 10 is embedded in an n-type region 11. In the p-type regions 10 each n-conducting regions 12 are provided. The surface of the substrate 1 is formed by an electrical insulation layer 13 of e.g. Covered with silicon dioxide. On this electrical insulation layer 13, a metallization 14 is formed by known methods. This metallization 14 contacts the p-type regions 10 and the n-type regions 12 with each other. In the insulating layer 13, additional electrodes 15 made of e.g. embedded polycrystalline silicon, which can produce a channel 16 when applying a voltage between the n-type regions 12 and 11.
  • additional electrodes 15 made of e.g. embedded polycrystalline silicon, which can produce a channel 16 when applying a voltage between the n-type regions 12 and 11.
  • the front side structure is covered by a barrier layer 3, which is manufactured according to this method.
  • This barrier layer 3 serves to protect the entire electronic component from ambient moisture.
  • this barrier layer 3 can also be formed as a multilayer system (composite) of, for example, aluminum oxide and a borosilicate glass layer.
  • This barrier layer 3 can also be structured in order, for example, to enable later contacting of the component via metal contacts (not shown).
  • p-type regions 17 and n-type regions 18 are formed in alternation, which are covered by a back-side metallization 19.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Physical Vapour Deposition (AREA)

Abstract

L'invention concerne un procédé de production d'une couche vitreuse (3) sur un substrat, par exemple un substrat d'un semi-conducteur de puissance (1). Ledit procédé comprend le dépôt en phase vapeur d'un matériau de couche vitreuse par bombardement électronique assisté par plasma. Ce procédé permet de fabriquer un composant électronique.
EP13718805.8A 2012-03-30 2013-04-02 Dispositif à semi-conducteur et procédé de production d'une couche vitreuse Withdrawn EP2831905A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201261617709P 2012-03-30 2012-03-30
PCT/EP2013/056950 WO2013144375A1 (fr) 2012-03-30 2013-04-02 Dispositif à semi-conducteur et procédé de production d'une couche vitreuse

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US (1) US20150014866A1 (fr)
EP (1) EP2831905A1 (fr)
JP (1) JP2015518519A (fr)
KR (1) KR20140143214A (fr)
CN (1) CN104380432A (fr)
WO (1) WO2013144375A1 (fr)

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EP3065164A1 (fr) 2015-03-04 2016-09-07 ABB Technology AG Agencement de semi-conducteur électrique et procédé de génération d'un tel agencement

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JP3336747B2 (ja) * 1994-06-09 2002-10-21 ソニー株式会社 絶縁膜の形成方法、並びに半導体装置の作製方法及び半導体装置
DE10222609B4 (de) * 2002-04-15 2008-07-10 Schott Ag Verfahren zur Herstellung strukturierter Schichten auf Substraten und verfahrensgemäß beschichtetes Substrat
JP2005527459A (ja) * 2002-04-15 2005-09-15 ショット アーゲー 構造化された表面を有する製品を作製する方法
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CN104380432A (zh) 2015-02-25
WO2013144375A1 (fr) 2013-10-03
JP2015518519A (ja) 2015-07-02
US20150014866A1 (en) 2015-01-15
KR20140143214A (ko) 2014-12-15

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