Classifications

• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
  • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
  • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
  • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
  • H10D89/911—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using passive elements as protective elements
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01C—RESISTORS
  • H01C1/00—Details
  • H01C1/14—Terminals or tapping points specially adapted for resistors; Arrangements of terminals or tapping points on resistors
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01C—RESISTORS
  • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
  • H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
  • H01C7/1013—Thin film varistors
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
  • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
  • H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
  • H02H9/041—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage using a short-circuiting device
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
  • H05K1/0213—Electrical arrangements not otherwise provided for
  • H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
  • H05K1/0257—Overvoltage protection
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W42/00—Arrangements for protection of devices
  • H10W42/60—Arrangements for protection of devices protecting against electrostatic charges or discharges, e.g. Faraday shields
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
  • H01G7/00—Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture
  • H01G7/06—Capacitors in which the capacitance is varied by non-mechanical means; Processes of their manufacture having a dielectric selected for the variation of its permittivity with applied voltage, i.e. ferroelectric capacitors
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
  • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
  • H02H9/04—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess voltage
  • H02H9/044—Physical layout, materials not provided for elsewhere
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/02—Details
  • H05K1/0213—Electrical arrangements not otherwise provided for
  • H05K1/0254—High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages
  • H05K1/0257—Overvoltage protection
  • H05K1/0259—Electrostatic discharge [ESD] protection
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K1/00—Printed circuits
  • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistors, capacitors or inductors
• • H—ELECTRICITY
  • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
  • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
  • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
  • H05K2201/07—Electric details
  • H05K2201/073—High voltage adaptations
  • H05K2201/0738—Use of voltage responsive materials, e.g. voltage switchable dielectric or varistor materials
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
  • H10W20/00—Interconnections in chips, wafers or substrates
  • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
  • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
  • H10W20/491—Antifuses, i.e. interconnections changeable from non-conductive to conductive

Definitions

• Embodiments disclosed herein generally relate to structures, methods and devices employing a voltage switchable dielectric material to achieve vertical switching protection against ESD and other overvoltage events.
• Chips Electronic devices are often fabricated by assembling and connecting various components (e.g., integrated circuits, passive components, chips, and the like, hereinafter “chips”.
• overvoltage conditions are sensitive to spurious electrical events that apply excessive voltage to the devices in what is termed an overvoltage condition.
• sources of overvoltage conditions include electrostatic discharge (ESD), back electromotive force (EMF), lightning, solar wind, switched electromagnetic induction loads such as electric motors and electromagnets, switched heavy resistive loads, large current changes, electromagnetic pulses, and the like.
• Overvoltage conditions may result in a high voltage at a device containing active and/or passive electronic components or circuit elements, such as a semiconductor IC chip, which may cause large current flow through or within the components. The large current flow may effectively destroy or otherwise negatively impact the functionality of such active or passive components or circuit elements.
• Some chips include "on-chip” protection against some overvoltage events (e.g., a mild ESD event) that may be expected during packaging of the chip or operation of the respective electronic device (e.g., protection against Human Body Model events).
• overvoltage events e.g., a mild ESD event
• a chip may be packaged (e.g., attached to a substrate).
• a packaged chip may be connected to
• additional (e.g., ex-chip) overvoltage protection devices that protect the packaged chip against more severe (e.g., higher voltage) overvoltage events.
• the off-chip overvoltage protection device may be required to "protect" the on-chip overvoltage protection device.
• Off-chip overvoltage protection devices using discrete components are difficult to add during manufacture of the substrate.
• on-chip protection is difficult to optimize across a complete system or subsystem. Examples of specifications for ESD testing include IEC 61000-4-2 and JESD22- A1 14E.
• a printed circuit board, printed wiring board, or similar substrate may be used to assemble, support, and connect electronic components.
• a PCB typically includes a substrate of dielectric material and one or more conductive leads to provide electrical conductivity among various attached components, chips, and the like.
• a pattern of metallic leads is plated (e.g., using printing technology such as silk-screening) onto the dielectric substrate to provide electrical connectivity.
• a metallic layer e.g., a layer of Cu, Ag, Au
• Multiple layers of conductive patterns and/or dielectric materials may be disposed on a PCB. The layers may be connected using vias.
• Printed circuit boards including 14 or more layers are not uncommon.
• a PCB is typically used for supporting and connecting various integrated electronic components, such as chips, packages, and other integrated devices.
• the PCB may also support and connect discrete components, such as resistors, capacitors, inductors, and the like, and provide connections between integrated and discrete components.
• discrete components such as resistors, capacitors, inductors, and the like.
• the conductive patterns and/or layers in the PCB and other components or areas within electronic devices sometimes provide paths for conducting overvoltage events that could damage or otherwise negatively impact components.
• FIG. 1 shows a horizontal switching VSDM formation comprising VSD material that may be used for ESD protection of electronic components.
• FIG. 2 shows a horizontal switching cylindrical formation comprising VSD material that may be used for ESD protection of electronic components.
• FIG. 3 illustrates a PCB and associated directional references used in connection with various
• FIG. 4A shows a VSDM formation that is adapted to achieve vertical switching using VSD material and that may be integrated in a substrate device, in accordance with an embodiment.
• FIG. 4B shows a VSDM formation comprising a VSD material layer that may be integrated in a PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment.
• FIG. 5 shows a VSDM formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• FIG. 6 shows a VSDM formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• FIG. 7 shows a method for producing one or more conductive structures, such as a layered
• FIG. 8 shows a graph with sample response voltage envelopes for a vertical switching VSDM
• FIG. 9 shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• FIG. 10 shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• FIG. 1 1 shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• FIG. 12A shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• FIG. 12B shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• FIG. 13 shows a VSDM formation comprising a VSD material layer that may be integrated in a
• PCB PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment.
• FIG. 14 shows a VSDM formation comprising a VSD material formation that may be integrated in a PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment.
• FIG. 15A shows a VSD material formation that is adapted to achieve vertical switching using VSD material in connection with one or more circuit elements, in accordance with an embodiment.
• FIG. 15B shows a VSD material formation that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• FIG. 16 shows a VSD material formation that is adapted to achieve vertical switching using
• FIG. 17 shows a bidirectional switching VSD material formation that is adapted to achieve both vertical and horizontal switching using VSD material, in accordance with an embodiment.
• Protection against ESD and other overvoltage events of a substrate device, electronic component and/or electronic device in accordance with various embodiments disclosed herein may include incorporating a voltage switchable dielectric material ("VSD material” or "VSDM”) in the respective substrate and/or device. While those skilled in the art will recognize that overvoltage events encompass multiple events, ESD (electrostatic discharge) may be used herein to generally describe an overvoltage event.
• VSD material voltage switchable dielectric material
• VSDM voltage switchable dielectric material
• the VSD material is embedded in the device as a layer or other structure that is adapted to conduct at least a portion of an ESD signal through the device to a ground or to another predefined point.
• a circuit element such as a filter is disposed between a vertical switching
• the circuit element may be embedded in a substrate device as a layer, a structure, or a via, or may be attached to a substrate as a surface mounted component.
• a VSD material in accordance with various embodiments disclosed herein is a material that exhibits nonlinear resistance as a function of voltage. While a VSD material exhibits nonlinear resistance, not all materials that exhibit nonlinear resistance are VSD materials. For example, a material for which resistance changes as a function of temperature but does not substantially change as a function of voltage would not be construed as a VSD material for purposes of embodiments disclosed herein. In various embodiments, VSD materials exhibit nonlinear resistance variation as a function of voltage and additional operating parameters such as current, energy field density, light or other electromagnetic radiation input, and/or other similar parameters.
• the variation of the resistance as a function of voltage exhibited by a VSD material includes a transition from a state of high resistance to a state of low resistance. This transition occurs at about a specific voltage value, which may be variously referred to as a "characteristic voltage,"
• the characteristic voltage may differ for various formulations of VSD material, but is relatively stable for a given formulation.
• the characteristic voltage for a particular formulation may be a function of voltage coupled with additional parameters such as temperature and/or incident electromagnetic energy at various wavelengths including optical, infrared, UV, or microwave.
• the characteristic voltage may be defined in terms of a corresponding "characteristic electric field” or “characteristic field” expressed in terms of voltage per unit of length (e.g., Volts per mil (V/mil), Volts per micrometer (V/um), etc.).
• VSD material structure of VSD material
• VSDM structure is intended to refer to any volume of VSD material with specific physical dimensions that can perform an electrical switching function.
• Examples of a structure of VSD material include a layer of VSD material (whether disposed on a substrate or cured as a standalone layer), a volume of VSD material bounded between two or more electrodes, a volume of VSD material bounded by two or more insulative or semiconductor structures, or any other element or configuration of VSD material that can switch between substantially nonconductive and substantially conductive states in response to a sufficiently large voltage variation.
• a VSD material structure may be produced by bounding a volume of a first VSD material with a first characteristic voltage between two other volumes of VSD materials with characteristic voltages that differ from the first characteristic voltages (the characteristic voltages of the two other volumes of VSD material may or may not be equal to each other).
• a VSD material structure may be produced by bounding a volume of a VSD material with a first characteristic voltage between (a) a volume of VSD material with a different characteristic voltage, and (b) one or more electrodes, insulative structures, and/or semiconductor structures.
• VSD material structure is a layer of VSD material disposed on a copper foil (but excluding the copper foil).
• a compound formation that comprises both the layer of VSD material and the copper foil may be denoted a "formation of VSDM.” More complex formations of VSDM are discussed below.
• VSD material structure is a coating, sheet or other layout of VSD material disposed as a horizontal layer in a PCB and bounded between two adjacent horizontal layers of the PCB (i.e., a horizontal layer above the VSD material structure, and a horizontal layer below the VSD material structure).
• a compound formation that comprises both this VSD material structure and the bounding two adjacent horizontal layers would be an example of a formation of VSDM.
• VSD material structure is a volume of VSD material disposed in a horizontal layer within a PCB and bounded between four structures disposed within the same horizontal layer of the PCB (e.g., four etched channels that delineate a rectangular VSD material structure) and between two electrodes disposed in the two adjacent horizontal layers (e.g., a conductive layer above and an insulative layer below).
• four structures disposed within the same horizontal layer of the PCB e.g., four etched channels that delineate a rectangular VSD material structure
• two electrodes disposed in the two adjacent horizontal layers e.g., a conductive layer above and an insulative layer below.
• a compound formation that comprises both this VSD material structure and the bounding four structures and two electrodes would be an example of a formation of VSDM.
• the characteristic voltage may be defined as specific voltage value (e.g., the characteristic voltage for this VSD material structure may be specified as a particular value in Volts).
• the characteristic voltage of a VSD material structure may be defined in terms of a characteristic electric field expressed as a voltage value per unit length, or as a characteristic voltage expressed as a specific voltage value when the VSD material is considered as a specific volume with certain known dimensional characteristics (e.g., a VSD material structure with a specific thickness across which voltage switching may occur).
• the descriptions in this patent may refer to characteristic fields or characteristic voltages of VSD materials in connection with various embodiments, and in each case the corresponding characteristic fields (in terms of Volts per unit length) or characteristic voltages (in terms of Volts) may be obtained through an appropriate conversion by taking into account the dimensional characteristics of the respective structures of VSD material.
• the characteristic voltage of that VSD material structure may be obtained by multiplying the characteristic field of that VSD material (in V/mil) by the corresponding gap across which switching will take place (in mils)).
• the characteristic voltage of that VSD material structure may be obtained by integrating the characteristic field of that VSD material throughout the gap across which switching will take place.
• the characteristic voltage of the VSD material across such gaps may not be directly or linearly correlated with the size of the respective gaps (e.g., in such embodiments, the respective characteristic voltages may be evaluated through direct measurements or through more complex simulations or approximations).
• the characteristic voltage of a VSD material structure may be a function of the amount, cross-sectional area, volume, depth, thickness, width and/or length of the VSD material structure that is disposed between the two points where the voltage is applied, and possibly also a function of the relative shape, geometry, density variation, and other analogous variables relating to the VSD material structure.
• a VSD material is substantially non-conductive (i.e., substantially insulative) at voltages below the respective characteristic voltage level, in which case it behaves substantially as an insulator or dielectric. This state may be referred to as a substantially nonconductive or insulative state.
• Voltages below the characteristic voltage level of a VSD material may be referred to as low voltages (at least relative to voltages above the characteristic voltage level).
• embodiments may also be construed as having attributes of a semiconductor, similar to
• a VSD material in accordance with various embodiments may behave substantially as an insulator for both positive and negative voltages when the magnitude of the voltage is below the characteristic voltage level.
• a VSD material in accordance with various embodiments disclosed herein behaves substantially as a conductor by having substantially no electric resistance, or relatively low resistance. This may be referred to as a substantially conductive state. Voltage above the characteristic voltage level may be referred to as high voltage.
• the VSD material is conductive or substantially conductive for both positive and negative voltages when the magnitude of the voltage is above the characteristic voltage level.
• the characteristic voltage may be either positive or negative, depending on the polarity of the voltage being applied.
• VSD material When a VSD material becomes substantially conductive in response to a voltage that exceeds its characteristic voltage, the VSD material could be said to "switch on.” When a VSD material becomes substantially non-conductive after removing a voltage that exceeds its characteristic voltage, the VSD material could be said to “switch off.” When a VSD material switches on or off, the VSD material could be simply said to "switch.”
• VSD material provided in various embodiments disclosed herein is approximated as having infinite resistance at voltages below the characteristic voltage, and zero resistance at voltages above the characteristic voltage.
• VSD materials typically have high, but finite resistance at voltages below the characteristic voltage, and low, but nonzero resistance at voltages above the characteristic voltage.
• the ratio of the resistance at low voltage to the resistance at high voltage may be expected to approach a large value (e.g., in the range of 10 3 , 10 6 , 10 9 , 10 12 , or higher). In an ideal model, this ratio may be approximated as infinite, or otherwise very high.
• VSD material provided in various embodiments disclosed herein exhibits high repeatability
• the VSD material behaves substantially as an insulator or dielectric (i.e., is substantially nonconductive and exhibits a very high or substantially infinite electric resistance) at voltages below the characteristic voltage level.
• the VSD material then switches to become substantially conductive when operated at voltages above the characteristic voltage level, then becomes again substantially an insulator or dielectric at voltages below the characteristic voltage.
• the VSD material can continue to alternate between these two operational states an indefinite number of times if the input voltage levels transition between voltages below the characteristic voltage and above the characteristic voltage.
• a VSD material While transitioning between these two operational states, a VSD material may experience a certain level of hysteresis, which may alter to a certain extent the characteristic voltage level, the switching response time, or other operational characteristics of the VSD material.
• the transition between the first (lower) voltage regime when the VSD material is substantially insulative and the second (higher) voltage regime when the VSD material is substantially conductive in accordance with embodiments disclosed herein is substantially predictable and is expected to be generally confined to a limited envelope of signal amplitudes and a limited range of switching times.
• the time that it takes a VSD material to transition from a state of substantial insulation to a state of substantial conductance in response to an input step function signal that rises above the characteristic voltage may be approximated as zero. That is, the transition may be approximated as substantially instantaneous.
• the time that it takes a VSD material to transition from a state of substantial conductance to a state of substantial non-conductance in response to an input step function signal that drops below the characteristic voltage may be approximated as zero. This reverse transition may also be
• a VSD material in accordance with various embodiments may direct an electrical signal to ground or to another predetermined point within the respective circuit, substrate or electronic device to protect an electronic component.
• the predetermined point is a ground, virtual ground, shield, safety ground, and the like.
• Examples of electronic components that may be operated with and/or protected by VSD materials in accordance with various embodiments disclosed herein include (a) circuit element, circuit structure, surface mounted electric component (e.g., resistors, capacitors, inductors), PCB or other circuit board, electronic device, electronic subsystem, electronic system, (b) any other electric, magnetic, microelectromechanical structure (MEMS) or similar element, structure, component, system and/or device, (c) any other unit that processes or transmits data and operates using electric signals or may be damaged by electric signals, and (d) any combination of the foregoing identified in (a), (b) and/or (c) above.
• MEMS microelectromechanical structure
• a VSD material may have a limited ability to conduct current or otherwise operate in the presence of high signal voltages, current intensities, and energy or power levels before being damaged, possibly irreversibly damaged. Additionally, a VSD material may also be damaged if an electric signal that is normally within operating specifications persists for too long (e.g., the VSD material may heat up while conducting such signals and eventually break down). For example, a VSD material may be able to function normally when exposed to an input signal with a voltage level of 10 KV that lasts less than 100 nanoseconds, but may be damaged if that signal continues to be applied for more than a few milliseconds.
• VSD material to tolerate high levels of voltage, current, power or energy before becoming damaged may depend on various factors, such as the particular composition of the VSD material, the specific characteristics of a corresponding VSD material structure (e.g., a VSD material structure with larger physical dimensions may be able to conduct higher current densities), the corresponding circuit architecture, the presence of other ESD protective components, and the characteristics of the device in which the VSD material is incorporated.
• VSD materials in accordance with various embodiments are polymer composites, and may include particulate materials such as metals, semiconductors, ceramics, and the like.
• Examples of various compositions of VSD materials that may be used in accordance with various embodiments are described in, for example, US Patent Application Numberl2/953,309 filed on November 23, 2010 and titled “Formulations for Voltage Switchable Dielectric Materials Having a Stepped Voltage Response and Methods for Making the Same," , US Patent Application Number 12/832,040 filed on July 7, 2010 and titled “Light-Emitting Diode Device For Voltage Switchable Dielectric Material Having High Aspect Ratio Particles," and US Patent Application Number 12/717, 102 filed on March 3, 2010 and titled “Voltage Switchable Dielectric Material Having High Aspect Ratio Particles,” and United States Patent 7,981,325 issued on July 19,201 1 and titled “Electronic Device For Voltage Switchable Dielectric Material Having High Aspect Ratio Particles.”
• VSD materials in accordance with various embodiments may include a matrix material and one or more types of organic and/or inorganic particles dispersed within the matrix material.
• embodiments may include organic polymers, such as silicone polymer, phenolic resin, epoxy (e.g., EPON Resin 828, a difunctional bisphenol A/epichlorohydrin derived liquid epoxy resin), polyurethane, poly(meth) acrylate, polyamide, polyester, polycarbonate, polyacrylamides, polyimide, polyethylene, polypropylene, polyphenylene oxide, polysulphone, ceramer (a solgel/polymer composite), and polyphenylene sulfone.
• organic polymers such as silicone polymer, phenolic resin, epoxy (e.g., EPON Resin 828, a difunctional bisphenol A/epichlorohydrin derived liquid epoxy resin), polyurethane, poly(meth) acrylate, polyamide, polyester, polycarbonate, polyacrylamides, polyimide, polyethylene, polypropylene, polyphenylene oxide, polysulphone, ceramer (a solgel/polymer composite), and polyphenylene sulfone
• Examples of particles incorporated in VSD materials in accordance with various embodiments may include conductive and/or semiconductive materials, including copper, aluminum, nickel, silver, gold, titanium, stainless steel, chrome, other metal alloys, T, Si, NiO, SiC, ZnO, BN, C (including in the form of diamond, nanotubes, and/or fullerenes), ZnS, Bi203, Fe203, Ce02, Ti02, A1N, and compounds of indium diselenide.
• Ti02 can be undoped or doped, for example with W03, where doping may include a surface coating.
• Such particles may have a shape ranging from spherical to highly elongated, including high aspect ratio particles, including carbon nanotubes (single walled and/or multi-walled), fullerenes, metal nanorods, or metal nanowires.
• high aspect ratio particles including carbon nanotubes (single walled and/or multi-walled), fullerenes, metal nanorods, or metal nanowires.
• materials that form nanorods and/or nano wires include boron nitride, antimony tin oxide, titanium dioxide, silver, copper, tin, and gold.
• embodiments may have aspect ratios in excess of 3 : 1, 10: 1, 100: 1, and 1000: 1. Materials with higher aspect ratios are sometimes called "High Aspect Ratio" particles or "HAR" particles.
• Carbon nanotubes are examples of super HAR particles, with aspect ratios of an order of 1000: 1 and more.
• Materials with lesser aspect ratios that may be incorporated in VSD materials in various embodiments include carbon black (L/D of any order of 10: 1) particles, and carbon fiber (L/D of an order of 100: 1) particles.
• the particles incorporated in VSD materials in accordance with various embodiments may have various sizes, including some nanoscale particles characterized by a smallest dimension equal to 500 nm or smaller, or even smaller (e.g., particles for which a smallest dimension is less than 100 nm or 50 nm).
• the particles incorporated in VSD materials in accordance with various embodiments may include an organic material. Incorporating organic materials within a VSD material may provide to the VSD material improved coefficients of thermal expansion and thermal conductivity, better dielectric constant, enhanced fracture toughness, better compression strength, and improved ability to adhere to metals.
• organic semiconductors that may be incorporated in VSD materials in various embodiments include forms of carbon such as electrically semiconducting carbon nanotubes and fullerenes (e.g., C60 and C70). Fullerenes and nanotubes can be modified, in some
• to be functionalized to include a covalently bonded chemical group or moiety examples include poly-3-hexylthiophene, polythiophene, polyacteylene, poly (3, 4- ethylenedioxythiophene), poly (styrenesulfonate), pentacene, (8-hydroxyquinolinolato) aluminum (III), and ,N'-di-[(naphthalenyl)-N,N'diphenyl]-l, 1 '-biphenyl-4,4'-diamine [NPD].
• organic semiconductors can be derived from the monomers, oligomers, and polymers of thiophene, analine, phenylene, vinylene, fluorene, naphthalene, pyrrole, acetylene, carbazole, pyrrolidone, cyano materials, anthracene, pentacene, rubrene, perylene, and oxadizole.
• Some of these organic materials may be photo-active organic materials, such as polythiophene.
• distributing particles substantially uniformly means that on the average the respective particles are distributed uniformly and/or randomly within the material, but it is certainly possible that in limited subportions of the polymeric composition nonuniform and/or non-random agglomerations of such particles may occur.
• the characteristic voltage of a VSD material structure disposed between two electrodes contacting the VSD material decreases as the distance between the electrodes decreases.
• the distance between the electrodes across which the VSD material may switch between substantially conductive and substantially nonconductive states in response to voltage variations that are sufficiently large could be denoted a "thickness,” “effective thickness,” “gap,” “switching gap,” or “effective gap.”
• the effective gap for a VSD material structure could be considered to be horizontal if the two electrodes are disposed in a substantially horizontal plane, or could be considered to be vertical if the two electrodes are disposed in different vertical planes and/or if the voltage switching takes place predominantly in a vertical direction.
• FIG. 1 shows a horizontal switching structure 100 comprising VSD material that may be used for
• electrodes 120 and 122 are in electrical contact with vias 130 and respectively 132.
• Electrode may be or may include any conductive structure.
• Examples of such electrodes or conductive structures include a pad, lead, trace, via (e.g., a through hole, a blind via, or a buried via), wire, conductive film, signal layer, conductive layer, conductive PCB layer (e.g., a conductive pre-preg or filler layer), or any other connector that is designed to be conductive and to provide electrical interconnection functionality in any substrate (e.g., such substrates could include any PCB or semiconductor packaging).
• one or both electrodes 120 and 122 may be omitted as long as an
• Electrode 120 and/or 122 may be manufactured out of copper or any other suitable conductive material. Electrode 120 and/or 122 may be manufactured through deposition, screen printing, adhesion, or any other bonding approach, whether mechanical, chemical, or otherwise.
• the electrodes 120 and 122 may be covered by an encapsulating material or formation, such as an insulating layer.
• an encapsulating material or formation such as an insulating layer.
• the electrodes 120 and 122 are illustrated as being embedded in an insulating layer 170.
• Via 130 and 132 are conductive structures that may penetrate fully or partially, or may completely cross the layer of VSD material 140.
• Via 130 and/or 132 could be a through hole, a blind via, a buried via, a trace, or any other conductive structure that is designed to be conductive and facilitate signal propagation in an electronic device.
• Via 130 and/or 132 may be manufactured out of copper or any other suitable conductive material.
• Via 130 and/or 132 may be manufactured through deposition, screen printing, adhesion, or any other bonding approach, whether mechanical, chemical or otherwise.
• Via 130 and/or 132 may be solid (e.g., a solid metallic structure), hollow (e.g., a conductive cylindrical formation), or may be hollow and partially or fully filled with a suitable conductive material (e.g., a hollow conductive cylindrical formation that is filled partially with a conductive material).
• a suitable conductive material e.g., a hollow conductive cylindrical formation that is filled partially with a conductive material.
• via 130 and/or 132 are filled partially or completely with VSD material.
• via 130 and/or via 132 may serve as either a vertical or a horizontal switching formation, in the sense that the respective via would normally act as a substantially insulative structure, but may become substantially conductive in response to a voltage that exceeds the characteristic voltage of the respective VSD material.
• the switching could take place either vertically along the respective via, or horizontally across the respective via.
• the layer of VSD material 140 is disposed on a substrate 160.
• the substrate 160 may be a conductive substrate (e.g., a layer, sheet or foil of copper or other conductive material), or an insulative substrate (e.g., a PCB pre-preg layer).
• the substrate 160 may be a substrate with variable conductivity, such as a layer of VSD material.
• a voltage source may be connected so that it produces a voltage
• the voltage source 110 is shown in FIG. 1 as a standalone voltage source, which could also be a current source, or any other source of electrical energy. Such an arrangement may be encountered in a testing setup, or in a specific architectural layout where the VSD material is intended to be activated intentionally by increasing the voltage generated by the voltage source 1 10.
• the voltage source 1 10 is illustrated in FIG. 1 as connected to via 130, which is in electrical contact with electrode 120, and a ground is illustrated as connected to via 132, which is in electrical contact with electrode 122. In various alternative applications and
• the voltage source 110 may be applied to via 132 and the ground may be applied to via 130.
• the voltage that is applied between the electrodes 120 and 122 may be any voltage signal or other electrical signal, including a voltage that is generated by an ESD event, as illustrated by the ESD pulse 1 12 shown in the embodiment of FIG. 1.
• the ESD pulse 112 may be expected to have a high voltage magnitude (e.g., in excess of a few hundred Volts, and possibly a few thousand Volts) and a short time duration (e.g., anywhere between nanoseconds and microseconds).
• the electrical current generated by the ESD pulse 1 12 may be expected to reach large amplitudes, possibly in excess of 10 Amperes.
• either electrode 120 or electrode 122 may be connected directly or indirectly to a ground plane (or another predetermined point within the circuit or device being protected), and if the ESD pulse 1 12 reaches the other electrode, the ESD pulse 112 may be guided to ground or to that predetermined point through the electrode connected to the ground or predetermined point.
• the VSD material 140 remains substantially nonconductive, and no significant current is conducted between the electrodes 120 and 122 through the VSD material 140 (except, possibly, for a certain amount of leakage current, which the VSD material 140 is normally designed to minimize so as not to impact the performance of the electronic device in which the structure of 100 may be deployed).
• the connecting lines between each of them and the electrodes 120 and 122 are shown with a dashed line.
• any voltage source, ESD signal, or other electrical source, overvoltage signal, or voltage potential may be applied between the two electrodes 120 and 122.
• Either of the two electrodes may also be connected to ground, or to a point with another reference voltage level.
• the polarity of the voltage source 110 may be in either direction between the electrodes 120 and 122.
• the VSD material 140 switches and becomes substantially conductive, and a significant amount of current is conducted between the electrodes 120 and 122 through the VSD material 140.
• the VSD material 140 can be said to switch in a "horizontal" direction or “lateral” direction.
• This horizontal or lateral direction is defined relative to the substrate 160, because the flow of electric current through the VSD material 140 takes place between via 130 and via 132, predominantly in a direction substantially parallel with the main plane of the substrate 160.
• the substrate 160 is a layer in a PCB, in which case horizontal switching means that the flow of electric current through the VSD material 140 takes place predominantly in a direction substantially parallel with the main surface of the PCB to which most of the components and electrical elements are mounted (or surfaces, in the case of a PCB for which components are attached on both sides).
• the VSD material 140 is designed to accommodate flow of electrical current in both directions between the electrodes 120 and 122, depending on the polarity of the voltage applied between the electrodes 120 and 122.
• the horizontal switching direction of the VSD material 140 is indicated by arrows 142.
• the substrate 160 e.g., a PCB or a PCB core
• the substrate 160 is actually a three dimensional structure, with a larger 2D plane (i.e., the plane defined by the surface or surfaces of a PCB to which components are attached) and a smaller height dimension
• the horizontal flow of current between electrodes 120 and 122 could be taking place in any direction that is substantially parallel with the larger 2D plane.
• horizontal switching means that current would flow in any direction that is substantially parallel with the X-Y plane shown in FIG. 3.
• Realizing that flow of current through a medium generally involves a 3D flow of charges, horizontal switching does not imply that all charges must flow only in a strict horizontal and planar direction. Instead, references to horizontal switching or to switching that occurs in a horizontal direction imply that the movement of charges is predominantly taking place along a plane that is substantially parallel with the main 2D plane of the substrate, but it is certainly possible and expected that at least a portion of the current flow would exhibit a certain amount of vertical movement. The vertical movement of charges may be easier to detect if a simulation or analysis were performed at a micro-level.
• horizontal switching means that at least two conductive structures, such as vias 130 and 132, are disposed in a substantially vertical dimension relative to the substrate, and that current flow occurs between the two vias predominantly in a direction substantially parallel with the main 2D plane of the substrate.
• the distance between electrodes 120 and 122 defines a gap of VSD material 140.
• This gap is denoted as gap 150 in FIG. 1.
• the horizontal gap for a horizontal switching VSDM formation is determined by the shortest electrical path across a structure of VSD material, and in FIG. 1, this shortest electrical path is determined by the edges of the electrodes 120 and 122 at the interface with the VSD material 140. If in an embodiment the electrodes 120 and 122 do not extend towards each other such the gap 150 shown in FIG. 1 is smaller than the distance between the vias 130 and 132, the VSD material 140 could instead switch in the horizontal gap between the vias 130 and 132.
• the characteristic field of VSD material 140 is defined in Volts/mil. In that embodiment, by defining a specific gap size for gap 150, the characteristic voltage for the structure of VSD material 140 disposed between via 130 and via 132 can then be determined in actual Volts.
• the structure shown in the embodiment of FIG. 1 includes a rectangular
• the structure shown in the embodiment of FIG. 1 includes a curved structure (e.g., the layer of VSD material 140 may be built as a substantially cylindrical formation).
• FIG. 2 shows a horizontal switching cylindrical structure 200 comprising VSD material 240
• conductive plane 230 and conductive plane 232 are disposed between two conductive planes (e.g., copper planes), denoted conductive plane 230 and conductive plane 232, which may be used for ESD protection of electronic components.
• the structure 200 is generally equivalent with a structure from the embodiment of FIG. 1 , but illustrates how various aspects show in FIG. 1 could be implemented in a curved architecture.
• the conductive plane 230 and conductive plane 232 are substantially concentric conductive structures separated by a volume of VSD material, in accordance with one embodiment. For simplicity, the substrate and electrodes are not shown in the embodiment of FIG. 2.
• the structure 200 shown in FIG. 2 represents a cross sectional view of a
• the annulus shown in FIG. 2 between the conductive planes 230 and 232 would be disposed substantially parallel with the X-Y plane shown in FIG. 3.
• the conductive planes 230 and 232 extend in a vertical direction, which for a PCB would be substantially parallel with the Z-axis shown in the embodiment of FIG. 3.
• a voltage source 210 or an ESD signal 212 could produce a voltage between the conductive planes 230 and 232. If this voltage exceeds the characteristic voltage of the VSD material 240, the VSD material would switch on, and the VSD material would change from being substantially nonconductive to becoming substantially conductive. In that case, significant current would flow between the conductive planes 230 and 232. For a concentric structure as shown in FIG. 2, the current flow would take place predominantly in a radial direction illustrated by the lines 242. With reference to the embodiment of FIG. 3, horizontal switching for the structure shown in FIG. 2 means that current would flow between the conductive planes 230 and 232 predominantly along a plane that is substantially parallel with the X-Y plane shown in FIG. 3.
• horizontal switching does not mean that current would be strictly limited to flows along planes substantially parallel with the main 2D dimension of a substrate. Instead, it is expected that given the 3D aspects of the vias, VSD material structures, and micro-level effects, a certain amount of current flow would occur in a vertical dimension. Nevertheless, horizontal switching means that current flow would indeed take place predominantly in a direction parallel with the main 2D plane of a substrate, such that useful electrical functionality may be achieved using current flowing in a horizontal direction through the VSD material 240.
• the characteristic field of VSD material 240 is defined in Volts/mil.
• the characteristic voltage for the structure of VSD material 240 disposed between conductive planes 230 and 232 can then be determined in actual Volts.
• the curved architecture of the structure 200 from the embodiment of FIG. 2 is more complex than the rectangular architecture of the structure 100 from the embodiment of FIG. 1, and consequently, to determine the actual characteristic voltage in Volts is more difficult for the structure 200.
• the characteristic voltage of the VSD material 240 is correlated with the size of the gap 250, and can be determined with a degree of certainty as a value in Volts.
• FIG. 3 illustrates a PCB and associated directional references used in connection with various
• the PCB 300 shown in FIG. 3 has a main horizontal plane defined by the X and Y axes, and a vertical dimension defined by the Z-axis.
• This reference coordinate system is defined independently of the actual orientation of the PCB in the physical space, such that rotation of the PCB in space does not change the horizontal plane and vertical dimension conventions defined here.
• This reference system may be discussed in more detail in this patent with respect to a PCB, such as the PCB 300 shown in FIG. 3, but applies analogously to any other substrate.
• a "substrate device” that may be protected by a VSDM formation against ESD or other overvoltage events, or into which a VSDM formation may be incorporated, means any PCB, any single layer or set of multiple layers of a PCB, the package of a semiconductor device, an LED substrate, an integrated circuit (IC) substrate, an interposer or any other platform that connects two or more electronic components, devices or substrates (where such connection may be vertical and/or horizontal), any other stacked packaging format (e.g., an interposer, a wafer-level package, a package-in-package, a system-in-package, or any other stacked combination of at least two packages or substrates), or any other substrate to which a VSD material formation can be attached or within which a VSD material formation may be incorporated.
• a substrate device may sometimes be denoted a "substrate.”
• FIG. 4A shows a VSDM formation 400 that is adapted to achieve vertical switching using VSD material and that may be integrated in a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor chip, in accordance with an embodiment.
• a VSDM formation comprising multiple layers, of which at least one layer is a layer of VSD material, may sometimes be referred to as a VSDM formation, or simply a VSDM formation.
• the formation 400 may be a cross sectional view showing various layers within a PCB, of a semiconductor package, or of another substrate device.
• a VSDM formation adapted to achieve vertical switching may also be referred to as a "vertical switching VSDM formation.”
• the formation 400 shown in FIG. 4A comprises two substrate layers 460 and 462, which are
• insulating layers incorporated in the PCB, a layer of VSD material 440, a conductive structure 430, and a conductive layer 432.
• the conductive structure 430 may be a via (e.g., a laser drilled via), a pad, a trace, or any other structure that is designed to be conductive and to facilitate propagation of electric signals.
• a via e.g., a laser drilled via
• pad e.g., a pad
• trace e.g., a trace
• the conductive layer 432 may be a signal layer or a ground layer integrated in a PCB. In one
• the conductive layer 432 is a conductive substrate on which the VSD material 440 was initially disposed (e.g., a copper foil on which the VSD material 440 was coated and cured).
• the VSDM formation 400 shown in FIG. 4A is disposed along the vertical dimension of a PCB, as indicated by the Z axis. With reference to the embodiment of FIG. 3, the Z axis shown in FIG. 4A is the same as the Z-axis shown in FIG. 3.
• vertical switching means that flow of current takes place in a direction substantially parallel with the vertical direction of a substrate.
• FIG. 4A means that if the VSD material 440 is switched on to become substantially conductive in response to a voltage that exceeds its characteristic voltage, current would flow between conductive structure 430 and the conductive layer 432 predominantly in a direction that is substantially parallel with the Z-axis shown in FIG. 3.
• vertical switching does not mean that current would be strictly limited to flows in a direction substantially parallel with the Z- axis (or vertical axis) of a substrate.
• the VSDM formation 400 further comprises a layered interconnect 434, which is disposed in contact with the conductive structure 430 and the VSD material 440.
• the layered interconnect 434 is a conductive feature that may be added in various embodiments to increase the cross-sectional conduction area at a boundary between conductive structures and VSD material formations, such as the boundary between the conductive structure 430 and the VSD material 440 shown in FIG. 4A. Addition of a layered interconnect at such a boundary may enhance the capacity of the respective conductive structures to carry higher currents, especially if the boundary has small physical features that may otherwise result in concentration of currents or electrical fields. This may be more desirable, for example, if the conductive structure 430has a smaller cross-sectional area at the point where it contacts the VSD material 440.
• a layered interconnect disposed between a conductive feature and a structure of VSD material may provide enhanced current flow between the conductive structure and the VSD material, improved mechanical properties for the interface between the conductive structure and the VSD material (e.g., increased adhesion or bonding, better thermal coefficient matching, etc.), improved electrical connection between the conductive structure and the VSD material, and other similar advantages.
• the layered interconnect 434 may be disposed to fully or partially separate the conductive structure 430 from the VSD material 440, or may be disposed at another boundary of the conductive structure 430 to provide an additional electrical path between the conductive structure 430 and the VSD material 440 (e.g., vertically).
• the layered interconnect 434 physically separates the conductive structure 430 and the VSD material 440.
• the layered interconnect 434 could be formed on top of the VSD material 440, and the conductive structure 430 could then be formed above the layered interconnect 434, avoiding the complete penetration of the layered interconnect 434 by the conductive structure 430.
• the layered interconnect 434 is in physical contact with the VSD material 440, and the layered interconnect 434 encapsulates a portion of the conductive structure 430 at the interface with the VSD material 440.
• the layered interconnect 434 is in physical contact with the VSD material 440, and the layered interconnect 434 encapsulates a portion of the conductive structure 430 at the interface with the VSD material 440.
• interconnect 434 could be formed on top of the VSD material 440, and the conductive structure 430 could then be formed above the layered interconnect 434, penetrating the layered interconnect 434 to establish direct physical contact between the conductive structure 430 and the VSD material 440 (e.g., by laser drilling a hole through the layered interconnect 434 all the way to the VSD material 440 and then filling that hole up with conductive material to produce a conductive via).
• FIG. 4B shows a VSDM formation 490 comprising a VSD material layer 498 that may be integrated in a PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment.
• the VSDM formation VSDM formation 490 shown in FIG. 4B includes the structural components of structure 430 shown in FIG. 4A and a number of additional features and layers.
• the VSDM formation 490 shown in FIG. 4B comprises a number of substrate layers that are
• pre-preg filler 480 generally insulative (or dielectric), illustrated as pre-preg filler 480, core 482, pre-preg filler 484, core 486, and pre-preg filler 488.
• the VSDM formation 490 shown in FIG. 4B also comprises a number of conductive signal layers, denoted as conductive layers LI through L6, and numbered as conductive layers 470, 472, 474, 476, 478, and 479. These signal layers may conduct electrical signals within the PCB board, or to or from components and circuit elements attached to the PCB, or may act as ground or other voltage reference points.
• the VSDM formation 490 shown in FIG. 4B also comprises two conductive structures, denoted as conductive structures 450 and 452. Either or both of the conductive structures 450 and 452 may be a via, a pad, a trace, or any other structure that is designed to be conductive and to facilitate propagation of electric signals.
• the VSDM formation 490 shown in FIG. 4B is disposed along the vertical dimension of a PCB, as indicated by the Z axis. With reference to the embodiment of FIG. 3, the Z axis shown in FIG. 4A is the same as the Z-axis shown in FIG. 3.
• a layered interconnect 499 is disposed at the interface between the conductive structure 452 and the VSD material 498.
• the layered interconnect 499 may be similar to the layered interconnect 434 from the embodiment of FIG. 4A.
• the layered interconnect 499 may provide various advantages for the interface between the conductive structure 452 and the VSD material 498, including those discussed in connection with the layered interconnect 434 from the embodiment of FIG. 4A.
• VSD material layer 498 If the VSD material layer 498 is exposed to a voltage between the conductive structure 452 and conductive layer 474 that exceeds its characteristic voltage, the VSD material comprised in the VSD material layer 498 will switch on, and will become substantially conductive. In that case, current would flow predominantly in a vertical direction, between the conductive structure 452 and conductive layer 474. If this happens, the VSD material layer 498 has switched vertically.
• the characteristic voltage of the VSD material layer 498 when measured in Volts is correlated with the gap size of the VSD material.
• this gap size would be substantially equal to the distance between the conductive structure 452 and the conductive layer 474, which also happens to be substantially the thickness of the VSD material layer 498.
• VSD material formulations used in various embodiments a smaller gap of VSD material generally results in a smaller characteristic voltage. Smaller characteristic voltages may be preferable for certain applications (e.g., for applications where the VSD material would be expected to switch in response to lower voltages).
• VSD material structure As a general design consideration, however, reducing the size of the gap of a VSD material must balance the risk that the VSD material structure becomes too small, and consequently loses some or all of its desirable operating characteristics (e.g., a VSD material structure that is too thin may exhibit decreased repeatability consistency when exposed to similar trigger voltages in rapid succession, may experience decreased capacity to dissipate heat, or may be subject to a higher risk of shorting or burnout).
• gap 150 from the embodiment of FIG. 1 and gap 250 from the embodiment of FIG. 2 may not be sufficiently small, or may be difficult to maintain accurately across PCBs running through a large volume commercial manufacturing line.
• horizontal switching VSDM formations on different PCB boards, or even on the same PCB board may exhibit undesirably high statistical variations in their respective characteristic voltages and/or operational robustness, and such variations may be more difficult to address using standard manufacturing technology and processes deployed in current production lines.
• vertical tolerances associated with VSDM formations may be easier to maintain accurately.
• the gap 442 would have a correspondingly consistent and accurate gap size. In practice, this could be achieved by employing advanced coating technology coupled with adequate inspection, metrology and monitoring processes.
• VSD material structures used to perform vertical switching may be produced with a larger cross-sectional area across which current flows when the VSD material becomes substantially conductive.
• a larger cross-sectional area will normally be able to carry higher currents, therefore resulting in better performance characteristics and endurance for the respective VSD material structure.
• the cross-sectional switching area of the VSD material 140 from the embodiment of FIG. 1 is proportional with the thickness of the VSD material layer measured in the vertical direction, which is usually small and will tend to produce a smaller cross-sectional area.
• the cross- sectional switching area of the VSD material 940 from the embodiment of FIG. 9 is proportional with the surface area of the electrode 920 as determined in the X-Y plane, which will tend to produce a larger cross-sectional area.
• the VSD material may be coated and cured on the substrate.
• the VSD material may be coated and cured on a conductive sheet of material (e.g., copper), and then the resulting cured VSDM formation could in introduced as a compound layer within a PCB, with the conductive sheet of material becoming conductive layer 432 and the layer of VSD material becoming the VSD material 440.
• the rest of the features shown in FIG. 4A may be formed through various manufacturing steps during the manufacturing process.
• VSD material formation VSDM formation
• formation of VSD material formation of VSDM
• VSD material stackup or “VSDM stackup”
• an insulative element e.g., a pre- preg or other insulative layer or structure in a PCB, an insulative layer or structure in a semiconductor package, etc.
• an electrode e.g., a conductive via in a PCB or a conductive connector in a semiconductor package
• a semiconductor element e.g., a structure build out of a semiconductor material, and/or (iv) a different VSD material structure.
• An example of a VSD material formation in a simpler configuration is the combination of a VSDM structure (e.g., a layer of VSD material) disposed on
• VSDM formations disclosed and/or claimed in this patent in connection with various embodiments, including the VSDM formation 400 of the embodiment of FIG. 4A, the VSDM formation 490 of the embodiment of FIG. 4B, the VSDM formation 500 of the embodiment of FIG. 5, the VSD material formation 600 of the embodiment of FIG. 6, the VSD material formation 900 of the embodiment of FIG. 9, the VSD material formation 1000 of the embodiment of FIG. 10, the VSD material formation 1 100 of the embodiment of FIG. 11, the VSD material formation 1200 of the embodiment of FIG. 12A, the VSD material formation 1300 of the embodiment of FIG. 13, the VSD material formation 1400 of the embodiment of FIG. 14, the VSD material formation 1500 of the embodiment of FIG. 15 A, the VSD material formation 1600 of the embodiment of FIG. 16, and the bidirectional switching structure 1700 of the embodiment of FIG. 17.
• Coating and curing a VSD material structure on a substrate, such as a layer of VSD material may be achieved through a sequence of steps.
• a sequence of steps such as the following steps may be used:
• VSD material structure such as a layer of VSD material.
• Such other methods include deposition, screen printing, die coating, comma coating, lamination, mechanical adhesion (e.g., by pre-curing the VSD material in a layer and then attaching it to the substrate), or through any other bonding approach, whether mechanical, chemical, or otherwise.
• the resulting VSD material formation would comprise a layer of VSD material disposed on top of a substrate (whether conductive or not), with the VSD material in a cured state and capable of performing its voltage switching function.
• the VSD material may be coated onto a layer of the PCB during the actual manufacturing process of a PCB.
• the conductive layer L3 474 may be attached to the pre-preg filler 484 during the manufacturing of the VSDM formation 490, and then a layer of VSD material 498 may be disposed and cured on the conductive layer L3 474.
• the layered interconnect 434 may then be formed (e.g., screen printed) on top of the VSD material 498.
• the core 482 may then be attached to the layer of VSD material 498, with the conductive structure 452 being subsequently formed within the core 482 or having been already produced within the core 482 before attachment.
• FIG. 5 shows a VSDM formation 500 that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• the VSDM formation of FIG. 5 may be integrated in a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor chip.
• the VSDM formation 500 of FIG. 5 comprises a set of conductive layers 520 and 522, which may be conductive signal layers in a PCB or other electrodes.
• the VSDM formation 500 of FIG. 5 further comprises a layer of VSD material 540.
• a layered interconnect 530 is disposed between the conductive layer 520 and the VSD material 540.
• a layered interconnect 532 is disposed between the VSD material 540 and the conductive layer 522.
• either one or both of the layered interconnects 530 and 532 are absent, in which case the VSD material 540 is in direct physical contact with one or both conductive layers.
• a "layered interconnect" is any conductive structure that may be used as part of, or in connection with a vertical switching VSDM formation to transmit voltage and/or current along an electrical path that includes one or more VSDM structures.
• a layered interconnect is disposed to provide conduction in a horizontal direction (e.g., within a horizontal layer).
• a layered interconnect is disposed to provide conduction in a vertical direction (e.g., across one or more horizontal layers, and/or between two or more horizontal layers).
• a layered interconnect is disposed to provide conduction both horizontally and vertically, and/or obliquely.
• layered interconnects such as layered interconnects 530 or 532 from FIG. 5, may be produced using any suitable process, including through screen printing, stencil printing, deposition, adhesion, lamination using heat and/or pressure, through any other physical attachment (e.g., gluing or bonding), or by pre-building the layered interconnect into a substrate (e.g., disposing the layered interconnect as a layer, structure, conductive core or pre-preg within a PCB or as a layer or conductive structure within a semiconductor package).
• the substrate attached to a layer of VSD material (e.g.
• the copper foil used as a substrate for a layer of VSD material may act as a layered interconnect to provide horizontal conductivity within a PCB or other substrate.
• a layered interconnect suitable for use in connection with various vertical switching VSDM formation embodiments may be produced through any mechanical, chemical, or other suitable deposition processes.
• layered interconnects may have a range of impedances.
• a layered interconnect with negligible impedance e.g., a highly conductive film that has very low resistance and does not introduce any significant voltage drop.
• a layered interconnect may be intentionally constructed to have a higher impedance and introduce a specific voltage drop when current flows through it (e.g., a layer interconnect may be designed to be an embedded circuit element, or may include an embedded circuit element).
• An example of a layered interconnect with a resistance that would normally not be considered negligible would be a conductive film with a resistance between 25 and 1000 Ohms.
• a layered interconnect may be constructed to be the element 1592 from the embodiment of FIG. 15 A, or may be modeled to operate as the element 1592 from the embodiment of FIG. 15 A.
• a layered interconnect that has a non-negligible electrical resistivity may be manufactured in
• a carbon filled epoxy or as a nickel-chromium alloy deposited on copper (e.g., a thin film resistive layer thermally deposited on copper foil).
• a layered interconnect may be manufactured out of a material or
• a layered interconnect may be made out of any material or combination of materials that can conduct current and that is fit for use in connection with a substrate application.
• a Z-axis conductive tape manufactured by 3M Corporation and marketed under the trade name "3MTM Z-Axis Electrically Conductive Tape 9703."
• 3MTM Z-Axis Electrically Conductive Tape 9703. When disposed as a substantially horizontal layer, a Z-axis conductive tape exhibits anisotropic vertical conductivity along the Z-axis such that it is substantially conductive when propagating current along the Z-axis, but substantially insulative horizontally.
• layered interconnects 530 or 532 Other examples of materials that may be used to make a layered interconnect in connection with present embodiments, such as layered interconnects 530 or 532, are silver paste, copper paste, other metallic types of paste, a silver coated copper layer, a carbon layer, a ferroic material or a compound that includes ferrites, a conductive epoxy or polymer, or any other material layer, structure or connector capable of conducting current.
• the layered interconnect may be used in connection with vertical switching VSDM formations in various embodiments to conduct current in horizontal, vertical and/or oblique directions, depending on the particular architecture of the respective embodiment.
• a voltage source may be connected between conductive layers 520 and 522.
• the voltage source 510 is shown in FIG. 5 as a stand-alone voltage source, which could also be a current source, or any other source of electrical energy. Such an arrangement may be encountered in a testing setup or in a specific architectural layout where the VSD material is intended to be activated intentionally by increasing the voltage generated by the voltage source 510.
• the voltage that is applied between conductive layers 520 and 522 may be any voltage signal or other electrical signal, including a voltage that is generated by an ESD discharge, as illustrated by the ESD pulse 512 shown in the embodiment of FIG. 5.
• the ESD pulse 512 may be expected to have a high voltage magnitude (e.g., in excess of a few hundred Volts, and possibly a few thousand Volts) and a short time duration (e.g., anywhere between nanoseconds and microseconds).
• the electrical current generated by the ESD pulse 512 may be expected to reach large amplitudes, possibly in excess of 10 Amperes.
• one of the conductive layers 520 and 522 may be connected to a ground plane (or another predetermined point within the circuit or device being protected), and the ESD pulse 512 may be guided to reach ground or that predetermined point.
• the VSD material 540 remains substantially nonconductive, and no significant current is conducted between the conductive layers 520 and 522, through the layered interconnects 530 and 532, and through the VSD material 540 (except, possibly, for a certain amount of leakage current, which the VSD material 540 is normally designed to minimize so as not to impact the performance of the electronic device in which the structure of 500 may be deployed).
• the connecting lines between each of them and the conductive layers 520 and 522 are shown with a dashed line.
• any voltage source, ESD signal, or other electrical source, overvoltage signal, or voltage potential may be applied between the conductive layers 520 and 522. Either of the two conductive layers may also be connected to ground, or to a point with another reference voltage level.
• the VSD material 540 switches and becomes substantially conductive, and a nontrivial amount of current is conducted between the conductive layers 520 and 522 through the VSD material 540.
• the characteristic field of the VSD material is defined in terms of Volts per mil (V/mil) (or otherwise in terms of Volts per unit length)
• the characteristic voltage for a layer of VSD material with a given thickness may be determined as a specific voltage value. For example, if the thickness of the layer of VSD material 540 across the gap 542 in the embodiment of FIG. 5 is denoted T and the characteristic field of the VSD material expressed in Volts per mil is denoted ECH, the corresponding characteristic voltage value expressed in Volts is denoted VCH and may be expressed as follows:
• VCH (V) ECH (V/mil) * T (mil) (Eq. 1)
• the characteristic field ECH may not be constant across the respective gap of the VSD material, and may have a value that varies across the thickness of the VSD material structure.
• the characteristic voltage VCH could be obtained by integrating the characteristic field ECH across the corresponding thickness T.
• the characteristic voltage of the VSD material structure 540 is correspondingly reduced.
• Exemplary values that could be used for the thickness of the VSD material 540 in industrial application for mobile phones include values below 2 mils.
• the thickness of the layer of VSD material 540 may be reduced below 1 mil.
• the impedances of the layered interconnects 530 and 532 and of the conductive layers 520 and 522 are negligible, there is no significant voltage drop across those conductive layers and layered interconnects, and therefore the VSD material 540 switches on and becomes substantially conductive after the voltage produced by the voltage source 510 or ESD pulse 512 reaches the characteristic voltage of the layer of VSD material 540.
• FIG. 6 shows a VSDM formation 600 that is adapted to achieve vertical switching using VSD
• the VSDM formation of FIG. 6 may be integrated in a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor chip.
• the VSDM formation 600 of FIG. 6 comprises a set of conductive layers 620 and 622, which may be conductive signal layers in a PCB or other electrodes.
• the VSDM formation 600 of FIG. 6 further comprises a VSD material structure 640, which is disposed as a layer with a thickness substantially equal to the gap 642, denoted T.
• a layered interconnect 630 is disposed between the conductive layer 620 and the VSD material structure 540.
• the conductive layer 622 is in physical and electrical contact with the VSD material
• VSD material used is adjusted accordingly to exhibit enhanced elastic properties. For example, as a general guidelines, reducing the metal particle content in a VSD material (e.g., by reducing or removing metal particles dispersed within the VSD material) reduces the brittleness of the VSD material once cured, and therefore makes the VSD material more suitable for flexible applications.
• VSD material formations can be further adapted for implementation in flexible applications by the addition of one or more layers with appropriate mechanical and/or
• Polyimide materials are generally lightweight and flexible, have higher mechanical elongation and tensile strength, and tend to have improved resilience against heat and chemical reactions.
• Polyimide materials are used in the electronics industry to manufacture flexible electrical cables, as an insulating or passivation layer in the manufacture of digital semiconductor and MEMS chips, as insulating films, as high-temperature adhesives, for medical tubing applications, and for other applications where flexibility, lower weight and improved environmental resilience are desired.
• FIG. 6 Another application for a vertical switching VSD material formation that incorporates heat- resistant materials, such as the as polyimide substrates 680 and 682 included in the VSD material formation 600 shown the embodiment of FIG. 6, is high-heat applications, such as LED panels or electronic applications operating in areas with higher environmental temperatures (e.g., hot climates) or in devices with limited ventilation (e.g., enclosed or embedded electronic devices or systems with limited or no cooling).
• high-heat applications such as LED panels or electronic applications operating in areas with higher environmental temperatures (e.g., hot climates) or in devices with limited ventilation (e.g., enclosed or embedded electronic devices or systems with limited or no cooling).
• the operation and electrical behavior of the VSDM formation 600 shown in FIG. 6 are generally analogous with the operation and electrical behavior of the VSDM formation 500 shown in FIG. 5.
• the VSD material 640 when a voltage is applied between the conductive layers 620 and 622, no significant voltage drops are expected to occur within the conductive layers 620 and 622 or within the layered interconnect 630 as long as their respective impedances are negligible, and therefore the VSD material 640 would switch on and become substantially conductive when the voltage applied by the voltage source 610 (or alternatively by the ESD pulse 612) exceeds the characteristic voltage of the VSD material 640.
• the characteristic voltage of the VSD material 640 will be proportional with the thickness T of the VSD material 640.
• FIG. 7 illustrates a method for forming a vertically switching VSDM formation that includes a layered interconnect or other electrode in accordance with an embodiment.
• the method 700 comprises various steps that may be used to produce one or more conductive structures, such as one or more layered interconnects or other electrodes, within a vertically switching VSDM formation. Additional optional steps may be applied to further refine the resulting VSDM formation.
• a method for producing various devices such as an LED device, by electroplating with VSD
• a VSD material is applied to a substrate or surface (e.g., to a copper foil).
• a layer of non-conductive material is disposed over the VSD material (e.g., a layer of photoresist material).
• the non-conductive layer is patterned with a specific pattern that will define one or more conductive structures, such as a layered interconnect or other electrode.
• the patterning in step 730 may define the position and shape of the layered interconnect 434 from the embodiment of FIG. 4A, which is to be disposed on top of the layer of VSD material 440.
• the nonconductive layer is a photoresist layer, and the pattern is produced by exposing the photoresist to a laser through a photomask, followed by an etching process. Either positive or negative photoresist processes may be used, as known in the art.
• one or more areas of the VSD material will become exposed through the non-conductive layer
• step 740 a voltage that exceeds the characteristic voltage of the VSD material is applied.
• This voltage may be applied either directly to the VSD material or to the conductive substrate on which the VSD material is disposed (e.g., to a copper foil).
• the applied voltage may be a constant voltage or a variable voltage, (e.g., pulsed).
• an ion deposition process takes place at step 750 to form conductive structures (e.g., a layered interconnect such as the layered interconnect 434 from the embodiment of FIG. 4A) within the exposed areas of the VSD material pattern.
• conductive structures e.g., a layered interconnect such as the layered interconnect 434 from the embodiment of FIG. 4A
• Various known deposition processes may be performed to deposit ionic media into at least some of the exposed areas defined by the pattern of the exposed VSD material.
• an electroplating process is performed, where the exposed areas of VSD material are submerged into an electrolytic solution.
• ionic deposition is performed using a powder coating process.
• power particles are charged and applied to the exposed areas of the VSD material that is in a substantially conductive state.
• the application of the powder may be accomplished by depositing the powder on the exposed areas, or by submerging the substrate in a powder bath.
• Ionic media may be any organic or organic
• the solution may be applied to the substrate while the VSD material is conductive.
• the application of the spray may include the use of ink or paint.
• PVD physical vapor deposition
• CVD chemical vapor deposition
• the non-conductive material is optionally removed from the substrate, so as to leave the formed conductive structures (e.g., a layered interconnect or another electrode used within a vertically switching VSDM formation).
• the formed conductive structures e.g., a layered interconnect or another electrode used within a vertically switching VSDM formation.
• a base solution e.g. KOH
• water is applied to the substrate to remove the photoresist material.
• a polishing step may be applied to the resulting VSDM formation.
• a chemical mechanical polish is used to polish a substrate of a resulting VSDM formation.
• FIG. 8 shows a graph 800 with sample response voltage envelopes for a vertical switching VSDM formation, such as the VSDM formation 500 sown in FIG. 5 or the VSDM formation 600 shown in FIG. 6, in accordance with an embodiment.
• the voltage response curves 820 shown in FIG. 8 were obtained by measuring the voltage across a layer of VSD material having a vertical gap of 2 mils while repeatedly applying an input voltage in the form of a transmission line pulse ("TLP"). For example, in the embodiment of FIG. 5, this measurement could be achieved by measuring the voltage at the conductive layer 520 relative to the conductive layer 522, with the voltage source 510 applying the TLP.
• TLP transmission line pulse
• the measurement of the response voltage of a VSDM formation in response to a TLP may be processed using a TLP generator and an oscilloscope as follows:
• a TLP generator sends a pulse down a coaxial cable transmission line towards an
• an oscilloscope captures the TLP as it travels towards the target electrode of the VSDM formation
• a computer may be used to process the TLP and the reflection signal to evaluate the characteristic voltage of the VSDM formation across the respective gap.
• the response curves 820 shown in the portion 802 of the graph are displayed over a longer time scale.
• the response curves 822 shown in the portion 804 of the graph are the response curves 820 displayed over a shorter time scale of 16 nanoseconds.
• the TLP voltage input is shown as signal 810, and respectively signal 812.
• the characteristic voltage of the VSD material layer can be estimated from the graph 800 to be between 150 V and 220 V.
• FIG. 9 shows a VSD material formation 900 that is adapted to achieve vertical switching using
• the vertical switching VSD material formation 900 of FIG. 9 may be integrated in any electronic device that includes a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor chip, to provide protection against ESD and other overvoltage events.
• FIG. 9 shows a cross section of the VSD material formation in a vertical direction of a substrate, such as a PCB.
• the VSD material formation 900 of FIG. 9 comprises a set of electrodes 920 and 922.
• VSD material structure 940 which is shown as a layer in the embodiment of FIG. 9.
• the layer of VSD material 940 has a thickness substantially equal to the gap 942, denoted T.
• T may take a range of values, depending on the formulation of the VSD material 940 and of the characteristic voltage and other physical or operational properties desired for the VSD material 940. Specific exemplary values for T include 2 mils, 1.5 mils, 1 mil, and 0.5 mils. In general, smaller values of T are expected to provide lower characteristic voltages for the VSD material structure 940.
• a via 930 crosses though the layer of VSD material 940 and is in contact with electrode 922.
• the via 930 is substantially conductive.
• a layered interconnect 970 is disposed in contact with the layer of VSD material 940 along a horizontal plane opposite to the electrodes 920 and 922.
• Various layered interconnects that could be used to implement layered interconnect 970 were discussed in connection with the embodiment of FIG. 5, except that a Z-axis layered interconnect that prevents efficient current flow in a horizontal direction would not be appropriate for this particular implementation.
• the layered interconnect 970 is disposed within a pre-preg layer 980.
• the pre-preg 980 is part of a substrate device, such as a PCB, and is in physical contact with another layer of that substrate, core 982.
• Pre-preg 980 is substantially insulative.
• the via 930 and the layered interconnect 970 are substantially conductive and could generally be assumed to have negligible impedance. Consequently, voltage propagates without significant loss between the electrode 922 and the layered interconnect 970.
• VSD material 940 becomes substantially conductive. Because the electrode 922 and the layered interconnect 970 will be at substantially the same voltage level, current flow across the VSD material 940 will take place predominantly in a vertical direction between the electrode 920 and the layered interconnect 970. One reason for this is that electrical current tends to choose the path with minimal impedance for propagation, and crossing the layer of VSD material 940 vertically between the layered interconnect 970 and the electrode 920 will generally provide that minimum-impedance path.
• VSD material structure 940 is switching vertically in the embodiment of FIG. 9 does not necessarily mean that current will flow strictly and solely along the Z-axis across the gap 942. Instead, due to various effects as discussed in more detail in connection with the embodiment of FIG. 3, a certain level of current flow may occur in a horizontal direction within the VSD material structure 940. But in general, when the VSD material 940 switches to become substantially conductive in the embodiment of FIG. 9, the current flow will place predominantly in a direction substantially parallel with the Z-axis (or vertical axis) of the respective substrate.
• the characteristic voltage of the VSD material structure 940 will be determined by the thickness T of the gap 942.
• this characteristic voltage may be determined in accordance with equation Eq. 1.
• An advantage of the vertical switching VSDM formation 900 shown in the embodiment of FIG. 9 is that the electrodes 920 and 922 may be disposed with limited accuracy in a horizontal direction. This is because their specific placement horizontally is not critical as long as sufficient overlap exists between the electrode 920 and the layered interconnect 970, and as long as the electrode 922 is in good electrical contact with the via 930.
• FIG. 9 is that metallic electrodes (e.g. made out of copper), such as the electrodes 920 and 922, may be disposed in an outer layer, therefore facilitating heat dissipation and/or conduction of power for LED devices or for other devices that could benefit from improved thermal cooling.
• metallic electrodes e.g. made out of copper
• the electrodes 920 and 922 may be disposed in an outer layer, therefore facilitating heat dissipation and/or conduction of power for LED devices or for other devices that could benefit from improved thermal cooling.
• the vertical switching VSDM formation shown in FIG. 9 may be
• the characteristic voltage of the VSD material is determined by the vertical thickness of the formation VSD material.
• FIG. 10 shows a VSD material formation 1000 that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• the vertical switching VSD material formation 1000 of FIG. 10 may be integrated in any electronic device that includes a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor chip, to provide protection against ESD and other overvoltage events.
• FIG. 10 shows a cross section of the VSD material formation in a vertical direction of a substrate, such as a PCB.
• the vertical switching VSD material formation 1000 of FIG. 10 is generally similar to the VSD material formation 900 of FIG. 9, except that instead of the single VSD material structure 940 in the embodiment of FIG. 9, there are two VSD material structures in the embodiment of FIG. 10: a layer of VSD material 1040 with a vertical thickness Tl across gap 1042, and a layer of VSD material 1044 with a vertical thickness T2 across a gap 1046.
• Tl and T2 may take a range of values, depending on the formulations of the VSD materials 1040 and 1044, and depending on the characteristic voltage and other physical or operational properties desired for the VSD material structures 1040 and 1044.
• the formulations of the VSD materials 1040 and 1044 may or may not be the same.
• the vertical thicknesses Tl and T2 of the VSD materials 1040 and respectively 1044 may or may not be the same.
• Specific exemplary values for the sum of Tl and T2 include 2 mils, 1.5 mils, 1 mil, and 0.5 mils. In general, smaller values for Tl and/or T2 are expected to provide lower characteristic voltages for the VSD material structures 1040 and/or 1042.
• two or more VSD material structures that are used to produce a compound set of VSD material structures as part of a vertical switching VSDM formation may have the same, substantially the same, or different properties relative to each other, including dielectric constants, adhesion characteristics, stiffness, flexibility, composition and thickness.
• the VSD material formation 1000 of FIG. 10 comprises a set of electrodes 1020 and 1022.
• the electrodes 1020 and 1022 are disposed in contact with the first VSD material structure, which is shown in FIG. 10 as the layer of VSD material 1040.
• a via 1030 crosses though the layers of VSD material 1040 and 1044, and is in contact with electrode 1022.
• the via 1030 is substantially conductive.
• a conductive layer 1070 is disposed in contact with the layer of VSD material 1044 along a horizontal plane opposite to the electrodes 1020 and 1022.
• the conductive layer could be made out of a conductive material (e.g., copper), or could be a layered interconnect.
• Various layered interconnects that could be used to implement conductive layer 1070 were discussed in connection with the embodiment of FIG. 5, except that a Z-axis layered interconnect that prevents efficient current flow in a horizontal direction would not be appropriate for this particular implementation.
• the conductive layer 1070 is disposed adjacent to a pre-preg layer 1080.
• the pre-preg 1080 is part of a substrate device, such as a PCB or a flexible circuit, and is in physical contact with another layer of that substrate, core 1082.
• Pre-preg 1080 is substantially insulative.
• the via 1030 and the conductive layer 1070 are substantially conductive and could generally be assumed to have negligible impedance. Consequently, voltage propagates without significant loss between the electrode 1022 and the conductive layer 1070.
• VSD materials 1040 and 1044 become substantially conductive. Because the electrode 1022 and the conductive layer 1070 will be at substantially the same voltage level, current flow across the VSD materials 1040 and 1044 will take place predominantly in a vertical direction between the electrode 1020 and the conductive layer 1070. One reason for this is that electrical current tends to choose the path with minimal impedance for propagation, and crossing the layers of VSD material 1040 and 1044 vertically between the conductive layer 1070 and the electrode 1020 will generally provide that minimum-impedance path.
• the VSDM formation 1000 shown in the embodiment of FIG. 10 will switch vertically, with current flow taking place through the VSD material structures 1040 and 1044 predominantly in a direction substantially parallel with the Z-axis (or vertical axis) of the respective substrate.
• the characteristic voltage of the compound VSD material structure formed by the two different VSD material structures 1040 and 1044 will be determined by the formulations of the two VSD materials and by the thickness Tl of the gap 1042 and respectively the thickness T2 of the gap 1046.
• this compound characteristic voltage may be determined by adding the individual characteristic voltages of the VSD material structures 1040 and 1044 across the gap 1042, and respectively gap 1046.
• the effective characteristic voltage of the compound set of VSDM structures is correlated with the sum of the individual thicknesses of the VSD material structures, such that as the total compound thickness increases, the resulting compound characteristic voltage also tends to increase.
• the vertical switching VSDM formation shown in FIG. 10 may be
• the characteristic voltage of the compound set of VSD material structures is determined by the total vertical thickness of the individual VSD material structures and by the characteristic voltage of each VSD material.
• FIG. 1 1 shows a VSD material formation 1100 that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• the vertical switching VSD material formation 1100 of FIG. 1 1 may be integrated in any electronic device that includes a substrate device to provide protection against ESD and other overvoltage events.
• Examples of substrate devices in which the VSD material formation 1 100 may be integrated in various embodiments include a PCB and the packaging of a semiconductor chip.
• FIG. 1 1 shows a cross section of the VSD material formation in a vertical direction of a substrate device.
• the vertical switching VSD material formation 1 100 of FIG. 1 1 is generally similar to the VSD material formation 1000 of FIG. 10, except that instead of the two VSD material structures from the embodiment of FIG. 10, the embodiment of FIG. 1 1 incorporates a single layer of VSD material 1 140, with a vertical thickness T across gap 1 142. Nevertheless, in various embodiments, multiple layers of VSD material may be utilized, as generally described in connection with the embodiment of FIG. 10. For commercial implementations, T may take a range of values, depending on the formulations of the VSD material 1140, and depending on the characteristic voltage and other physical or operational properties desired for the VSD material 1 140.
• thickness T Specific exemplary values for the thickness T that could be considered for implementation in manufacturing processes include 2 mils, 1.5 mils, 1 mil, 0.5 mils, 0.2 mils, and smaller. In general, smaller values for T are expected to provide lower characteristic voltages for the VSD material structure 1 140.
• the VSD material formation 1 100 of FIG. 11 comprises a set of electrodes 1120 and 1122.
• the electrodes 1 120 and 1 122 are disposed in contact with the VSD material structure 1 140.
• a conductive pre-preg layer 1 170 is disposed in contact with the layer of VSD material 1 140, along a horizontal plane opposite to the electrodes 1 120 and 1122.
• the conductive pre-preg layer could be a layer in a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor device.
• the conductive pre-preg layer 1 170 is or includes a layer and/or set of conductive structures adapted to conduct electric current with minimal or no losses.
• the conductive pre-preg layer 1170 is in physical contact with another layer of that substrate, core 1182.
• Core 1 180 is substantially insulative.
• VSD material 1140 becomes substantially conductive. Current flow across the VSD material 1140 will take place predominantly in a vertical direction between the electrode 1120 and the conductive pre- preg layer 1070, and between the electrode 1 122 and the conductive pre-preg layer 1170.
• the VSD material 1140 may conduct more current in a horizontal direction. This may be reduced in some embodiments by producing a composition for the VSD material 1 140 that exhibits anisotropic horizontal conductivity such that it is substantially conductive when propagating current along the Z-axis, but substantially insulative horizontally.
• the VSDM formation 1 100 shown in the embodiment of FIG. 1 1 will switch vertically, with current flow taking place through the VSD material structure 1140 predominantly in a direction substantially parallel with the Z-axis (or vertical axis) of the respective substrate.
• the vertical switching VSDM formation shown in FIG. 11 may be
• the characteristic voltage of the one or more layers of VSD material is determined by the total vertical thickness of the individual VSD material structures and by the characteristic voltage of each VSD material.
• FIG. 12A shows a VSD material formation 1200 that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• the vertical switching VSD material formation 1200 from the embodiment of FIG. 12A may be integrated in any electronic device that includes a substrate device to provide protection against ESD and other overvoltage events.
• substrate devices in which the VSD material formation 1200 may be integrated in various embodiments include a PCB and the packaging of a semiconductor chip.
• FIG. 12A shows a cross section of the VSD material formation in a vertical direction of a substrate device.
• the vertical switching VSD material formation 1200 of FIG. 12A comprises a layer of VSD
• T may take a range of values, depending on the formulation of the VSD material 1240, and depending on the characteristic voltage and other physical or operational properties desired for the VSD material 1240.
• Specific exemplary values for the thickness T that could be considered for implementation in manufacturing processes include 2 mils, 1.5 mils, 1 mil, 0.5 mils, 0.2 mils, and smaller. In general, smaller values for T are expected to provide lower characteristic voltages for the VSD material structure 1240.
• the VSD material formation 1200 of FIG. 12A comprises a set of electrodes 1120, 1 122 and 1 124, which are disposed in contact with the VSD material structure 1240.
• a conductive layer 1270 is disposed adjacent to a pre-preg layer 1230.
• the pre-preg layer 1230 is disposed between the conductive layer 1270 and the layer of VSD material 1240.
• a layered interconnect 1280 is disposed in contact with the layer of VSD material 1240. In one embodiment, the layered interconnect 1280 is formed within the pre-preg layer 1230, as shown in FIG. 12A.
• the layered interconnect 1280 may be disposed as a distinct layer (i.e., not formed within the pre-preg layer 1230) that separates the pre-preg layer 1230 from the VSD material 1240.
• the pre-preg layer 1230 could be a layer in a substrate device, such as a PCB, a flexible circuit, or the packaging of a semiconductor device.
• a via 1250 crosses the pre-preg layer 1230 and is in electrical contact with the layered interconnect 1280, and establishes electric contact between the conductive layer 1270 and the layered interconnect 1280.
• electrode 1220 and electrode 1224 are connected to a ground.
• one or both electrodes could be connected to a different point in an electric circuit, including possibly to a voltage source, to a circuit element or component, or to another reference voltage potential towards which an ESD pulse or other voltage may be directed.
• VSD material 1240 becomes substantially conductive. Current flow across the VSD material 1240 will take place predominantly in a vertical direction between the layered interconnect 1280 and the electrode 1220 and/or the electrode 1224.
• ESD discharge path 1290 The general electrical path followed by current flowing through the VSDM formation 1200 in response to the ESD signal 1212 is shown in FIG. 12A as ESD discharge path 1290.
• FIG. 12A further shows a circuit element denoted as embedded impedance 1296.
• this circuit element may be incorporated partially or completely within the VSDM formation 1200, or may be in communication with the VSDM formation 1200 (e.g., it may be embedded in the same PCB as the VSDM formation 1200, or may be surface- attached to a PCB in which the VSDM formation 1200 is incorporated).
• the embedded impedance 1296 is shown as a circuit element that is embedded at least partially within the VSDM formation 1200.
• FIG. 12A shows the embedded impedance 1296 as being embedded at least partially within the pre-preg layer 1230.
• the embedded impedance 1296 may be disposed in other locations within a substrate or within the VSDM formation 1200.
• the embedded impedance 1296 may be disposed within the VSD material structure 1240, within another PCB layer, or within another substrate such as a semiconductor package.
• the embedded impedance 1296 consists of one or more circuit elements, or comprises one or more circuit elements.
• the embedded circuit element impedance 1296 may include one or more resistors, one or more inductors, one or more capacitors, one or more ferroic circuit elements (e.g., an embedded ferroic circuit element that may or may not comprise VSD material), one or more diodes, one or more transistors, one or more filters (e.g., various combinations of one or more low-pass, band-pass and high-pass filters or filter stages), any other passive or active circuit elements or electronic components, any layered interconnect with a negligible impedance, any layered interconnect with a non-negligible impedance (e.g., a layer of high dielectric material), any electrode or other conductive structure with a non-negligible impedance, and/or any combination of the foregoing.
• the embedded impedance 1296 may be used in connection with the VSD material structure 1240 to provide partial or full ESD protection for an electronic component, such as the electronic component 1298 shown in FIG. 12A.
• the electronic component 1298 is shown as connected to the embedded impedance through an electrode 1228.
• the embedded impedance 1296 is also in electrical contact with the conductive layer 1270. In the absence of the VSD material 1240, an ESD pulse or other large voltage that is applied at the conductive layer 1270 would result in propagation of a large voltage and/or current through the embedded impedance 1296 to the electronic component 1298.
• the vertically- switching VSDM formation 1200 switches on in response to a large voltage that exceeds the characteristic voltage of the VSD material structure 1240, and then diverts to ground through the electrode 1220 at least part of the ESD pulse that would have otherwise reached the electronic component 1298. Consequently, the vertically switching structure 1200 employs the embedded impedance 1296 to protect the electronic component 1298 from a potentially damaging ESD pulse or other overvoltage event present at the conductive layer 1270.
• the electronic component 1298 may be embedded within the VSDM formation 1200. In one embodiment, the electronic component 1298 may be embedded in the same substrate (e.g., same PCB) in which the VSDM formation 1200 is incorporated. In one embodiment, the electronic component 1298 may be surface-attached to the same substrate in which the VSDM formation 1200 is incorporated. In one embodiment, the electronic component 1298 may be incorporated in a different electronic device that is in electrical contact with the substrate in which the VSDM formation 1200 is incorporated (e.g., the VSDM formation 1200 may be incorporated in a connector that is attached to an electronic device that comprises the electronic component 1298). In one embodiment, the VSDM formation 1200 is comprised in the packaging of the electronic component 1298, or is otherwise attached to or incorporated into a substrate that is in physical contact or in electrical communication with the electronic component 1298.
• the electronic component 1298 may be any one or more of the following: a semiconductor chip or another integrated circuit (IC) (e.g., a microprocessor, controller, memory chip, RF circuit, baseband processor, etc.), a light emitting diode (LED), a MEMS chip or structure, or any other component or circuit element that is disposed inside an electronic device.
• IC integrated circuit
• the embedded impedance 1296 may be implemented using a ferroic circuit element that includes a conductive structure embedded at least partially within a ferroic material.
• a ferroic circuit element comprising ferroic VSD material and suitable for such embedded implementations was disclosed in United States patent application 13/1 15,068, filed on May 24, 201 1, which is incorporated herein in its entirety by reference.
• the embedded impedance 1296 may be implemented as an embedded ferroic inductor, embedded ferroic VSD material inductor, embedded ferroic capacitor, embedded ferroic VSD material capacitor, or as any other embedded ferroic circuit element or embedded ferroic VSD material circuit element.
• FIG. 12B shows a VSD material formation 1202 that is adapted to achieve vertical switching using VSD material, in accordance with an embodiment.
• the embodiments shown in FIG. 12A and FIG. 12B are generally the same, except that in the embodiment of FIG. 12B the embedded impedance 1296 is replaced by an embedded impedance 1297, the electrode 1228 is replaced by an electrode 1229, and the electronic component 1298 is replaced by an electronic component 1299.
• the embedded impedance 1297 is no longer embedded in the pre-preg layer 1230, but is instead separated from the pre-preg layer 1230 by the conductive layer 1270.
• An optional electrode 1229 connects the embedded impedance 1297 with the electronic component 1299.
• impedance 1297 and the electronic component 1299 may be substantially the same as described in connection with the embodiment of FIG. 12A for the embedded impedance 1296 and respectively for the electronic component 1298, except that the embedded impedance 1297 and the electronic component 1299 are disposed as discussed in connection with FIG. 12B.
• the embedded impedance 1297 shown in FIG. 12B is not embedded within the VSDM formation 1200, but is embedded in the same substrate (e.g., same PCB) in which the VSDM formation 1200 is incorporated.
• the embedded impedance 1297 and/or the electronic component 1299 may be surface-attached to the same substrate in which the VSDM formation 1200 is incorporated.
• the embedded impedance 1297 and/or the electronic component 1299 may be incorporated in a different electronic device that is in electrical contact with the substrate in which the VSDM formation 1200 is incorporated (e.g., the VSDM formation 1200 may be incorporated in a connector that is attached to an electronic device that comprises the embedded impedance 1297 and/or the electronic component 1299).
• the VSDM formation 1200 and the embedded impedance 1297 are comprised in the packaging of the electronic component 1298, or are otherwise attached to or incorporated into a substrate that is in physical contact or in electrical communication with the electronic component 1298.
• FIG. 13 shows a VSDM formation 1300 comprising a VSD material layer 1340 that may be
• the VSDM formation 1300 shown in FIG. 13 comprises a number of conductive signal layers, denoted as conductive layers LI through L6, and numbered as conductive layers 1370, 1372, 1374, 1376, 1378, and 1379. These signal layers may conduct electrical signals within the PCB board, or to or from components and circuit elements attached to the PCB, or may act as ground or other voltage reference points. These signal layers are separated by a number of substantially insulative or dielectric layers built into the respective substrate device (not specifically identified in FIG. 13). For a PCB, such insulative layers may include a pre-preg filler, a core, a laminated layer, or any other similar film or structure.
• the VSDM formation 1300 shown in FIG. 13 is disposed along the vertical dimension of a PCB or other substrate.
• the VSDM formation 1300 shown in FIG. 13 also comprises a via 1350.
• a via 1350 In various
• via 1350 may be a via, a pad, a trace, or any other structure that is designed to be conductive and to facilitate propagation of electric signals.
• the via 1350 is in electrical conduct with the layer LI 1370 and the layer L2 1372.
• the VSDM formation 1300 from the embodiment of FIG. 13 further comprises a VSD material structure, shown as the VSD material structure 1340.
• the VSD material structure 1340 is disposed in a vertical direction and crosses multiple conductive layers of the VSDM formation 1300. As shown in FIG. 13, the VSD material structure 1340 crosses conductive layers conductive layers L2 1374 and L3 1376. In various implementations, the VSD material structure 1340 may cross two or more conductive layers or other conductive structures within a substrate, such as a PCB, a flexible circuit, or semiconductor package.
• the VSD material structure 1340 may be produced by filling with VSD material a via (e.g., a buried via) or any other volume available within a substrate, such as a PCB, a flexible circuit, or a semiconductor package.
• the VSD material structure 1340 is produced by making a hole (e.g., mechanically or with a laser) in a substrate and then filling that hole with VSD material.
• the VSD material structure 1340 may be produced by depositing VSD material within an empty space created within a substrate during the manufacturing of the substrate (e.g., by creating a vertical cavity in a PCB through the alignment of preexisting gaps or holes previously produced in different adjacent layers of that PCB, and then injecting VSD material and curing the VSD material inside that cavity).
• the respective voltage will propagate to layer L2 1372 with minimal or no losses.
• the voltage produced in response to the ESD pulse 1312 reaches the VSD material structure 1340. If the voltage that reaches the VSD material structure 1340 exceeds the
• VSD material structure 1340 across a particular vertical gap, the VSD material will switch on and will become substantially conductive within that gap.
• the conductive layer L3 1374 is connected to a ground.
• the conductive layer L3 1374 (or another conductive structure or layer that is in electrical contact with the respective VSD material structure) may be connected to another point towards which an ESD signal may be conducted, such as an arbitrary voltage reference point or a circuit element or component.
• the effective gap that will trigger vertical switching within the VSD material structure 1340 is substantially gap 1342, with an effective thickness of substantially T, determined approximately by the vertical spacing between the conductive layer L2 1372 and the grounded layer L3 1374.
• the thickness T will determine at least in part the characteristic voltage of the VSD material structure 1340 (e.g., in accordance with equation Eq. 1).
• more than one VSD material structures may be stacked vertically (whether in adjacent or in physically separated layers) or may be connected horizontally (e.g., through layered interconnects), as described in this patent in connection with other embodiments.
• FIG. 14 shows a VSDM formation 1400 comprising a VSD material formation 1440 that may be integrated in a PCB or in another substrate and is adapted to achieve vertical switching, in accordance with an embodiment.
• the representation shown in FIG. 14 is an expanded view of the VSDM formation 1300 from FIG. 13.
• the VSDM formation 1400 shown in FIG. 14 comprises three conductive signal layers, denoted as conductive layers LI through L3, and numbered as conductive layers 1470, 1472, and 1474.
• Conductive layer 1474 is connected to a ground. Alternatively, the conductive layer 1474 may be connected to a circuit element or component, or to another voltage reference point. These three signal layers are separated by a number of substantially insulative or dielectric layers built into the respective substrate device (not specifically identified in FIG. 14). For a PCB, such insulative layers may include a pre-preg filler, a core, a laminated layer, or any other similar film or structure.
• the VSDM formation 1400 shown in FIG. 14 is disposed along the vertical dimension of a PCB or other substrate.
• the VSDM formation 1400 shown in FIG. 14 also comprises a via 1450.
• a via 1450 In various
• via 1450 may be a via, a pad, a trace, or any other structure that is designed to be conductive and to facilitate propagation of electric signals.
• the via 1450 is in electrical conduct with the layer LI 1470 and the layer L2 1472.
• the VSDM formation 1400 from the embodiment of FIG. 14 further comprises a VSD material structure, shown as the VSD material structure 1440.
• the VSD material structure 1440 is disposed in a vertical direction and is in electrical contact with the conductive layers L2 1474 and L3 1476.
• the VSD material structure 1440 may cross two or more conductive layers or other conductive structures within a substrate, such as a PCB, a flexible circuit, or a semiconductor package.
• the VSD material structure 1440 may be produced by filling with VSD material a via (e.g., a buried via) or any other volume available within a substrate, such as a PCB, a flexible circuit, or a semiconductor package.
• the respective voltage will propagate through via 1450 to layer L2 1472 with minimal or no losses.
• the voltage produced in response to the ESD pulse 1412 reaches the VSD material structure 1440. If the voltage that reaches the VSD material structure 1440 exceeds the characteristic voltage of the VSD material structure 1440 across a particular vertical gap, the VSD material will switch on and will become substantially conductive across that gap. [00231] Because in the embodiment of FIG.
• the effective gap that will trigger vertical switching within the VSD material structure 1440 is substantially gap 1442, with an effective thickness of approximately T, determined substantially by the vertical spacing between the conductive layer L2 1472 and the grounded layer L3 1474.
• the thickness T will determine at least in part the characteristic voltage of the VSD material structure 1440 (e.g., in accordance with equation Eq. 1).
• more than one structures of VSD material may be stacked vertically (whether in adjacent or in physically separated layers) or may be connected horizontally (e.g., via layered interconnects), as described in this patent in connection with other embodiments.
• FIG. 15A shows a VSD material formation 1500 that is adapted to achieve vertical switching using VSD material in connection with one or more circuit elements, in accordance with an embodiment.
• the vertical switching VSD material formation 1500 of FIG. 15A may be integrated in any electronic device that includes a substrate device to provide protection against ESD and other overvoltage events.
• substrate devices in which the VSD material formation 1500 may be integrated in various embodiments include a PCB, a flexible circuit, and the packaging of a semiconductor chip.
• FIG. 15A shows a cross section of the VSD material formation in a vertical direction of a substrate device.
• the vertical switching VSD material formation 1500 of FIG. 15A is generally similar to the VSD material formation 1100 of FIG. 11, except that instead of conductive pre-preg 1 170 from the embodiment of FIG. 1 1, the embodiment of FIG. 15A incorporates two layered interconnects 1570 and 1572, connected through a circuit element 1592.
• the circuit element 1592 has an impedance that is non-negligible, denoted as H in FIG. 15 A.
• the layered interconnects 1570 and 1572 may be, or may include electrodes, layered interconnects or portions of layered interconnects, conductive layers or portions of conductive layers, or any other conductive structures.
• the vertical switching VSD material formation 1500 of FIG. 15A comprises a VSD material
• the VSD material structure 1540 which is disposed between the electrode 1520 and the layered interconnect 1572, and respectively also between the electrode 1522 and the layered interconnect 1570.
• the VSD material structure 1540 of the embodiment of FIG. 5 has a vertical thickness that is substantially uniform across the horizontal dimension and is approximately equal to the gap 1542, denoted as T.
• the layered interconnects 1570 and 1572 are disposed adjacent to a substrate layer, core 1582, which is substantially an insulator or substantially a dielectric. Additional layers may be present in a substrate device in which the VSDM formation 1500 is incorporated (e.g., one or more pre-preg layers).
• the VSD material structure 1540 may switch on and become substantially conductive.
• the effective gap that will trigger vertical switching within the VSD material structure 1540 is substantially twice the gap 1542, with an effective thickness of approximately twice the value of T (this is because current will propagate across the gap 1542 twice, in opposite senses, when the VSDM formation 1500 switches vertically).
• the thickness T will determine at least in part the characteristic voltage of the VSD material structure 1540 (e.g., in accordance with equation Eq. 1).
• the minimum voltage that must be produced by the ESD pulse 1512 before the VSD material structure 1540 switches on is approximately equal to twice the characteristic voltage of the VSD material structure 1540 (because to complete an electric circuit between the two electrodes 1520 and 1522, current must flow twice across the gap 1542, in different vertical senses).
• the VSD material structure 1540 will switch on and become substantially conductive when the voltage of the ESD pulse 1512 is approximately equal to twice the characteristic voltage of the VSD material structure 1540 plus the voltage drop across the element 1592.
• the circuit element 1592 may be, or may include one or more resistors, one or more inductors, one or more capacitors, one or more ferroic circuit elements (e.g., an embedded ferroic circuit element that may or may not comprise VSD material), one or more diodes, one or more transistors, one or more filters (e.g., various combinations of one or more low-pass, band-pass and high-pass filters or filter stages), any other passive or active circuit elements or electronic components, any layered interconnect, electrode or other conductive structure with a non- negligible impedance, and any combination of the foregoing.
• the circuit element 1592 may comprise a single electronic component or a combination of electronic components, and may be used in connection with the VSD material structure 1540 to provide partial or full ESD protection for an electronic device or for substrate device in which the VSDM formation 1500 is integrated.
• the circuit element 1592 is embedded in a substrate, such as a PCB, a flexible circuit, or the packaging of a semiconductor device.
• the element 1592 may be embedded in a layer of a PCB in which the VSDM formation 1500 may be integrated (e.g., the circuit element 1592 may be incorporated in a core layer, in a pre-preg layer, in a laminated layer, or in any other layer of the PCB).
• the element 1592 may be an electronic component or circuit element that is attached to a PCB in which the VSDM formation 1500 may be integrated.
• the element 1592 may be a circuit element that is incorporated in a semiconductor chip that is protected by a packaging substrate in which a VSDM formation may be integrated.
• the element 1592 is illustrated as connected between the layered interconnects 1570 and 1572.
• the element 1592 or other circuit elements may be disposed in other locations within a substrate or within the VSDM formation 1500.
• the element 1592 or other circuit elements may be disposed between the electrode 1520 and the VSD material structure 1540, between the electrode 1522 and the VSD material structure 1540, in the electrical path of a voltage produced by the ESD pulse 1512 before such voltage reaches the electrode 1520 or the electrode 1522, or in electrical contact with the VSDM formation 1500 and one or more electronic components to be protected against ESD events.
• the element 1592 may be implemented using an embedded circuit element manufactured by embedding a conductive structure at least partially within a ferroic material, with the ferroic material being embedded at least partially within a substrate.
• a ferroic circuit element comprising ferroic VSD material and suitable for such embedded implementations was disclosed in United States patent application 13/1 15,068.
• the VSDM formation 1500 comprises two VSD material structures with different vertical thicknesses, such that the gap between the electrode 1522 and the layered interconnect 1570 is different from the gap between the electrode 1520 and the layered interconnect 1572.
• more than one VSD material structures may be stacked vertically
• the thickness T of the gap 1542 may take a range of values, depending on the formulations of the VSD material 1540, and depending on the characteristic voltage and other physical or operational properties desired for the VSD material 1540.
• the effective thickness of the VSDM formation 1500 is determined by twice the value of T, specific exemplary values for the thickness T that could be considered for
• implementation in manufacturing processes include 1 mils, 0.75 mils, 0.5 mil, 0.25 mils, 0.1 mils, and smaller.
• smaller values for T are expected to provide lower characteristic voltages for the VSD material structure 1540, but may be more challenging to achieve consistently in commercial volume manufacturing environments.
• FIG. 15B shows a VSD material formation 1502 that is adapted to achieve vertical switching using VSD material using a circuit element with a first impedance value and an embedded impedance element with a second impedance value, in accordance with an embodiment.
• the embodiments shown in FIG. 15A and FIG. 15B are generally the same, except that in the embodiment of FIG. 15B the element 1592 is replaced by an element 1593 and a circuit element shown as embedded impedance 1597 is embedded within the VSD material structure 1540.
• An electronic component 1599 is in electrical contact with the embedded impedance 1597. This electrical contact may be achieved through an optional electrode 1529.
• the architecture, implementation and functionality of the element 1593 is substantially the same as described in connection with the embodiment of FIG. 15A for the element 1592, except that the element 1593 has an impedance denoted as HI.
• the embedded impedance 1597 has an impedance denoted H2.
• the element 1593 and the embedded impedance 1597 may or may not the same type of circuit element (e.g., they may both be inductors, or one of them may be a resistor and the other one may be a capacitor).
• the impedances HI and H2 may or may not be the same.
• impedance 1597 and the electronic component 1599 may be substantially the same as described in connection with the embodiment of FIG. 12A for the embedded impedance 1296 and respectively for the electronic component 1298, except that the embedded impedance 1597 and the electronic component 1599 are disposed as discussed in connection with FIG. 12B and are used in connection with the vertical switching VSDM formation 1502.
• the embedded impedance 1597 is incorporated at least partially within the VSD material structure 1540 and is in electrical contact with the electrode 1522. In the absence of the VSD material structure 1540, a large voltage applied at the electrode 1522 would propagate through the embedded impedance 1597 to the electronic component 1599, potentially damaging the electronic component 1599.
• VSD material structure 1540 If the VSD material structure 1540 is present and switches on in response to a sufficiently large
• ESD pulse 1512 applied to the electrode 1522 at least a portion of the current that would have flowed to the electronic component 1599 now flows through the VSD material 1540 to the layered interconnect 1570.
• the electronic component 1599 and possibly also the embedded impedance 1597 are protected from overvoltage damage.
• the embedded impedance 1597 may alternatively be incorporated in the same substrate (e.g., same PCB) in which the VSDM formation 1502 is incorporated.
• the embedded impedance 1597 and/or the electronic component 1599 may be surface-attached to the same substrate in which the VSDM formation 1502 is incorporated.
• the embedded impedance 1597 and/or the electronic component 1599 may be incorporated in a different electronic device that is in electrical contact with the substrate in which the VSDM formation 1502 is incorporated (e.g., the VSDM formation 1502 may be incorporated in a connector that is attached to an electronic device that comprises the embedded impedance 1597 and/or the electronic component 1599).
• the VSDM formation 1502 and the embedded impedance 1597 are comprised in the packaging of the electronic component 1599, or are otherwise attached to or incorporated into a substrate that is in physical contact or in electrical communication with the electronic component 1599.
• FIG. 16 shows a combination of a vertical switching VSD material formation 1600 and a
• the VSDM formation 1000 comprises two structures of VSD material disposed in vertical layers that together switch vertically.
• the VSD material formations 1600 and 1601 combine a VSD material structure 1646 that is disposed to switch vertically across a gap 1648 and a VSD material structure 1640 that is disposed to switch horizontally across a gap 1642.
• switching VSD material formation 1601 are incorporated within different substrates, which are connected by a connector 1628. In one embodiment, one or both of the vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601 are
• the connector 1628 is a flexible connector.
• the vertical switching VSD material formation 1600 comprises a set of two electrodes 1620 and 1622 and a VSD material structure 1646.
• the electrodes 1620 and 1622 are in contact with the VSD material structure 1646, which spans the vertical gap 1648 with a thickness Tl.
• a layered interconnect 1670 is disposed in contact with the VSD material structure 1646 opposite to the electrode 1620.
• the electrode 1622 shown in FIG. 16 crosses the layer of VSD material 1646 and is in direct electrical contact with the layered interconnect 1670.
• the electrode 1622 may not cross the layer of VSD material 1622 completely, in which case a second vertical gap may exist across the VSD material 1646 (having a thickness equal to, or smaller than Tl) across which vertical switching may take place.
• the horizontal switching VSD material formation 1601 comprises two electrodes 1624 and 1626 and a VSD material structure 1640.
• the electrodes 1624 and 1626 are in contact with the VSD material structure 1640, which spans a vertical gap 1642 with a thickness T2.
• a layered interconnect 1672 is disposed in contact with the VSD material structure 1640 opposite to the electrodes 1624 and 1626.
• a conductive structure denoted as connector 1628 connects the electrode 1622 of the vertical switching VSD material formation 1600 and the electrode 1624 of the horizontal switching VSD material formation 1601.
• Connector 1628 may be a via, a pad, a trace, a layered interconnect, or any other structure that is designed to be conductive and to facilitate propagation of electric signals.
• the connector 1628 is a flexible electrical connector.
• the vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601 of FIG. 16 may be integrated in any electronic device that includes a substrate device to provide protection against ESD and other overvoltage events.
• An example of substrate devices in which the vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601 may be integrated in various embodiments include a combination of two PCBs interconnected by a flexible connector, a PCB and a semiconductor package
• Such flexible connector applications may occur in flexible electronic devices, including an electronic device that has a pivotable or mobile surface (e.g., a mobile phone or tablet with a keyboard or adjustable screen) or an electronic device that is designed to be flexible (e.g., a flexible LED display).
• an electronic device that has a pivotable or mobile surface e.g., a mobile phone or tablet with a keyboard or adjustable screen
• an electronic device that is designed to be flexible e.g., a flexible LED display
• FIG. 16 shows a cross section of each of the vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601.
• Each of the vertical switching VSD material formation 1600 and horizontal switching VSD material formation 1601 may be embedded in a separate substrate device, such as a PCB, flexible circuit or semiconductor package.
• FIG. 16 shows additional illustrative substrate layers, such as a core 1682 and a core 1683.
• each of the vertical switching VSD material formation 1600 and horizontal switching VSD material formation 1601 operate independently in response to an ESD pulse, such as ESD pulse 1612.
• ESD pulse 1612 For the vertical switching VSD material formation 1600, this could happen if the ESD pulse 1612 is applied at the electrode 1620 and the electrode 1622 is grounded (or is otherwise set at a particular voltage potential), or if the if the ESD pulse 1612 is applied at the electrode 1622 and the electrode 1620 is grounded (or is otherwise set at a particular voltage potential).
• the vertical switching VSD material formation 1600 and the horizontal switching VSD material formation 1601 may operate cooperatively in response to an ESD pulse, such as ESD pulse 1612, if the two formations switch together.
• ESD pulse 1612 such as ESD pulse 1612
• the electrode 1626 is grounded (or is otherwise set at a particular voltage potential) and an ESD pulse 1612 is applied to the electrode 1620, or if the electrode 1620 is grounded (or is otherwise set at a particular voltage potential) and an ESD pulse 1612 is applied to the electrode 1626.
• the VSD material structure 1646 may switch vertically across the gap 1648 and the VSD material structure 1640 may switch horizontally across the gap 1642.
• both VSD material structures 1640 and 1648 must switch on.
• the voltage differential produced between the electrodes 1620 and 1626 in response to the ESD pulse 1612 must equal or exceed the sum of the characteristic voltages of the VSD material structures 1640 and 1648.
• each of the VSD material structures 1640 and 1646 has a different
• the two VSD material structures 1640 and 1646 have the same composition.
• the VSD material structures 1640 and 1646 may or may not have the same characteristic voltage, depending on the implementation.
• the thicknesses Tl and T2 of the gap 1648 and respectively 1642 may each take a range of values, depending on the formulations of the VSD material structures 1646 and 1640, and depending on the characteristic voltage and other physical or operational properties desired for the VSDM formations 1600 and 1601. Specific exemplary values for Tl and T2 are 2 mils, 1.5 mils, 1 mil, 0.5 mil, or smaller values. In general, smaller values for T are expected to provide lower characteristic voltages for the VSD material structures 1646 and 1640.
• vertical switching VSDM formations as described and/or claimed in this patent may be implemented in a substrate in connection with horizontal switching formations, including as shown in FIG. 16.
• both a vertical switching VSDM formation such as the structure shown in FIG. 15A
• a horizontal switching VSDM formation such as the structure shown in FIG. 2
• the two VSDM formations may be used together (e.g., by connecting electrode 122 to electrode 1620) to protect a specific electronic component, or may be used independently (e.g., without directly connecting the two structures) to protect a single electronic component or different electronic components.
• FIG. 16 further shows a circuit element denoted as embedded impedance 1696.
• this circuit element may be incorporated partially or completely within the vertically switching VSDM formation 1600, or may be in communication with the vertically switching VSDM formation 1600 (e.g., it may be embedded in the same PCB as the vertically switching VSDM formation 1600, or may be surface-attached to a PCB in which the vertically switching VSDM formation 1600 is incorporated).
• the embedded impedance 1696 or another similar circuit element may be incorporated partially or completely within the horizontally switching VSDM formation 1601, or may be in communication with the horizontally switching VSDM formation 1601 (e.g., it may be embedded in the same PCB as the VSDM formation 1601, or may be surface-attached to a PCB in which the VSDM formation 1601 is incorporated).
• the embedded impedance 1696 is shown as a circuit element that is embedded at least partially within the VSDM formation 1600.
• FIG. 16 shows the embedded impedance 1696 as being embedded at least partially within the VSD material structure 1646.
• the embedded impedance 1696 may be disposed in other locations within a substrate or within the VSDM formation 1600.
• a circuit element embedded at least partially in a substrate such as the embedded impedance 1696 from FIG. 16, consists of one or more circuit elements, or comprises one or more circuit elements.
• the embedded impedance 1696 may include one or more resistors, one or more inductors, one or more capacitors, one or more ferroic circuit elements (e.g., an embedded ferroic circuit element that may or may not comprise VSD material), one or more diodes, one or more transistors, one or more filters (e.g., various combinations of one or more low-pass, band-pass and high-pass filters or filter stages), any other passive or active circuit elements or electronic components, any layered interconnect, electrode or other conductive structure with a non-negligible impedance, and any combination of the foregoing.
• the embedded impedance 1696 may be used in connection with the VSD material structures 1640 and 1646 and to provide partial or full ESD protection for an electronic component, such as the electronic component 1698 shown in FIG. 16.
• the electronic component 1698 is shown as connected to the embedded impedance 1696 through an electrode 1629.
• the embedded impedance 1696 is also in electrical contact with the electrode 1620.
• an ESD pulse or other large voltage that is applied at the electrode 1620 would result in propagation of a large voltage and/or current through the embedded impedance 1696 to the electronic component 1698.
• the vertically- switching VSDM formation 1600 switches on as discussed above and then diverts through the layered interconnect 1670 at least part of the ESD pulse that would have otherwise reached the electronic component 1698. Consequently, the vertically switching structure 1600 employs the embedded impedance 1696 to protect the electronic component 1698 from a potentially damaging ESD pulse or other overvoltage event present at the electrode 1620.
• switching VSDM formations 1600 and 1601 to provide partial or full ESD protection for an electronic component, such as the electronic component 1698 shown in FIG. 16, is disclosed in detail in US. Application Serial No. 13/096,860.
• the electronic component 1698 may be embedded within the VSDM formation 1600. In one embodiment, the electronic component 1698 may be embedded in the same substrate (e.g., same PCB) in which the VSDM formation 1600 is incorporated. In one embodiment, the electronic component 1698 may be surface-attached to the same substrate in which the VSDM formation 1600 is incorporated. In one embodiment, the electronic component 1698 may be incorporated in a different electronic device that is in electrical contact with the substrate in which the VSDM formation 1600 is incorporated (e.g., the VSDM formation 1600 may be incorporated in a connector that is attached to an electronic device that comprises the electronic component 1698).
• the VSDM formation 1600 is comprised in the packaging of the electronic component 1698, or is otherwise attached to or incorporated into a substrate that is in physical contact or in electrical communication with the electronic component 1698.
• the electrode 1629 is a flexible connector, and the electronic component 1698 is disposed on a different substrate as part of a flexible electronic device.
• impedance 1696 and the electronic component 1698 may be substantially the same as described in connection with the embodiment of FIG. 12A for the embedded impedance 1296 and respectively for the electronic component 1298, except that the embedded impedance 1696 and the electronic component 1698 are disposed as discussed in connection with FIG. 16.
• the embedded impedance 1696 may be implemented using a ferroic circuit element that includes a conductive structure embedded at least partially within a ferroic material.
• the embedded impedance 1696 may be implemented as an embedded ferroic inductor, embedded ferroic VSD material inductor, embedded ferroic capacitor, embedded ferroic VSD material capacitor, or as any other embedded ferroic circuit element or embedded ferroic VSD material circuit element.
• FIG. 17 shows a VSD material formation 1700 that is adapted to achieve both vertical and
• a VSD material formation that is adapted to perform both vertical and horizontal switching using VSD material is denoted a "bidirectional switching VSDM formation" or a “dual switching VSDM formation.”
• bidirectional switching VSDM formations such as the bidirectional switching VSDM formation 1700 of FIG. 17, may be employed in similar applications and implementations as the various vertical switching VSDM formations disclosed and/or claimed in this patent, except that such bidirectional switching VSDM formations can perform an additional horizontal switching function.
• a bidirectional switching VSDM formation comprises a VSD material structure disposed in a manner that facilitates vertical switching as generally discussed in connection with the various vertical switching VSDM formations disclosed and/or claimed in this patent. Additionally, in such embodiments, the respective VSD material structure will also be in electrical contact with at least one electrode disposed in a manner that facilitates horizontal switching as generally discussed in connection with FIGs. 1 and/or 2. [00278]
• the VSD material formation 1700 shown in the embodiment of FIG. 17 comprises an electrode
• the VSD material formation 1700 further comprises electrode 1726 and electrode 1728, which are also in electrical contact with the VSD material structure 1740.
• the electrode 1726 may be in direct electrical contact with the layered interconnect 1770 (e.g., the electrode 1726 may cross the layer of VSD material 1740 or a via may connect the electrode 1726 to the layered interconnect 1770).
• either one of the two electrodes 1726 and 1728 may be omitted, in which case the corresponding horizontal switching functionality provided by the omitted electrode would be absent as well.
• the electrode 1726 is in electrical contact with electrode 1728 (e.g., they may be part of the same conductive plane, or may be connected directly by a PCB trace or other connector).
• the VSD material structure 1740 has a vertical gap 1742 with a vertical thickness Tl (e.g.,
• a layered interconnect 1770 (e.g., an electrode or layered interconnect) is disposed in electrical contact with the VSD material structure 1740 and with the electrode 1726.
• a core layer 1782 is disposed adjacent to the layered interconnect 1770 and may be a layer in a substrate (e.g., a PCB or semiconductor package) in which the bidirectional switching structure 1700 is incorporated.
• An optional via 1772 or any other conductive structure may cross one or more layers of the
• Such a via may be produced by laser drilling or through any other suitable manufacturing process.
• electrode 1726, electrode 1728 and via 1772 are all connected to a ground.
• the layered interconnect 1770 is not connected to a ground (e.g., via 1772 does not exist or is not connected to a ground), in which case vertical switching between the layered interconnect 1770 and the electrode 1720 would not occur.
• electrode 1726 or electrode 1728 is not connected to a ground, in which case horizontal switching between that unconnected electrode and the electrode 1720 would not occur.
• the dual switching VSDM formation 1700 from the embodiment of FIG. 17 is capable of
• electrode 1726, electrode 1728 and layered interconnect 1770 are all connected to a ground or another reference voltage potential.
• the gap across which the characteristic voltage of the formation of VSD material 1740 is the lowest will determine the location where switching will occur. If the formulation of VSD material is the same across the three gaps 1742, 1744 and 1746 and the characteristic voltage is correlated with the size of the gap, the switching will occur across the smallest gap.
• the gaps 1744 and 1746 are substantially the same and the VSDM formation 1700 switches horizontally across both the gaps 1744 and 1746. In one embodiment, the gaps 1742, 1744 and 1746 are substantially the same and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gaps 1744 and 1746. In one embodiment, the gaps 1742 and 1744 are substantially the same and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gap 1744. In one embodiment, the gaps 1742 and 1746 are substantially the same and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gap 1746.
• the characteristic voltages across such gaps may not be directly correlated with the sizes of the gaps. Consequently, in such embodiments, the characteristic voltages of two gaps with different thicknesses may still be substantially the same.
• the characteristic voltages across gaps 1744 and 1746 are substantially the same and the VSDM formation 1700 switches horizontally across both the gaps 1744 and 1746.
• the characteristic voltages across gaps 1742, 1744 and 1746 are substantially the same, and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gaps 1744 and 1746.
• the characteristic voltages across gaps 1742 and 1744 are substantially the same and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gap 1744.
• the characteristic voltages across gaps 1742 and 1746 are substantially the same and the VSDM formation 1700 switches vertically across the gap 1742 and horizontally across the gap 1746.
• FIG. 4A Vertical or bidirectional switching VSDM formations as described and/or claimed in this patent, such as the structure 400 of the embodiment of FIG. 4A, the VSDM formation 490 of the embodiment of FIG. 4B, the VSDM formation 500 of the embodiment of FIG. 5, the VSD material formation 600 of the embodiment of FIG. 6, the VSD material formation 900 of the embodiment of FIG. 9, the VSD material formation 1000 of the embodiment of FIG. 10, the VSD material formation 1 100 of the embodiment of FIG. 11, the VSD material formation 1200 of the embodiment of FIG. 12A, the VSD material formation 1300 of the embodiment of FIG. 13, the VSD material formation 1400 of the embodiment of FIG. 14, the VSD material formation 1500 of the embodiment of FIG.
• the VSD material formation 1600 of the embodiment of FIG. 16, and the bidirectional switching structure 1700 of the embodiment of FIG. 17 may be used for ESD protection of circuit elements and components in electric circuits and devices.
• electronic components that may be protected by such vertical switching VSDM formations include one or more of the following: semiconductor chip or another integrated circuit (IC) (e.g., a microprocessor, controller, memory chip, RF circuit, baseband processor, etc.), light emitting diode (LED), MEMS chip or structure, or any other component or circuit element that is disposed inside an electronic device.
• IC semiconductor chip or another integrated circuit
• LED light emitting diode
• MEMS chip or structure or any other component or circuit element that is disposed inside an electronic device.
• Vertical switching VSDM formations and dual switching VSDM formations as described and/or claimed in this patent may be used for ESD protection of substrate devices, such as a layer or set of layers of a PCB, the packaging of a semiconductor device, or any other substrate to which a vertical switching VSD material formation can be attached or within which a vertical switching VSD material formation may be incorporated.
• substrate devices such as a layer or set of layers of a PCB, the packaging of a semiconductor device, or any other substrate to which a vertical switching VSD material formation can be attached or within which a vertical switching VSD material formation may be incorporated.
• Vertical switching VSDM formations and dual switching VSDM formations as described and/or claimed in this patent may be used for ESD protection of electronic devices in which such VSDM formations are incorporated (e.g., through incorporation into a substrate comprised in such an electronic device), or to which such VSDM formations are connected (e.g., when such VSDM formations are incorporated into a connector or cable attached to such an electronic device, or when such VSDM formations are comprised into a device that is connected to such an electronic device).
• Examples of electronic devices that may be protected by such vertical switching VSDM formations or dual switching VSDM formations, or that may include substrate devices, electronic components or circuit elements that may be protected by such vertical or dual switching VSDM formations include mobile phones, electronic tablets, electronic readers, mobile computers (e.g., a laptop), desktop computers, server computers (e.g., servers, blades, multi-processor supercomputers), television sets, video displays, music players (e.g., a portable MP3 music player), personal health management devices (e.g., a pulse monitor, a cardiac monitor, a distance monitor, a temperature monitor, or any other sensor device with applications in health management), light emitting diodes (LEDs) and devices comprising LEDs, lighting modules, and any other consumer and/or industrial devices that process or otherwise store data using electrical or electromechanical signals.
• Other examples include satellites, military equipment, aviation instruments, and marine equipment.
• a connector may be attached to an electronic device to be protected against ESD or other overvoltage events.
• Examples of such connectors include a power connector, a USB connector, an Ethernet cable connector, an HDMI connector, or any other connector that facilitates serial, parallel or other types of data, signal or power transmission.
• a set means any group of one, two or more items.
• a subset means, with respect to a group of N items, any set of such items consisting of N-l or less of the respective items.
• the verb "may” indicates a possibility that the respective action, step or implementation may be achieved, but is not intended to establish a requirement that such action, step or implementation must occur, or that the respective action, step or implementation must be achieved in the exact manner described.

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