EP2630277A1

EP2630277A1 - Method for producing a low dislocation density iii-nitride crystal

Info

Publication number: EP2630277A1
Application number: EP11772973.1A
Authority: EP
Inventors: Bernd Meyer; Vladimir Nikolaev
Original assignee: Kewar Holdings SA
Current assignee: Perfect Crystals LLC
Priority date: 2010-10-21
Filing date: 2011-10-20
Publication date: 2013-08-28
Also published as: WO2012052513A1; RU2013122654A

Abstract

A method for producing a low dislocation density III-nitride crystal comprises the following steps: a) deposition of a first Ill-nitride layer; b) formation of pits at locations of threading dislocations; c) formation of mask layer in the pit areas using a self-aligned process; and d) deposition of a second III-nitride layer. The Ill-nitride is gallium nitride, aluminum nitride, indium nitride or their alloy of any composition. Said mask layer prevents dislocations from propagating into the second III-nitride layer. Said second Ill-nitride layer laterally overgrows the pit areas to form a flat surface.

Description

METHOD FOR PRODUCING A LOW DISLOCATION DENSITY III- NITRIDE CRYSTAL

FIELD OF USE

The present invention provides methods for reducing dislocation density in Ill-nitride crystals.

BACKGROUND OF THE INVENTION

Ill-nitride crystals and epitaxial layers produced by conventional growth techniques have high density of threading dislocations in the typically range of 10⁸ -

10 cm . The presence of dislocations seriously af- fects the device performance. Therefore a reduced dis^¬ location density Ill-nitride material is desired.

The previous approach to reduce dislocation density is epitaxial lateral overgrowth (ELO) . There are numerous variations and modifications of this technique. The common feature of all these methods is selective growth using a mask pattern. The mask material and the deposition conditions are chosen so the growth occurs only in the openings of the mask. In this case indi- vidual crystallites grow through the window regions and then expand laterally until they meet each other and complete coalescence is achieved. Dislocations cannot propagate through the mask layer material, therefore dislocation density in the Ill-nitride crys- tal above the mask is significantly reduced. Some mod^¬ ifications of the technique such as Facet Controlled Epitaxial Layer Overgrowth (FCELO) use specific combi^¬ nation of growth parameters to promote bending and in- teraction of the dislocations propagating through the window regions .

The disadvantages of the previous approach include the following:

1) There is no specific alignment between the mask pattern and position of dislocations. Therefore some dislocations can propagate through the window regions into the overgrown layer.

Therefore it is difficult to achieve dislocations densities below 10⁵-10⁶ cnf²

2) Dislocation distribution across the surface is not uniform. Areas of high quality material are adjacent to areas with high dislocation density.

This reduces device yield per wafer and limits the usability of the method for large area devices .

The present invention provides methods to address the- se issues.

SUMMARY OF THE INVENTION

The present invention relates to methods for manufac- turing Ill-nitride crystals which include (a) growth of a first Ill-nitride layer on a base substrate; (b) roughening of the first layer such that pits are formed at the locations of the threading dislocations; (c) selective masking of the pits using a self-aligned masking process; (d) deposition of a second III- nitride layer such that growth starts at the openings in the mask layer and then continues laterally over the masked areas. After steps (b) and (c) the majority of threading dislocations in the first layer are pro^¬ vided to be covered with the mask material. Conse- quently, dislocations are stopped from propagating in^¬ to the second Ill-nitride layer. As a result, a low dislocation Ill-nitride crystal is produced.

BRIEF DESCRIPTION OF THE DRAWINGS FIGURE 1 is a schematic cross-sectional view of the Ill-nitride crystal growth process according to the embodiments of the invention.

FIGURE 2 is a flowchart illustrating steps in self- aligned masking process according to the first embodi- ment of the invention.

FIGURE 3 is a flowchart illustrating steps in self- aligned masking process according to the second embod^¬ iment of the invention.

FIGURE 4 is a flowchart illustrating steps in self- aligned masking process according to the third embodi^¬ ment of the invention.

DESCRIPTION OF THE INVENTION

Referring now to drawings, FIGURE 1 discloses a sche- matic cross-sectional view of the Ill-nitride crystal growth process according to the embodiments of the in^¬ vention. Ill-nitride film 202 is grown on the substrate 201 using conventional methods. Such films have high density of dislocations 203. Pits 204 are formed at the locations of the dislocations. Pits can be formed by one of the following methods: changing the growth conditions to favor three-dimensional growth and formation of inverted pyramids, in situ chemical etching, ex situ chemical etching. In situ chemical etching can be achieved by introducing a reactive gas (e.g. ¾, HC1, CI₂) into the growth chamber at high temperature. Ex situ can be done using hot acids (such as H₃PO₄ or H₂S0₄) or alkali (KOH, NaOH) melts or aque^¬ ous solutions. After that pits are selectively masked 205. Subsequently the growth is continued to produce the low dislocation density Ill-nitride crystal 206. Figure 2 illustrates self-aligned masking process ac^¬ cording to the first embodiment of the invention. First, a masking layer 303 (e.g. SiN_x, S1O₂, TiN etc) is deposited onto the Ill-nitride layer 301 with pits 302 aligned to dislocations. The deposition technique is Chemical Vapor Deposition (CVD) or Plasma Enhanced Chemical Vapor Deposition (PECVD) or similar method providing isotropic coverage of the III nitride layer surface. After that a second masking layer 304 is formed. Preferably the second masking layer is a resin (e.g. polyimide or resist) deposited by spinning. The second masking layer planarises the surface by filling in the pits. Consequently the second masking layer is partially removed by etching (e.g. by Reactive Ion Etching (RIE) or Inductively Coupled Plasma (ICP) etching) . After this step the second masking layer is removed from the whole surface except the pits. Then the second masking layer is used to selectively etch the first masking layer. The second masking layer is stripped off leaving the Ill-nitride film with se^¬ lectively masked dislocations. Figure 3 illustrates self-aligned masking process ac^¬ cording to the second embodiment of the invention. First, a layer of spin-on glass (SOG) 403 is deposited onto the Ill-nitride layer 401 with pits 402 aligned to dislocations. The spin-on glass is applied as liq- uid by spinning followed by curing to form a solid glass-like coating. This SOG layer fills in the pits and planarises the surface. Then the SOG layer is etched to remove it over the whole area except the pits. As a result, the Ill-nitride film with selec- tively masked dislocations is formed.

Figure 4 illustrates self-aligned masking process ac^¬ cording to the third embodiment of the invention. First, a masking layer 503 (e.g. SiN_x, S1O₂, TiN etc) is deposited onto the Ill-nitride layer 501 with pits 502 aligned to dislocations. The deposition technique is Chemical Vapor Deposition (CVD) or Plasma Enhanced Chemical Vapor Deposition (PECVD) or similar method providing isotropic coverage of the III nitride layer surface. Then the masking layer is etched by Ion Beam Etching or Ion Beam Sputtering or Ion Milling or similar highly directional etching technique at grazing incidence angle 504. The masking layer is etched away from the whole surface except the pits due to the shadow effect. It is evident that many alternatives, modifications, and variations of the manufacturing process of the present invention will be apparent to those skilled in the art in light of the disclosure herein. It is in- tended that the metes and bounds of the present inven^¬ tion be determined by the appended claims rather than by the language of the above specification, and that all such alternatives, modifications, and variations which form a conjointly cooperative equivalent are in- tended to be included within the spirit and scope of these claims.

Claims

1. A method for producing a low dislocation density Ill-nitride crystal comprising the following steps :

a) deposition of a first Ill-nitride layer; b) formation of pits at locations of thread^¬ ing dislocations;

c) formation of mask layer in the pit areas using a self-aligned process;

d) deposition of a second Ill-nitride layer; wherein Ill-nitride is gallium nitride, aluminum nitride, indium nitride or their alloy of any composi^¬ tion; wherein said mask layer prevents dislocations from propagating into the second Ill-nitride layer; and wherein said second Ill-nitride layer laterally overgrows the pit areas to form a flat surface

2. A method according to claim 1 wherein pits are inverted pyramids formed during of the growth of the first Ill-nitride layer.

3. A method according to claim 1 wherein pits are formed by in situ etching using hydrogen, hydrogen chloride, chlorine or any mixture thereof.

4. A method according to claim 1 wherein pits are formed by ex situ chemical etching using acid or alkali .

5. A method according to claim 1 wherein formation of the mask layer includes the following steps :

a) depositing a dielectric layer;

b) spinning a layer of a resin over dielectric surface; c) etching of the resin layer to leave resin in the pits only;

d) selective etching of the dielectric layer to leave dielectric mask only in the pits; e) stripping the resin.

6. A method according to claim 1 wherein formation of the mask layer includes the following steps:

a) spinning a layer of spin-on glass (SOG) over Ill-nitride layer;

b) baking and curing the SOG layer; c) etching of the SOG layer to leave SOG in the pits only.

7. A method according to claim 1 wherein formation of the mask layer includes the following steps:

a) depositing a dielectric layer ;

b) etching of the dielectric layer at glazing incidence angle to leave dielectric mask only in the pits.