EP2606509A4 - Halbleiterchipanordnung und verfahren zu ihrer herstellung - Google Patents

Halbleiterchipanordnung und verfahren zu ihrer herstellung

Info

Publication number
EP2606509A4
EP2606509A4 EP11819399.4A EP11819399A EP2606509A4 EP 2606509 A4 EP2606509 A4 EP 2606509A4 EP 11819399 A EP11819399 A EP 11819399A EP 2606509 A4 EP2606509 A4 EP 2606509A4
Authority
EP
European Patent Office
Prior art keywords
preparing
same
semiconductor chip
chip assembly
assembly
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP11819399.4A
Other languages
English (en)
French (fr)
Other versions
EP2606509A1 (de
Inventor
Yingce Liu
Dongming Huo
Tianbao Sun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BYD Co Ltd
Shenzhen BYD Auto R&D Co Ltd
Original Assignee
BYD Co Ltd
Shenzhen BYD Auto R&D Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by BYD Co Ltd, Shenzhen BYD Auto R&D Co Ltd filed Critical BYD Co Ltd
Publication of EP2606509A1 publication Critical patent/EP2606509A1/de
Publication of EP2606509A4 publication Critical patent/EP2606509A4/de
Withdrawn legal-status Critical Current

Links

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    • H01L33/40—Materials therefor
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29147—Copper [Cu] as principal constituent
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83193—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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    • H01L2224/832—Applying energy for connecting
    • H01L2224/83201—Compression bonding
    • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8334—Bonding interfaces of the layer connector
    • H01L2224/83345—Shape, e.g. interlocking features
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H01L2224/83805—Soldering or alloying involving forming a eutectic alloy at the bonding interface
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/641—Heat extraction or cooling elements characterized by the materials

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Die Bonding (AREA)
  • Led Devices (AREA)
EP11819399.4A 2010-08-21 2011-08-16 Halbleiterchipanordnung und verfahren zu ihrer herstellung Withdrawn EP2606509A4 (de)

Applications Claiming Priority (2)

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CN2010102615816A CN102024717B (zh) 2010-08-21 2010-08-21 一种半导体芯片的共晶方法及共晶结构
PCT/CN2011/078491 WO2012025024A1 (en) 2010-08-21 2011-08-16 Semiconductor chip assembly and method of preparing the same

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EP2606509A4 true EP2606509A4 (de) 2015-09-16

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CN102024717B (zh) * 2010-08-21 2012-03-07 比亚迪股份有限公司 一种半导体芯片的共晶方法及共晶结构
CN103378044A (zh) * 2012-04-25 2013-10-30 鸿富锦精密工业（深圳）有限公司 芯片组装结构及芯片组装方法
TWI616002B (zh) * 2013-12-30 2018-02-21 新世紀光電股份有限公司 發光晶片
CN108305838B (zh) * 2017-01-12 2020-05-29 清华大学 一种不含有机物的低温芯片贴装方法及芯片贴装结构

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GB1581436A (en) * 1977-05-30 1980-12-17 Emi Ltd Semiconductor device encapsulation
EP0313174A2 (de) * 1983-11-21 1989-04-26 Sumitomo Electric Industries Limited Herstellungsverfahren von optischen Anordnungen und Halterungen
JP2006128254A (ja) * 2004-10-27 2006-05-18 Hitachi Media Electoronics Co Ltd 光素子の実装構造体及び実装方法

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CN2395387Y (zh) * 1999-09-10 2000-09-06 亿光电子工业股份有限公司 发光二极管的共晶封装结构
US6555761B2 (en) * 2000-12-29 2003-04-29 Intel Corporation Printed circuit board with solder-filled via
CN1292463C (zh) * 2004-04-22 2006-12-27 吉林华微电子股份有限公司 半导体芯片背面共晶焊粘贴方法
KR100755658B1 (ko) * 2006-03-09 2007-09-04 삼성전기주식회사 발광다이오드 패키지
CN101075648A (zh) * 2006-05-17 2007-11-21 百鸣科技有限公司 发光二极管散热封装成型方法
US20080099537A1 (en) * 2006-10-31 2008-05-01 Raytheon Company Method for sealing vias in a substrate
CN102024717B (zh) * 2010-08-21 2012-03-07 比亚迪股份有限公司 一种半导体芯片的共晶方法及共晶结构

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Publication number Priority date Publication date Assignee Title
GB1581436A (en) * 1977-05-30 1980-12-17 Emi Ltd Semiconductor device encapsulation
EP0313174A2 (de) * 1983-11-21 1989-04-26 Sumitomo Electric Industries Limited Herstellungsverfahren von optischen Anordnungen und Halterungen
JP2006128254A (ja) * 2004-10-27 2006-05-18 Hitachi Media Electoronics Co Ltd 光素子の実装構造体及び実装方法

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See also references of WO2012025024A1 *

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CN102024717B (zh) 2012-03-07
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WO2012025024A1 (en) 2012-03-01

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