Classifications

• • G—PHYSICS
  • G06—COMPUTING; CALCULATING OR COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/02—Details
  • H04L12/12—Arrangements for remote connection or disconnection of substations or of equipment thereof
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
  • H04L12/40—Bus networks
  • H04L12/40006—Architecture of a communication node
  • H04L12/40039—Details regarding the setting of the power status of a node according to activity on the bus
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
  • H04L12/00—Data switching networks
  • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
  • H04L12/40—Bus networks
  • H04L2012/40267—Bus for use in transportation systems
  • H04L2012/40273—Bus for use in transportation systems the transportation system being a vehicle
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
  • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
  • Y02D30/00—Reducing energy consumption in communication networks
  • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Definitions

• the invention relates to a method for changing an operating state of at least one device designed as a node of a network and such a device.
• the present invention relates to a way to operate nodes of a network in a suitable manner.
• a "Wake on LAN” (WOL) function for waking up nodes of a local, limited area network (LAN) is already known from PC technology.
• WOL Wike on LAN
• This feature typically allows you to wake up a single node in the network.
• a network card of a node is thereby transmitted a so-called “Magic Packet” (magic packet), upon receipt of which, for example, a node designed as a computer is switched on.
• This package contains the hexadecimal value "FF" six times in a row; immediately thereafter, the uninterrupted, 16-time repetition of the physical address, usually the media access control or MAC address, of the node appears.
• a position of the "Magic Packet" within a frame (frames) in a message, with which this is transmitted, is arbitrary. This makes it possible to send the message using any protocol, for example Ethernet (wired data network), IP (Internet Protocol), Transmission Control Protocol (TCP) or User Datagram Protocol (UDP). However, it is not intended to wake up multiple nodes with a message. Also, the sender must already know the hardware address of the node to be awakened, since no higher protocols are supported in a sleep mode.
• Ethernet wireless data network
• IP Internet Protocol
• TCP Transmission Control Protocol
• UDP User Datagram Protocol
• the receiving device In order for a system to be awoken via a bit pattern, it is necessary for the receiving device to be active in a first layer (layer 1, physical layer).
• the transmitting device can be switched off.
• the bit pattern for waking a node is fixed. It is referred to here as a pattern. A configuration option for this pattern is not provided.
• the structure of the pattern for FlexRay is "idle-0-1 -0-1" or "idle-0-idle-o-idle". Each phase (idle, 0, 1) has a length of 4 s.
• This pattern can be placed directly on the bus or be the payload or a useful date of a frame. In the latter case, the 1 of the BSS (byte start sequence) is ignored.
• the multicast awakening starting from a point in the network the awakening of at least two and thus of several nodes is typically provided via a multipoint connection.
• broadcast awakening all nodes of the network can be woken up by transmitting messages.
• the nodes described herein are data processing devices that can interact as nodes of the network if they are interconnected via the network.
• the previous network management used in the vehicle can also be used when the Ethernet is introduced as a network in the vehicle.
• At least one node is configured to support at least one of the following scenarios:
• the device according to the invention is designed to carry out all the steps of the presented method.
• individual steps of this method can also be carried out by individual components of the device.
• functions of the device or functions of individual components of the device may be implemented as steps of the method.
• steps of the method may be implemented as functions of at least one component of the device or of the entire device.
• the wake-up logic of a device which may be formed as nodes or subscribers of the Ethernet or a wired network for the transmission of data
• additional Comparison register which may be configured as configurable memory cells to expand.
• additional comparison registers can be provided exclusively for storing the bit pattern, which are compared with the content of the received data packet for changing or changing the operating state of the device.
• These additional comparison registers thus represent a supplement to the device, which may otherwise have further comparison registers for other purposes.
• a plurality of comparison registers with bit patterns are integrated in one device.
• These comparison registers can be configured in various ways.
• a node or a device is, for example, designed as a sensor, actuator or control device for at least one component of a motor vehicle.
• the device or the node compares a content of received data packets within transmitted data streams and thus of transmitted messages for conformity with the contents of the comparison registers and thus several bit patterns that are provided for the at least one device.
• the device matches a content of at least one comparison register, usually the bit pattern, at an arbitrary location of one
• the content of a data packet sent includes a plurality of data, each of which may be encoded and / or configured as a bit pattern described above, which causes a change in an operating state of at least one device.
• bit patterns which are sent with the data packet can also be referred to as so-called change bit patterns.
• a device is associated with a plurality of described bit patterns which are stored in comparison registers.
• bit patterns With at least one bit pattern, an identification of a device and thus, for example, also an assignment of the device to a plurality of groups of devices is possible.
• a bit pattern is typically provided for identifying a device within the network.
• any configuration can be made, after which it is decided whether the content of a comparison register is to be used for the comparison at all.
• the deactivation of a comparison register can be regulated, for example, via its content itself.
• a configuration of a comparison register whose content comprises only zeros leads to the deactivation of the comparison register.
• a comparison register can be deactivated if the bit pattern has only zeros and / or comprises a predefined structure. In general, any other register value or other provision is conceivable for this purpose.
• An activation of a comparison register and / or a generation of a bit pattern to be stored in a comparison register can be carried out at any time by suitable measures as required.
• comparison registers it may also be possible to concatenate and thus connect any number of existing comparison registers and / or to link contents, usually stored in the comparison system bit pattern, cross-register overcompatibility. This makes it possible to provide also bit patterns which are longer than a single comparison register.
• the comparison registers are automatically backed up with a standard bit pattern, which can take place immediately after switching on or after a reset of a device and is then stored independently of the state in the comparison register. This could be the manual configuration, eg. B. via software, omitted. In this case, it is also conceivable to provide a selection option for the standard bit pattern. This could be done, for example, via the wiring of one or more pins of the node-shaped device.
• the comparison registers can typically be integrated in any memory technology, RAM, EEPROM, FLASH.
• a comparison register is used for the change between any two operating states of a node.
• the device may be associated with the comparison registers regardless of whether the device is connected to the network or not. Typically, the device is then configured as a node of the network when connected to the network.
• a device may receive it by receiving a data packet whose contents, i. H. Change bit pattern to match with bit patterns of the comparison registers of the device for which the operating state is to be changed.
• the devices of the network designated as nodes can be designed as so-called slaves whose operating states can typically be changed by a higher-level device designed as a master by sending data packets with suitable content.
• devices designed as slaves within the network exchange data packets with one another and thus can mutually change their operating states and thus change them.
• IP Internet Protocol
• UDP User Datagram Protocol
• IP Internet Protocol
• UDP User Datagram Protocol
• the invention may be used, as a rule, for a vehicle designed as a motor vehicle, for example, which comprises a network with a number of different devices.
• FIG. 1 shows a schematic representation of a network which comprises a plurality of examples of devices according to the invention when carrying out an embodiment of the method according to the invention.
• FIG. 1 shows a schematic representation of a network 2 comprising a plurality of devices 4, 6, 8, 10, 12, 14, 16. These devices 4, 6, 8, 10, 12, 14, 16 are designed to perform data processing operations, usually arithmetic operations.
• these devices 4, 6, 8, 10, 12, 14, 16 via physical connection elements 20, which are designed here as a cable, connected to each other via the network 2.
• the devices 4, 6, 8, 10, 12, 14, 16 can exchange data with each other via the physical connection elements 20 of the network 2, which are typically provided via electrical signals.
• the described network 2 is arranged in a vehicle which is designed here as a motor vehicle 19 and is surrounded by dashed lines.
• each device 4, 6, 8, 10, 12, 14, 16 has a plurality of configurable memory cells 22, each symbolically represented by rectangles.
• a plurality of associated comparison registers are integrated in each device 4, 6, 8, 10, 12, 14, 16.
• a bit pattern 100, 102, 104, 106, 108, 110, 112 is provided.
• Such a bit pattern 100, 102, 104, 106, 108, 110, 112, 114, 16, 18 can be dynamically generated and / or changed during operation.
• a first comparison register has a first bit pattern 100 and a second comparison register has a second bit pattern 102.
• a first compare register has the first bit pattern 100
• a second compare register has a third bit pattern 104
• a third compare register has a fourth bit pattern 106.
• a first comparison register also has the first bit pattern 100 and a second comparison register has a fifth bit pattern 108.
• a first comparison register has the first bit pattern 100 and a second comparison register has a sixth bit pattern 110.
• a first comparison register has the first bit pattern 100, a second comparison register the third bit pattern 104, a third comparison register a seventh bit pattern 1 12 and a fourth comparison register an eighth bit pattern 1 14.
• a first compare register has the first bit pattern 100, a second compare register has the seventh bit pattern 1 12, and a third compare register has a ninth bit pattern 16.
• a first comparison register has the first bit pattern 100 and a second comparison register has a tenth bit pattern 1 18.
• FIG. 1 shows a data packet 120 schematically represented by an arrow, which here contains as content a plurality of bit patterns, which are referred to here as so-called alternating signals.
• Bit patterns 122, 124, 126, 128 This data packet 120 is to be sent via the connection elements 20 of the network 2 within the network 2.
• the bit patterns formed as change bit patterns 122, 124, 126, 128 within the data packet 20 are intended to change a state of operation of at least one of the devices 4, 6, 8, 10,
• the at least one device 4, 6, 8, 10, 12, 14, 16 are at least two and thus a plurality of comparison registers with bit patterns 100, 102, 104, 106, 108, 110, 12, 1, 14, 16, stored therein. 1 18 assigned.
• the data packet 120 transmitted via connection elements 20 of the network 2 is received by the at least one device 4, 6, 8, 10, 12, 14, 16, and a content of the data packet 120, i. H.
• the alternating bit patterns 122, 124, 126, 128 with the bit patterns 100, 102, 104, 106, 108, 1 10, 1 12, 1 14, 1 16, 1 18 of the comparison registers associated with the devices 4, 6, 8, 10, 12, 14, 16 are compared.
• a change in the operating state of the at least one device 4, 6, 8, 10, 12, 14, 16 takes place when the at least one device 4, 6, 8, 10, 12,
• the apparatuses 4, 6, 8, 10, 12, 14, 16 use bit patterns of the alternating bit patterns 122, 124, 126, 128 with the bit patterns 100, 102, 104, 106, 108, 110 stored in the comparison registers , 1 12, 1 14, 1 16, 1 18 compared.
• the comparison registers of all devices 4, 6, 8, 10, 12, 14, 16 have the first bit pattern 100. If, with the data packet 120 as content via one of the alternating bit patterns 122, 124, 126, 128, the first bit pattern now appears
• the second device 6 and the fifth device 12 within a configurable memory cell 22 are assigned a comparison register which has the third bit pattern 104 in each case.
• U.N- Under this condition, the second device 6 and the fifth device 12 within the network 2 form a first group. Operating states of these two mentioned devices 6, 12 can now be changed by sending the third bit pattern 104 via the data packet 120 as one of the alternating operating patterns 122, 124, 126, 128.
• the fifth, sixth and seventh devices 12, 14, 16 have in common that each of a configurable memory device 22 of said three devices 12, 14, 16 is assigned a comparison register with the common seventh bit pattern 1 12.
• the fifth, sixth and seventh devices 12, 14, 16 within the network 2 form a second group. Operating states of these three devices 12, 14, 16 of the second group are changed in an embodiment of the method by the data packet 120 as one of the alternating bit pattern 122, 124, 126, 128 for the devices 12, 14, 16 of the second group jointly provided seventh bit pattern 1 12 is transmitted.
• each device 4, 6, 8, 10, 12, 14, 16 an individual, only the respective device 4, 6, 8, 10, 12, 14, 16 associated bit pattern 102, 106, 108, 1 10, 1 14th , 1 16, 1 18 on.
• the first device 2 here has the individual second bit pattern 102, the second device 6 the individual fourth bit pattern 106, the third device 8 the individual fifth bit pattern 108, the fourth device 10 the individual sixth bit pattern 1 10, the fifth device 12 the individual eighth bit patterns 1 14, the sixth device 14 the individual ninth bit pattern 1 16 and the seventh device 16 the individual tenth bit pattern 1 18 on.
• bit patterns 100, 102, 104, 106, 108, 110, 112, 14, 16, 18 can also be changed dynamically during operation of the devices 4, 6, 8, 10, 12, 14, 16 ,
• each one of said individual bit patterns 102, 106, 108, 1 10, 1 14, 1 16, 1 18 is transmitted, as soon as a respective device 4, 6, 8, 10, 12, 14, 16 receives the respectively associated individual bit pattern 102, 106, 108, 1 10, 1 14, 1 16, 1 18, only one operating state of respective device 4, 6, 8, 10, 12, 14, 16 changed.
• At least one device 4, 6, 8, 10, 12, 14, 16 upon receipt of a bit pattern 100, 102, 104, 106, 108, 1 10, 1 12, 1 14, 1 16, 1 18, which is identical to one of the alternating bit patterns 122, 124, 126, 128 of a data packet 120, performs a change from a sleep state to a wake state.
• a device 4, 6, 8, 10, 12, 14, 16 it is possible for a device 4, 6, 8, 10, 12, 14, 16 to receive one of these devices 4, 6, 8, 10, 12, 14, 16 associated with a bit pattern 100 when the operating state is changed , 102, 104, 106, 108, 110, 112, 14, 16, 18 as content of the data packet 120 is transitioned from a wakeful state to a sleepful state.
• the first device 4 is designed as a so-called master within the network 2 and all other devices 4, 6, 8, 10, 12, 14, 16 as so-called slaves are formed within the network 2.
• the data packet 120 is sent from the first device 2 embodied as master to the other devices 4, 6, 8, 10, 12, 14, 16 configured as slaves, so that the content of the data packet 120 corresponding to FIG sent bit pattern 100, 102, 104, 106, 108, 1 10, 1 12, 1 14, 1 16, 1 18 operating states of the devices 4, 6, 8, 10, 12, 14, 16 are changed.
• the first device 4 it is also possible that starting from the first device 4 as
• this device 4 changes its own operating state. can, if as the content within the data packet 120 as one of the alternating bit pattern 122, 124, 126, 128 either the bit pattern 100 or 102 is sent. Normally, all devices 4, 6, 8, 10, 12, 14, 16, which are also designed as so-called slaves, can send data packets 120 with the alternating bit patterns 122, 124, 126, 128 as content and thus change operating states of other devices 4, 6, 8, 10, 12, 14, 16 cause.
• the second device 6 belongs to two groups, since this device 6 u. a. the first bit pattern 100 and the third bit pattern 104 are assigned.
• the fifth device 12 is u. a. the first bit pattern 100, the third bit pattern 104 and the seventh bit pattern 1 12 are assigned, so that the fifth device 12 assigned to three groups and therefore associated.
• the sixth device 14 and the seventh device 16 are each assigned the first bit pattern 100 and the seventh bit pattern 1 12, so that these two devices 14, 16 belong to the same two groups.

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• Engineering & Computer Science (AREA)
• Computer Networks & Wireless Communication (AREA)
• Signal Processing (AREA)
• Theoretical Computer Science (AREA)
• Human Computer Interaction (AREA)
• Physics & Mathematics (AREA)
• General Engineering & Computer Science (AREA)
• General Physics & Mathematics (AREA)
• Small-Scale Networks (AREA)

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• 2010
  • 2010-05-06 DE DE102010028665A patent/DE102010028665A1/de not_active Withdrawn
• 2011
  • 2011-04-07 JP JP2013508418A patent/JP2013530595A/ja active Pending
  • 2011-04-07 CN CN2011800225230A patent/CN102870371A/zh active Pending
  • 2011-04-07 KR KR1020127031405A patent/KR20130099813A/ko not_active Application Discontinuation
  • 2011-04-07 EP EP11713263A patent/EP2567506A1/de not_active Withdrawn
  • 2011-04-07 WO PCT/EP2011/055422 patent/WO2011138120A1/de active Application Filing
  • 2011-04-07 US US13/696,459 patent/US20130111074A1/en not_active Abandoned

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