EP2481704B1 - Randmontierter Sensor - Google Patents

Randmontierter Sensor Download PDF

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Publication number
EP2481704B1
EP2481704B1 EP12153320.2A EP12153320A EP2481704B1 EP 2481704 B1 EP2481704 B1 EP 2481704B1 EP 12153320 A EP12153320 A EP 12153320A EP 2481704 B1 EP2481704 B1 EP 2481704B1
Authority
EP
European Patent Office
Prior art keywords
sensor
glass
layer
silicon
mechanical layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Not-in-force
Application number
EP12153320.2A
Other languages
English (en)
French (fr)
Other versions
EP2481704A2 (de
EP2481704A3 (de
Inventor
Michael Foster
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell International Inc
Original Assignee
Honeywell International Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell International Inc filed Critical Honeywell International Inc
Publication of EP2481704A2 publication Critical patent/EP2481704A2/de
Publication of EP2481704A3 publication Critical patent/EP2481704A3/de
Application granted granted Critical
Publication of EP2481704B1 publication Critical patent/EP2481704B1/de
Not-in-force legal-status Critical Current
Anticipated expiration legal-status Critical

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0074—3D packaging, i.e. encapsulation containing one or several MEMS devices arranged in planes non-parallel to the mounting board
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/146—Mixed devices
    • H01L2924/1461—MEMS

Definitions

  • micromechanical devices such as micromechanical gyroscopes
  • hermetic sealing is achieved by mounting the device in a hermetically-sealed housing or enclosure.
  • Input and output electrical connections to and from the enclosed device are provided by embedding conductors through portions of the enclosure to permit conductive traces or wires to be connected to the device.
  • this type of hermetically-sealed enclosure tends to be relatively costly.
  • tolerances associated with mounting the device in the enclosure may affect the accuracy of a device, which is sensitive to spatial orientation.
  • some inertial systems utilize three inertial rate sensors arranged orthogonally with respect to one another. When each such sensor is mounted in a respective hermetically-sealed enclosure, tolerances associated with mounting each sensor in the respective enclosure, as well as tolerances associated with mounting the enclosed packages in orthogonal relationship with respect to each other, may adversely affect the accuracy of the system.
  • the present invention provides a method for making a sensor device package for side mounting on a circuit board.
  • a sensor device(s) is created in a mechanical layer of silicon that is bonded to a first layer of glass.
  • a second layer of glass is attached to the mechanical layer of silicon to create a wafer.
  • a first via(s) is created in the first and/or second layers of glass to expose a predefined area on a surface of the mechanical layer of silicon.
  • a second via(s) is created in the first and/or second layers of glass.
  • the least one second via has a depth dimension that is less than a depth dimension of the first via.
  • a metallic trace is applied between the exposed area on the mechanical layer of silicon and a portion of the second via.
  • the wafer is sliced such that the second via is separated into two sections, thereby creating a sensor die.
  • the sensor die is then electrically and mechanically bonded to a circuit board at the sliced second via.
  • the sensor device is hermetically sealed between the first or second layers of glass.
  • the sensor device is an accelerometer.
  • two other sensor dies are attached to the circuit board such that sense axes of the other sensor dies are perpendicular to a sense axis of the first sensor die.
  • FIGURE 1 illustrates an example of a die 20 mounted vertically to a circuit board 22.
  • the die 20 includes a mechanical layer 25 having at least one microelectromechanical systems (MEMS) device (i.e., sensor).
  • MEMS microelectromechanical systems
  • the mechanical layer 25 includes an accelerometer configured to sense motion in a vertical plane (arrow 28) (i.e., perpendicular to the circuit board 22).
  • Two accelerometers identical to that packaged in the mechanical layer 25 of the die 20 may be packaged into other dies and mounted orthogonally to the die 20 in a conventional manner. Also, the sense axes for the two alternate accelerometer die packages are orthogonal to each other, thereby providing a device that includes three identical in-plane accelerometers that will sense acceleration in three orthogonal axes.
  • the die 20 is attached mechanically and electrically to the circuit board 22 by electrically conductive beads 34 that attach to traces 32 located on angled portions of top or bottom surfaces of handle layers 24, 26 (e.g., glass) that are located on opposing sides of the mechanical layer 25 (i.e., silicon). Vias 30 are formed in the respective glass handle layer 26 or 24 for exposing portions of the mechanical layer 25.
  • the portion of the exposed mechanical layer 25 includes an electrical trace that connects to an active component located within the mechanical layer 25.
  • the trace 32 connects the electrical bead 34 (e.g., gold) with the electrical lead located on the mechanical layer 25 at the exposed surface.
  • FIGURE 2-1 illustrates a wafer 50 that includes a previously machined silicon layer 52 that includes one or more active devices, such as accelerometers or gyros.
  • the machined silicon layer 52 is attached to a base layer of glass 56 before creation of the active devices.
  • a cover layer of glass 54 is bonded to the machined silicon layer 52 after creation of the active devices.
  • the cover layer of glass 54 provides a hermetic seal of the active devices.
  • FIGURE 2-2 shows the results of two separately performed processes, whereby vias 60 and 62 are formed within the glass layers 54, 56, respectively.
  • the vias 60, 62 are formed using standard glass-etching techniques.
  • the vias 60, 62 expose sections of the silicon layer 52 for exposing electrical leads (not shown) that are connected to the active components located within the silicon layer 52 for providing access to signals associated with the active component.
  • the vias 60, 62 do not compromise the hermetic seal.
  • FIGURE 2-3 shows that second vias 66 and 68 have been etched into the glass layers 54, 56.
  • the vias 66, 68 do not penetrate all the way to the machined silicon layer 52 and are aligned along a predefined axis 80, such that a base of the vias 66, 68 is located approximately at the axis 80.
  • the axis 80 represents a predefined cut line used for separating the wafer 50 into a plurality of individual sensor units.
  • the vias 66, 68 are performed by two separate processes. Next, also performed by two separate processes, is the application of electrical traces 70, 72 that are applied at least between the bottom of the vias 66, 68 and the surface of the machined silicon layer 52. In one embodiment, a single trace connects a small via to the silicon layer within a large via.
  • the wafer is sliced along the axis 80 to create a plurality of sensor units. Then one of the sensor units is bonded to the circuit board 22 ( FIGURE 1 ) or a comparable device.
  • the separated individual sensor units are attached to the circuit board using gold beads, such as the beads 34 ( FIGURE 1 ), according to standard mechanical processing techniques.
  • the gold beads attach to the traces 70, 72 at the angled wall of the vias 66, 68 where the separation along the axis 80 occurred.
  • FIGURE 3 illustrates an exemplary accelerometer die 90 that includes an accelerometer located within a silicon layer 92 that is sandwiched between a first glass layer 94 and a second glass layer 96.
  • a plurality of vias 100 has been etched into an exposed surface of the first glass layer 94.
  • the vias 100 are etched all the way to the surface of the silicon layer 92 to expose electrical traces (not shown) located on the silicon layer 92.
  • Smaller vias 102 are located at a base edge of the first and second glass layers 94, 96. The smaller vias 102 do not expose the surface of the silicon layer 92.
  • a metallization pattern (e.g., electrical traces 104) is applied to the glass layers 94, 96 and into the vias 100, 102 and to any electrical lead located on the surface of the silicon layer 92.
  • metallic beads (not shown) are inserted into the smaller vias 102 and then temperature is increased and/or pressure is applied between the package 90 and a circuit board (not shown) in order to create a bond between the metallic beads, the circuit board, and the package 90.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Pressure Sensors (AREA)
  • Micromachines (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Dicing (AREA)

Claims (10)

  1. Verfahren, das Folgendes umfasst:
    Erzeugen mindestens einer Sensorvorrichtung in einer mechanischen Schicht (25) aus Silizium, die mit einer ersten Schicht (24) aus Glas verbunden ist;
    Anbringen einer zweiten Schicht (26) aus Glas an der mechanischen Schicht aus Silizium, um einen Wafer zu erzeugen;
    Erzeugen mindestens eines ersten Kontaktlochs (30) in der ersten und/oder der zweiten Schicht aus Glas, um einen vorgegebenen Bereich auf der Oberfläche der mechanischen Schicht aus Silizium freizulegen;
    Erzeugen mindestens eines zweiten Kontaktlochs (66, 68) in derselben Schicht aus Glas, wobei das mindestens eine zweite Kontaktloch nicht den ganzen Weg bis zu der mechanischen Schicht aus Silizium vordringt;
    Aufbringen einer metallischen Spur (70, 72) zwischen dem freigelegten Bereich auf der mechanischen Schicht aus Silizium und mindestens einem Teil des mindestens einen zweiten Kontaktlochs;
    Zerteilen des Wafers so, dass das mindestens eine zweite Kontaktloch in zwei Abschnitte getrennt wird, wodurch ein erster Sensorchip erzeugt wird, und
    elektrisches und mechanisches Verbinden des ersten der zerteilten Sensorchips mit einer Leiterplatte an einem Teil eines Rests einer Wand des zerteilten zweiten Kontaktlochs.
  2. Verfahren nach Anspruch 1, wobei die Sensorvorrichtung zwischen der ersten oder der zweiten Schicht aus Glas hermetisch abgedichtet ist.
  3. Verfahren nach Anspruch 2, wobei die mindestens eine Sensorvorrichtung einen Beschleunigungssensor umfasst.
  4. Verfahren nach Anspruch 3, das ferner das Anbringen eines oder mehrerer anderer Sensorchips auf der Leiterplatte umfasst, so dass die Erfassungsachsen des einen oder der mehreren anderen Sensorchips senkrecht zu einer Erfassungsachse des ersten Sensorchips sind.
  5. Sensorchipbaugruppe, die Folgendes umfasst:
    einen Sensorchip (20), der Folgendes umfasst:
    eine mechanische Schicht (25) aus Silizium, die mit einer ersten Schicht (24) aus Glas verbunden ist, wobei die mechanische Schicht eine Sensorvorrichtung umfasst;
    eine zweite Schicht (26) aus Glas, die an der mechanischen Schicht aus Silizium angebracht ist;
    mindestens ein erstes Kontaktloch (30) in mindestens der ersten und/oder der zweiten Schicht aus Glas, das konfiguriert ist, einen vorgegebenen Bereich auf einer Oberfläche der mechanischen Schicht aus Silizium freizulegen;
    mindestens ein zweites Kontaktloch (66, 68) in derselben Schicht aus Glas, wobei das mindestens eine zweite Kontaktloch nicht den ganzen Weg zu der mechanischen Schicht aus Silizium vordringt;
    eine metallische Spur (70, 72), die zwischen dem freigelegten Bereich auf der mechanischen Schicht aus Silizium und mindestens einem Teil des mindestens einen zweiten Kontaktloch angeordnet ist, wodurch die zweiten Kontaktlöcher in zwei Abschnitte getrennt sind und der Sensorchip mit einer Leiterplatte (22) elektrisch und mechanisch verbunden ist.
  6. Baugruppe nach Anspruch 5, wobei die Sensorvorrichtung zwischen der ersten oder der zweiten Schicht aus Glas hermetisch abgedichtet ist.
  7. Baugruppe nach Anspruch 6, wobei die mindestens eine Sensorvorrichtung einen Beschleunigungssensor umfasst.
  8. Baugruppe nach Anspruch 5, wobei der Sensorchip ein Beschleunigungssensor ist und die Baugruppe ferner Folgendes umfasst:
    einen zweiten und einen dritten Sensorchip, die von einem Wafer gebildet sind, der für die Erzeugung des ersten Sensorchips verwendet wurde, wobei der zweite und der dritte Sensorchip jeweils eine Sensorvorrichtung umfassen, und
    mehrere metallische Perlen, die konfiguriert sind, den ersten, den zweiten und den dritten Chip so mit einer Leiterplatte zu verbinden, dass die Erfassungsachsen für jede der Sensorvorrichtungen senkrecht sind.
  9. Baugruppe nach Anspruch 8, wobei die Sensorvorrichtungen zwischen der ersten oder der zweiten Schicht aus Glas hermetisch abgedichtet sind.
  10. Baugruppe nach Anspruch 9, wobei die Sensorvorrichtungen Beschleunigungssensoren umfassen.
EP12153320.2A 2011-02-01 2012-01-31 Randmontierter Sensor Not-in-force EP2481704B1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/019,175 US8987840B2 (en) 2011-02-01 2011-02-01 Edge-mounted sensor

Publications (3)

Publication Number Publication Date
EP2481704A2 EP2481704A2 (de) 2012-08-01
EP2481704A3 EP2481704A3 (de) 2014-01-01
EP2481704B1 true EP2481704B1 (de) 2014-06-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP12153320.2A Not-in-force EP2481704B1 (de) 2011-02-01 2012-01-31 Randmontierter Sensor

Country Status (4)

Country Link
US (1) US8987840B2 (de)
EP (1) EP2481704B1 (de)
JP (1) JP5999908B2 (de)
CN (1) CN102680735A (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7031178B2 (ja) * 2017-08-31 2022-03-08 株式会社デンソー 半導体装置およびその製造方法
JP6996459B2 (ja) 2018-09-06 2022-01-17 三菱電機株式会社 物理量検出センサの製造方法、物理量検出センサ

Family Cites Families (16)

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EP0660119B1 (de) * 1993-12-27 2003-04-02 Hitachi, Ltd. Beschleunigungsmessaufnehmer
US5503016A (en) 1994-02-01 1996-04-02 Ic Sensors, Inc. Vertically mounted accelerometer chip
JP3864467B2 (ja) * 1996-10-23 2006-12-27 松下電器産業株式会社 電子部品の製造方法
JP2000186931A (ja) * 1998-12-21 2000-07-04 Murata Mfg Co Ltd 小型電子部品及びその製造方法並びに該小型電子部品に用いるビアホールの成形方法
JP2000243900A (ja) 1999-02-23 2000-09-08 Rohm Co Ltd 半導体チップおよびそれを用いた半導体装置、ならびに半導体チップの製造方法
FR2834282B1 (fr) * 2001-12-28 2004-02-27 Commissariat Energie Atomique Procede de renforcement d'une microstructure mecanique
US7253079B2 (en) * 2002-05-09 2007-08-07 The Charles Stark Draper Laboratory, Inc. Coplanar mounting member for a MEM sensor
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US6949807B2 (en) * 2003-12-24 2005-09-27 Honeywell International, Inc. Signal routing in a hermetically sealed MEMS device
JP2006226743A (ja) 2005-02-16 2006-08-31 Mitsubishi Electric Corp 加速度センサ
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CN100422071C (zh) * 2005-10-27 2008-10-01 中国科学院上海微系统与信息技术研究所 微机械加速度计器件的圆片级封装工艺
US7393758B2 (en) * 2005-11-03 2008-07-01 Maxim Integrated Products, Inc. Wafer level packaging process
JP5269741B2 (ja) * 2008-12-24 2013-08-21 新光電気工業株式会社 電子部品用パッケージ及び検出装置
CN101907635A (zh) * 2010-07-15 2010-12-08 瑞声声学科技(深圳)有限公司 制造加速度传感器的方法
US8569090B2 (en) * 2010-12-03 2013-10-29 Babak Taheri Wafer level structures and methods for fabricating and packaging MEMS

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Publication number Publication date
US8987840B2 (en) 2015-03-24
CN102680735A (zh) 2012-09-19
JP5999908B2 (ja) 2016-09-28
JP2012160733A (ja) 2012-08-23
US20120193731A1 (en) 2012-08-02
EP2481704A2 (de) 2012-08-01
EP2481704A3 (de) 2014-01-01

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