Classifications

• • H10P72/70—
• • H10P72/7616—
• • B—PERFORMING OPERATIONS; TRANSPORTING
  • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
  • B23Q—DETAILS, COMPONENTS, OR ACCESSORIES FOR MACHINE TOOLS, e.g. ARRANGEMENTS FOR COPYING OR CONTROLLING; MACHINE TOOLS IN GENERAL CHARACTERISED BY THE CONSTRUCTION OF PARTICULAR DETAILS OR COMPONENTS; COMBINATIONS OR ASSOCIATIONS OF METAL-WORKING MACHINES, NOT DIRECTED TO A PARTICULAR RESULT
  • B23Q3/00—Devices holding, supporting, or positioning work or tools, of a kind normally removable from the machine
  • B23Q3/15—Devices for holding work using magnetic or electric force acting directly on the work
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
  • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
  • H01J37/32—Gas-filled discharge tubes
  • H01J37/32431—Constructional details of the reactor
  • H01J37/32532—Electrodes
  • H01J37/32541—Shape
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
  • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
  • H01J37/32—Gas-filled discharge tubes
  • H01J37/32431—Constructional details of the reactor
  • H01J37/32532—Electrodes
  • H01J37/3255—Material
• • H—ELECTRICITY
  • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
  • H02N—ELECTRIC MACHINES NOT OTHERWISE PROVIDED FOR
  • H02N13/00—Clutches or holding devices using electrostatic attraction, e.g. using Johnson-Rahbek effect
• • H10P72/0434—
• • H10P72/72—
• • H10P72/722—
• • H10P72/7614—

Definitions

• the present disclosure relates to electrostatic chucks and, more particularly, to an electrostatic chuck designs including features that help prevent electrical arcing between the chuck assembly and the wafer being processed or plasma ignition in backside gas distribution channels.
• Electrostatic chucks can be used to fix, clamp or otherwise handle a silicon wafer for semiconductor processing. Many electrostatic chucks are also configured to help regulate the temperature of the wafer during processing. For example, as is well documented in the art, a high thermal conductivity gas such as helium gas can circulated in an electrostatic chuck to help regulate the temperature of the wafer. More specifically, a relatively thin layer of gas at relatively low pressure can be used to sink heat from a silicon wafer during plasma-etch fabrication or other semiconductor processing steps. The relatively low pressure of the gas, which typically exerts only a few pounds of force on the wafer, permits the use of electrostatic attraction to oppose it and seal the wafer to a face of the chuck.
• a high thermal conductivity gas such as helium gas
• a relatively thin layer of gas at relatively low pressure can be used to sink heat from a silicon wafer during plasma-etch fabrication or other semiconductor processing steps.
• the relatively low pressure of the gas which typically exerts only a few pounds of force on the wafer, permits the use of
• the concepts of the present disclosure are applicable to a wide variety of electrostatic chuck configurations that would otherwise be prone to plasma arcing and backside gas ionization including, but not limited to, those illustrated in U.S. Patent Nos. 5,583,736, 5,715,132, 5,729,423, 5,742,331, 6,422,775, 6,606,234, and others.
• the concepts of the present disclosure have been illustrated with reference to the relatively simple chuck configurations of Figs. 1 and 2 for clarity but the scope of the present disclosure should not be limited to these relatively simple configurations.
• an electrostatic chuck assembly comprising a ceramic contact layer, a patterned bonding layer, an electrically conductive base plate, and a subterranean arc mitigation layer.
• the ceramic contact layer and the electrically conductive base plate cooperate to define a plurality of hybrid gas distribution channels formed in a subterranean portion of the electrostatic chuck assembly.
• Individual ones of the hybrid gas distribution channels comprise surfaces of relatively high electrical conductivity presented by the electrically conductive base plate and relatively low electrical conductivity presented by the ceramic contact layer.
• the subterranean arc mitigation layer comprises a layer of relatively low electrical
• a semiconductor wafer processing chamber comprising an electrostatic chuck assembly having one or more of the novel features disclosed herein.
• Fig. 1 is a schematic illustration of an electrostatic chuck assembly according to embodiments of the present disclosure where gas distribution channel surfaces are presented by counter-bored grooves formed in a surface of an electrically conductive base plate;
• Fig. 2 is a schematic illustration of an electrostatic chuck assembly according to embodiments of the present disclosure where gas distribution channel surfaces are presented by counter-bored grooves formed in a ceramic contact layer;
• Fig. 3 is a schematic illustrations of an electrostatic chuck assemblies where a subterranean arc mitigation layer is limited to the hybrid gas distribution channels or regions disposed relatively adjacent thereto;
• Fig. 4 is a schematic illustration of an electrostatic chuck assembly according to embodiments of the present disclosure where gas distribution channel surfaces of relatively low electrical conductivity are presented by one or more sidewall faces of a ceramic contact layer.
• an electrostatic chuck assembly 10 is illustrated in the context of a non-specific semiconductor wafer processing chamber 100 comprising a processing chamber 60, a voltage source 70, and a supply of coolant gas 80.
• the electrostatic chuck assembly 10 is positioned in the processing chamber to secure a wafer 15 for processing and comprises a ceramic contact layer 20, a patterned bonding layer 30, an electrically conductive base plate 40, and a subterranean arc mitigation layer 50.
• the semiconductor wafer processing chamber 100 is described herein as being non-specific because it is contemplated that the concepts of the present disclosure will be applicable to a variety of types of semiconductor wafer processing chambers and should not be limited to chambers similar to that illustrated generally in Figs. 1-4.
• the ceramic contact layer 20 and the electrically conductive base plate 40 cooperate to define a plurality of hybrid gas distribution channels 35 formed in a subterranean portion of the electrostatic chuck assembly 10.
• the ceramic contact layer 20 also comprises a plurality of coolant ports 22 formed in the contact face 25 of the contact layer 20.
• coolant ports 22 formed in the contact face 25 of the contact layer 20.
• "subterranean" portions of the electrostatic chuck assembly 10 lie below the contact face 25 of the ceramic contact layer 20, between the contact face 25 and a distal portion 42 of the electrically conductive base plate 40.
• the wafer 15 is shown to be slightly displaced from the contact face 25 but in operation, the wafer 15 will be electrostatically secured to the contact face 25.
• the patterned bonding layer 30 is configured to secure the ceramic contact layer 20 to the electrically conductive base plate 40 and may comprise, for example, silicone, acrylic or a conventional or yet to be developed adhesive suitable for use in semiconductor wafer processing chambers. To prevent obstruction of coolant flow in the hybrid gas distribution channels 35, the patterned bonding layer 30 can be configured to comprise a pattern of voids that are aligned with the hybrid gas distribution channels 35.
• the coolant ports 22 are in fluid communication with the hybrid gas distribution channels 35 of the electrostatic chuck assembly 10 and the hybrid gas distribution channels 35 are coupled fluidly to the coolant gas supply 80.
• the thermally conductive coolant gas can be directed from the coolant gas supply 80 to the coolant ports 22 via the hybrid gas distribution channels 35, which may be configured to communicate with a common coolant inlet 24 and can be distributed across a coolant plane in the subterranean portion of the electrostatic chuck assembly 10.
• Each of the hybrid gas distribution channels 35 comprise surfaces of relatively high and relatively low electrical conductivity.
• the highly conductive channel surfaces are those presented by the electrically conductive base plate 40, which is typically aluminum or another metal suitable for use in a wafer processing chamber 100.
• the less conductive channel surfaces are presented by the ceramic contact layer 20, which -A- is typically a ceramic dielectric like alumina, aluminum nitride or another electrically insulating dielectric suitable for use in a wafer processing chamber 100.
• the hybrid gas distribution channels 35 can be formed in the subterranean portion of the electrostatic chuck assembly 10 by providing counter-bored grooves in a surface of the electrically conductive base plate 40, a surface of the ceramic contact layer 20, or both.
• gas distribution channel surfaces of relatively high electrical conductivity are presented by forming counter-bored grooves in the electrically conductive base plate 40.
• the counter-bored grooves in the base plate 40 cooperate with low conductivity gas distribution channel surfaces presented by the backside face 27 of the ceramic contact layer 20 to collectively form each hybrid gas distribution channel 35.
• gas distribution channel surfaces of relatively low electrical conductivity are presented by forming counter-bored grooves formed in the ceramic contact layer 20.
• the counter-bored grooves in the ceramic contact layer 20 cooperate with high conductivity gas distribution channel surfaces presented by the frontside face 45 of the electrically conductive base plate 40.
• the coolant ports 22 are expanded in size and the gas distribution channel surfaces of relatively low electrical conductivity are presented by the sidewall faces 29 of the ceramic contact layer 20.
• the subterranean arc mitigation layer 50 which comprises a layer of relatively low electrical conductivity, should be formed over the relatively high conductivity surfaces of the hybrid gas distribution channels 35 to help mitigate destructive arcing that can occur when electric fields in the gas distribution channels 35 reach a point where plasma is ignited in the channels 35 or when process plasma works its way into the channels 35 during wafer processing. In either case, the gas distribution channels 35 can begin to
• the subterranean arc mitigation layer 50 which may comprise a spray-on coating of alumina or another dielectric, performs optimally if it comprises a dielectric layer that characterized by a thickness that is at least approximately 75 ⁇ m but less than
• the subterranean arc mitigation layer 50 comprises a dielectric layer characterized by a thickness that is less than approximately 35 % of a thickness of the ceramic contact layer 20.
• the subterranean arc mitigation layer 50 may comprise a continuous or discontinuous anodized layer or a layer of alumina, yttria, yttrium aluminum garnet, or combinations thereof. It is also contemplated that the subterranean arc mitigation layer 50 may comprise a discontinuous layer that is limited to the hybrid gas distribution channels or regions disposed relatively adjacent thereto, as is illustrated in Fig. 3.
• the ceramic contact layer 20, which typically comprises a substantially planar contact face 25, may comprise any suitable ceramic for use in a wafer processing chamber including, for example, an alumina dielectric, an alumina and titanium dioxide dielectric, aluminum nitride, silicon nitride, silicon carbide, boron nitride, yttria, yttrium aluminate, or any combination thereof, with or without trace impurities. It is contemplated that the ceramic contact layer may further comprise a sintering aid, a bonding agent, a corrosion resistant coating, a mechanically conformal coating, or combinations thereof.
• the electrically conductive base plate may comprise any suitable electrically conductive material for use in a wafer processing chamber including, for example, an electrically conductive aluminum pedestal of substantially uniform composition.

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• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• Plasma & Fusion (AREA)
• Chemical & Material Sciences (AREA)
• Analytical Chemistry (AREA)
• Mechanical Engineering (AREA)
• Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
• Jigs For Machine Tools (AREA)
• Drying Of Semiconductors (AREA)

Applications Claiming Priority (2)

Publications (2)

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Family Applications (1)

Country Status (8)

Cited By (1)

Families Citing this family (10)

Family Cites Families (23)

• 2009
  • 2009-07-30 US US12/512,520 patent/US20110024049A1/en not_active Abandoned
• 2010
  • 2010-06-29 CN CN2010800327935A patent/CN102473672A/zh active Pending
  • 2010-06-29 JP JP2012522844A patent/JP2013500605A/ja active Pending
  • 2010-06-29 EP EP10804865A patent/EP2460179A2/de not_active Withdrawn
  • 2010-06-29 SG SG2012001616A patent/SG177584A1/en unknown
  • 2010-06-29 KR KR1020127002270A patent/KR20120048578A/ko not_active Withdrawn
  • 2010-06-29 WO PCT/US2010/040284 patent/WO2011014328A2/en not_active Ceased
  • 2010-06-29 SG SG10201404264RA patent/SG10201404264RA/en unknown
  • 2010-07-27 TW TW099124694A patent/TW201118979A/zh unknown

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