EP2455988A1 - Élément émettant de la lumière à semiconducteur à base de nitrure - Google Patents

Élément émettant de la lumière à semiconducteur à base de nitrure Download PDF

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EP2455988A1
EP2455988A1 EP10787665A EP10787665A EP2455988A1 EP 2455988 A1 EP2455988 A1 EP 2455988A1 EP 10787665 A EP10787665 A EP 10787665A EP 10787665 A EP10787665 A EP 10787665A EP 2455988 A1 EP2455988 A1 EP 2455988A1
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Prior art keywords
layer
axis
based semiconductor
light
gallium nitride
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EP2455988A4 (fr
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Takashi Kyono
Yohei Enya
Yusuke Yoshizumi
Katsushi Akita
Takamichi Sumitomo
Masaki Ueno
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Sumitomo Electric Industries Ltd
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Sumitomo Electric Industries Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer

Definitions

  • the present invention relates to a nitride-based semiconductor light-emitting device.
  • Patent Documents 1, 2 and Non-patent document 1 discloses a nitride-based semiconductor light-emitting device that includes two nitride semiconductor layers and an active layer.
  • the active layer has an InGaN single-quantum-well structure and is disposed between the two nitride semiconductor layers.
  • the two nitride semiconductor layers and the active layer are disposed on a GaN substrate.
  • the nitride semiconductor light-emitting device described in Patent Document 1 includes an n-type cladding layer of n-type nitride semiconductor, a p-type cladding layer of p-type nitride semiconductor, and an active layer of nitride semiconductor containing at least indium.
  • the active layer is disposed between the n-type cladding layer and the p-type cladding layer.
  • the n-type cladding layer and the p-type cladding layer have smaller coefficients of thermal expansion compared to the active layer.
  • the active layer has a single-quantum-well structure (or multiple-quantum-well structure) and emits light having lower energy than inherent band gap energy of the nitride semiconductor of the active layer.
  • the LED described in Patent Document 2 has an InGaN single-quantum-well structure on the ⁇ 11-22 ⁇ plane of a GaN substrate.
  • the nitride semiconductor laser device described in Patent Document 3 includes a nitride semiconductor layer and an active layer.
  • the semiconductor layer includes a layer of AlGaN.
  • the active layer includes a layer of InGaN and is deposited on the nitride semiconductor layer.
  • the active layer includes a single-quantum-well structure (or multiple-quantum-well structure).
  • the growth surface of the nitride semiconductor layer tilts from a c-plane of the GaN substrate.
  • Non-patent Document 1 " Japanese Journal of Applied Physics", Vol. 45, No. 26, 2006, pp. L659-L662
  • An object of the present invention is to provide a nitride-based semiconductor light-emitting device having an enhanced efficiency of carrier injection to the well layer.
  • An aspect of the present invention is a nitride-based semiconductor light-emitting device.
  • the nitride-based semiconductor light-emitting device comprises a substrate of hexagonal gallium nitride-based semiconductor; an n-type gallium nitride-based semiconductor region disposed on a principal surface of the substrate; a light-emitting layer having a single-quantum-well structure disposed on the n-type gallium nitride-based semiconductor region; and a p-type gallium nitride-based semiconductor region disposed on the light-emitting layer.
  • the light-emitting layer is disposed between the n-type gallium nitride-based semiconductor region and the p-type gallium nitride-based semiconductor region.
  • the light-emitting layer includes a well layer and a barrier layer.
  • the well layer comprises InGaN.
  • the principal surface extends along a reference plane tilting from a plane perpendicular to a c-axis of the hexagonal gallium nitride-based semiconductor at a tilt angle in a range of not less than 63 degrees and not more than 80 degrees or in a range of not less than 100 degrees and not more than 117 degrees.
  • the direction of the piezoelectric polarization generated in the well layer is identical to the direction from the p-type gallium nitride-based semiconductor region to the n-type gallium nitride-based semiconductor region.
  • the principal surface of the substrate extends along the reference plane tilting from the plane perpendicular to the c-axis of the hexagonal gallium nitride-based semiconductor substrate at a tilt angle in a range of not less than 63 degrees and not more than 80 degrees or in a range of not less than 100 degrees and not more than 117 degrees, piezoelectric polarization generated in the well layer is reduced compared to a substrate having a principal surface perpendicular to the c-axis.
  • Indium is successfully incorporated in this range of tilt angle, which is advantageous for a light-emitting device having a long emission wavelength in the visible range.
  • Small piezoelectric polarization generated in a well layer leads to strain of the well structure of the light-emitting layer in the direction that carriers (electrons in particular) barely escape from the well, and the efficiency of the carrier injection (electrons in particular) to the wells decreases in proportion to the number of wells.
  • the well layer of the light-emitting layer has a single-quantum-well structure; hence, the efficiency of the carrier injection (electron injection in particular) to the well layer is higher than that of the multiple-quantum-well structure.
  • the difference in band gap energy between the barrier layer and the well layer is not less than 0.7 eV, and the light-emitting layer emits light having a peak wavelength in a range of not less than 450 nm and not more than 600 nm.
  • the barrier layer comprises, for example, GaN, InGaN, AlGaN, or InAlGaN. Compared to a multiple-quantum-well structure, the injection efficiency of the carriers (electrons in particular) in the light-emitting layer is more significantly enhanced due to the relatively large difference in band gap energy between the well layer and the barrier layer, which is not less than 0.7 eV.
  • the injection efficiency of the carriers (electrons in particular) in the light-emitting layer is more significantly enhanced due to the relatively large difference in band gap energy between the well layer and the barrier layer in the case where the light-emitting layer emits light having a peak wavelength in a range of not less than 450 nm and not more than 600 nm.
  • the nitride-based semiconductor light-emitting device further comprises an InGaN layer.
  • the InGaN layer is disposed between the n-type gallium nitride-based semiconductor region and the light-emitting layer.
  • a lattice constant of the InGaN layer in the direction of a first axis is larger than a lattice constant of the substrate in the direction of a second axis.
  • a lattice constant of the InGaN layer in the direction of a third axis is equal to a lattice constant of the substrate in the direction of a fourth axis.
  • the first axis is shared by a first interface at the substrate side of the InGaN layer and a surface being perpendicular to the first interface and including the c-axis.
  • the second axis is shared by the principal surface and a surface being perpendicular to the principal surface and including the c-axis.
  • the third axis is perpendicular to the first axis and the c-axis.
  • the fourth axis is perpendicular to the second axis and the c-axis.
  • the strain in the well layer of the light-emitting layer is relaxed and the piezoelectric polarization is reduced.
  • a well layer in a light emitting layer having a single-quantum-well structure tends to have larger strain than that of a multiple-quantum-well structure; however, the InGaN layer is lattice-relaxed only in the direction (parallel to the off direction) along the first axis to relax the strain in the well layer of the light-emitting layer. Consequently, even in the single-quantum well layer, defects caused by lattice-mismatching in the well layer is reduced.
  • the InGaN layer includes misfit dislocations generated in the first interface.
  • the misfit dislocations extend along the third axis and have a density in a range of not less than 5 ⁇ 10 3 cm -1 and not more than 1 ⁇ 10 5 cm -1 . In this range, strains in the InGaN layer and a layer disposed on the InGaN layer are effectively relaxed. Since the misfit dislocations are present in the interface away from the light-emitting layer, the misfit dislocations have relatively small influence on properties of the nitride-based semiconductor light-emitting device.
  • the n-type gallium nitride-based semiconductor region includes an n-type InAlGaN layer.
  • a lattice constant of the InAlGaN layer in the direction of a fifth axis is larger than the lattice constant of the substrate in the direction of the second axis.
  • a lattice constant of the InAlGaN layer in the direction of a sixth axis is equal to the lattice constant of the substrate in the direction of the fourth axis.
  • the fifth axis is shared by a second interface at the substrate side of the InAlGaN layer and a surface being perpendicular to the second interface and including the c-axis.
  • the sixth axis is perpendicular to the fifth axis and the c-axis. Since the light-emitting layer is disposed on the InAlGaN layer, which is disposed on the principal surface and is lattice-relaxed only in the direction (parallel to the off direction) along the fifth axis, the strain in the well layer of the light-emitting layer is relaxed and the piezoelectric polarization is reduced.
  • a well layer in a light emitting layer having a single-quantum-well structure tends to have larger strain than that of a multiple-quantum-well structure; however, the InAlGaN layer is lattice-relaxed only in the direction (parallel to the off direction) along the fifth axis to relax the strain in the well layer of the light-emitting layer. Consequently, even in the single-quantum well layer, defects caused by lattice-mismatching in the well layer is reduced.
  • the InAlGaN layer includes misfit dislocations generated in the second interface.
  • the misfit dislocations extend along the sixth axis and have a density in a range of not less than 5 ⁇ 10 3 cm -1 and not more than 1 ⁇ 10 5 cm -1 . In this range, the strains in the InAlGaN layer and a layer disposed on the InAlGaN layer are effectively relaxed. Since the misfit dislocations are present in the second interface away from the light-emitting layer, the misfit dislocations have relatively small influence on properties of the nitride-based semiconductor light-emitting device.
  • a nitride-based semiconductor light-emitting device having an enhanced efficiency of carrier injection to the well layer is provided.
  • Fig. 1 is a drawing schematically showing a structure of an LED 1 according to the first embodiment.
  • the LED 1 is a light-emitting diode (nitride-based semiconductor light-emitting device) including an n-electrode 29, a substrate 5, an n-type gallium nitride-based semiconductor region 7, a buffer layer 9, a light-emitting layer 11, a p-type gallium nitride-based semiconductor region 19, a p-electrode 25, and a pad electrode 27, in sequence along the direction of the z-axis.
  • n-emitting diode nitride-based semiconductor light-emitting device
  • the substrate 5, the n-type gallium nitride-based semiconductor region 7, the buffer layer 9, the light-emitting layer 11, and the p-type gallium nitride-based semiconductor region 19 comprise hexagonal gallium nitride-based semiconductors.
  • a principal surface S1 of the substrate 5 extends along a plane (including the x-axis and y-axis) perpendicular to the z-axis.
  • the principal surface S1 is a semi-polar surface extending along a reference plane S5 tilting from a plane perpendicular to the c-axis of the hexagonal gallium nitride-based semiconductor of the substrate 5 at a tilt angle ⁇ in a range of not less than 63 degrees and not more than 80 degrees or in a range of not less than 100 degrees and not more than 117 degrees.
  • Fig. 1 illustrates the c-axis tilting toward the m-axis as an example.
  • the n-type gallium nitride-based semiconductor region 7 is disposed on the principal surface S1 and is in contact with the substrate 5 at the principal surface S1.
  • the buffer layer 9 is disposed between the n-type gallium nitride-based semiconductor region 7 and the light-emitting layer 11 and is in contact with both the n-type gallium nitride-based semiconductor region 7 and the light emitting layer 11 (barrier layer 13 in particular).
  • a lattice constant of the buffer layer 9 in the direction of a first axis may be larger than a lattice constant of the substrate 5 in the direction of a second axis (substantially in the direction of the x-axis).
  • a lattice constant of the buffer layer 9 in the direction of a third axis may be equal to a lattice constant of the substrate 5 in the direction of a fourth axis (substantially in the direction of the y-axis).
  • the first axis is shared by an interface S3 at the substrate 5 side of the buffer layer 9 and a surface being perpendicular to the interface S3 and including the c-axis.
  • the second axis is shared by the principal surface S1 and a surface being perpendicular to the principal surface S1 of the substrate 5 and including the c-axis.
  • the third axis is perpendicular to the first axis and the c-axis.
  • the fourth axis is perpendicular to the second axis and the c-axis.
  • each of the substrate 5 and the buffer layer 9 provided in the LED 1 has its own lattice constant.) Since the buffer layer 9 is lattice-relaxed, the strain is released in the buffer layer 9 to reduce strain generated in a well layer 15. In this case, the buffer layer 9 includes misfit dislocations generated in the interface S3. The misfit dislocations extend in the direction of the third axis and have a density in a range of not less than 5 ⁇ 10 3 cm -1 and not more than 1 ⁇ 10 5 cm -1 .
  • the light-emitting layer 11 is disposed between the n-type gallium nitride-based semiconductor region 7 and the p-type gallium nitride-based semiconductor region 19 and between the buffer layer 9 and an electron-blocking layer 21, and is in contact with both the buffer layer 9 and the electron-blocking layer 21.
  • the light-emitting layer 11 has a single-quantum-well structure and includes a barrier layer 13, the well layer 15, and a barrier layer 17 in sequence along the direction of the z-axis on the buffer layer 9.
  • the light-emitting layer 11 emits light having a peak wavelength in a range of not less than 450 nm and not more than 600 nm.
  • the barrier layer 13 is disposed between the buffer layer 9 and the well layer 15 and is in contact with both the buffer layer 9 and the well layer 15.
  • the well layer 15 is disposed between the barrier layer 13 and the barrier layer 17 and is in contact with both the barrier layer 13 and the barrier layer 17.
  • the barrier layer 17 is disposed between the well layer 15 and the electron-blocking layer 21 and is in contact with both the well layer 15 and the electron-blocking layer 21.
  • the difference in band gap energy between each barrier layer 13 or 17 and the well layer 15 is not less than 0.7 eV.
  • the piezoelectric polarization generated in the well layer 15 is negative and the direction of the piezoelectric polarization is identical to the direction from the p-type gallium nitride-based semiconductor region 19 to the n-type gallium nitride-based semiconductor region 7.
  • a greater barrier height to the well layer 15 is provided at the p-type gallium nitride-based semiconductor region 19 side as shown in Part (C) of Fig. 4 compared to the case of positive piezoelectric polarization in the well layer 15 (well structure as shown in Part (A) of Fig. 4 ) or zero piezoelectric polarization in the well layer 15 (well structure as shown in Part (B) of Fig. 4 ). Consequently, in a multiple-quantum-well structure having these wells, the efficiency of the electron injection to the well layer is reduced compared to the LED 1 having a single-well structure. Such an effect is enhanced as the barrier height to the well layer at the p-type gallium nitride-based semiconductor region 19 side increases (i.e., the emission wavelength is longer).
  • the p-type gallium nitride-based semiconductor region 19 includes the electron-blocking layer 21 and a contact layer 23 in sequence along the direction of the z-axis above the light-emitting layer 11.
  • the electron-blocking layer 21 is disposed between the barrier layer 17 and the contact layer 23 and is in contact with both the barrier layer 17 and the contact layer 23.
  • a p-electrode 25 is disposed on the p-type gallium nitride-based semiconductor region 19 (particularly on the surface of the contact layer 23) and is in contact with the contact layer 23.
  • the p-electrode 25 has a contact hole extending through the p-electrode 25 to the surface of the contact layer 23.
  • a pad electrode 27 is disposed on the p-electrode 25 and is in contact with the p-electrode 25.
  • the pad electrode 27 is in contact with the contact layer 23 through the contact hole of the p-electrode 25.
  • An n-electrode 29 is disposed on the surface, opposite to the principal surface S1, of the substrate 5, and is in contact with the substrate 5.
  • the substrate 5 comprises GaN having a semipolar principal surface S1
  • the n-type gallium nitride-based semiconductor region 7 comprises n-type doped GaN.
  • the n-type gallium nitride-based semiconductor region 7 has a thickness of about 2 ⁇ m.
  • the buffer layer 9 comprises n-type doped InGaN.
  • An indium composition of the bluffer layer 9 is 0.02, and a gallium composition of the buffer layer 9 is 0.98.
  • the buffer layer 9 has a thickness of about 100 nm.
  • Each of the barrier layers 13, 17 comprises GaN and has a thickness of about 15 nm.
  • the well layer 15 comprises InGaN.
  • An indium composition of the well layer 15 is 0.30, and a gallium composition of the well layer 15 is 0.70.
  • the well layer 15 has a thickness of about 3 nm.
  • the difference in band gap energy between the well layer 15 and the barrier layer 13 or 17 is about 1 eV.
  • the electron-blocking layer 21 comprises p-type doped AlGaN.
  • An aluminum composition of the electron-blocking layer 21 is 0.18, and a gallium composition of the electron-blocking layer 21 is 0.82.
  • the electron-blocking layer 21 has a thickness of about 20 nm.
  • the contact layer 23 comprises p-type doped GaN and has a thickness of about 50 nm.
  • the p-electrode 25 comprises Ni/Au
  • the pad electrode 27 comprises Ti/Au
  • the n-electrode 29 comprises Ti/Al.
  • a method of making a LED 1 is described below.
  • a substrate 5 having a principal surface S1 that is the (20-21) plane tilting off toward the m-axis by 75 degrees an LED structure having a band of 520 nm is made.
  • the substrate 5 is kept in an atmosphere of NH 3 and H 2 at about 1050°C for about 10 minutes for thermal cleaning to deposit an n-type gallium nitride-based semiconductor region 7 into a thickness of about 2 ⁇ m at about 1100°C.
  • the atmospheric temperature is then reduced to about 840°C to deposit a buffer layer 9 into a thickness of about 100 nm and a light-emitting layer 11 in series.
  • Both barrier layers 13, 17 of the light-emitting layer 11 are deposited at a deposition temperature of about 840°C into a thickness of about 15 nm, and a well layer 15 is deposited at a deposition temperature of about 740°C into a thickness of about 3 nm.
  • the atmospheric temperature is increased to about 1000°C to deposit an electron-blocking layer 21 into a thickness of about 20 nm and a contact layer 23 into a thickness of about 50 nm in series.
  • a Ni/Au p-electrode 25, a Ti/Au pad electrode 27, and a Ti/Al n-electrode 29 are made by vacuum deposition.
  • Fig. 2 illustrates the operation of the LED 1.
  • the graph G1 in Part (A) of Fig. 2 shows radiant intensity versus driving current for the exemplary LED 1, while the graph G2 shows radiant intensity versus driving current for a reference LED.
  • the configuration of the light-emitting layer of the reference LED is different from that of the exemplary LED 1, having a multiple-quantum-well structure including three wells.
  • the other configuration of the reference LED is the same as that of the exemplary LED 1.
  • the graphs G1, G2 show that the exemplary LED 1 having a single-quantum-well structure has higher radiant intensity compared to the reference LED having a multiple-quantum-well structure.
  • the graphs G3, G4 show that the exemplary LED 1 having a single-quantum-well structure has lower driving voltage compared to the reference LED having a multiple-quantum-well structure.
  • the principal surface S1 of the substrate 5 extends along the reference plane S5 tilting from the plane perpendicular to the c-axis of the hexagonal gallium nitride-based semiconductor substrate 5 at a tilt angle ⁇ in a range of not less than 63 degrees and not more than 80 degrees or in a range of not less than 100 degrees and not more than 117 degrees, piezoelectric polarization generated in the well layer 15 can be reduced compared to a substrate having a principal surface S1 perpendicular to the c-axis.
  • Small piezoelectric polarization generated in the well layer 15 leads to strain of the well structure of the light-emitting layer 11 in the direction that carriers (electrons in particular) barely escape from the well, and the efficiency of the carrier injection (electrons in particular) to the wells decreases in proportion to the number of wells.
  • the well layer of the light-emitting layer 11 has a single-quantum-well structure; hence, the efficiency of the carrier injection (electrons in particular) to the well layer is enhanced compared to the multiple-quantum-well structure.
  • the injection efficiency of the carriers (electrons in particular) in the light-emitting layer 11 is significantly higher due to a relatively large difference in band gap energy, not less than 0.7 eV, between the well layer 15 and the barrier layer 13, 17.
  • Fig. 3 is a drawing schematically showing a configuration of an LD 31 according to the second embodiment.
  • the LD 31 is a laser diode (nitride-based semiconductor light-emitting device) and includes an n-electrode 65, a substrate 33, an n-type gallium nitride-based semiconductor region 35, a guiding layer 41, a light-emitting layer 43, a guiding layer 51, a p-type gallium nitride-based semiconductor region 53, an insulating film 61, and a p-electrode 63 in sequence along the predetermined z-axis.
  • the substrate 33, the n-type gallium nitride-based semiconductor region 35, the guiding layer 41, the light-emitting layer 43, the guiding layer 51, and the p-type gallium nitride-based semiconductor region 53 comprise hexagonal gallium nitride-based semiconductors.
  • a principal surface S7 of the substrate 33 extends along a plane (including the x-axis and y-axis) perpendicular to the z-axis.
  • the principal surface S7 is a semipolar surface extending along a reference plane S5 tilting from a plane perpendicular to the c-axis of the hexagonal gallium nitride-based semiconductor of the substrate 33 at a tilt angle ⁇ in a range of not less than 63 degrees and not more than 80 degrees or in a range of not less than 100 degrees and not more than 117 degrees.
  • Fig. 3 illustrates the c-axis tilting toward the m-axis as an example.
  • the n-type gallium nitride-based semiconductor region 35 (n-type semiconductor layer 37 in particular) is disposed on the principal surface S7 and is in contact with the principal surface S7 of the substrate 33.
  • the n-type gallium nitride-based semiconductor region 35 includes the n-type semiconductor layer 37 and a cladding layer 39 disposed in sequence in the direction of the z-axis on the principal surface S7 of the substrate 33.
  • the n-type semiconductor layer 37 is disposed between the substrate 33 and the cladding layer 39 and is in contact with both the substrate 33 and the cladding layer 39.
  • the cladding layer 39 is disposed between the n-type semiconductor layer 37 and the guiding layer 41 and is in contact with both the n-type semiconductor layer 37 and the guiding layer 41.
  • the relation between the lattice constant of the cladding layer 39 and the lattice constant of the substrate 33 may be the same as the relation between the lattice constant of the buffer layer 9 and the lattice constant of the substrate 5 in the LED 1 of the first embodiment described above.
  • a lattice constant of the cladding layer 39 in the direction of a fifth axis may be larger than the lattice constant of the substrate 33 in the direction of an axis (referred to as a second axis similarly defined in the first embodiment) (substantially in the direction of the x-axis).
  • This axis is shared by the principal surface S7 and a plane perpendicular to the principal surface S7 of the substrate 33 and including the c-axis.
  • a lattice constant of the cladding layer 39 in the direction of a sixth axis may be equal to the lattice constant of the substrate 33 in the direction of an axis (referred to as a fourth axis similarly defined in the first embodiment) (substantially in the direction of the y-axis).
  • This axis is perpendicular to the second axis and the c-axis.
  • the fifth axis is shared by an interface S9 at the substrate 33 side of the cladding layer 39 and a surface being perpendicular to the interface S9 and including the c-axis.
  • the sixth axis is perpendicular to the fifth axis and the c-axis.
  • the term "lattice constant" herein is not inherent in material.
  • Each of the substrate 33 and the cladding layer 39 provided in the LD 31 has its own lattice constant.
  • the strain is released in the cladding layer 39 to reduce strain generated in a well layer 47.
  • the cladding layer 39 includes misfit dislocations generated in the interface S9.
  • the misfit dislocations extend in the direction of the sixth axis and have a density in a range of not less than 5 ⁇ 10 3 cm -1 and not more than 1 ⁇ 10 5 cm -1 .
  • the guiding layer 41 is disposed between the n-type gallium nitride-based semiconductor region 35 (cladding layer 39 in particular) and the light-emitting layer 43 (barrier layer 45 in particular) and is in contact with both the cladding layer 39 and the light-emitting layer 43.
  • the relation between the lattice constant of the guiding layer 41 and the lattice constant of the substrate 33 is the same as the relation between the lattice constant of the buffer layer 9 and the lattice constant of the substrate 5 of the LED 1 of the first embodiment described above.
  • the light-emitting layer 43 has a single-quantum-well structure.
  • the light-emitting layer 43 includes the barrier layer 45, a well layer 47, and a barrier layer 49 in sequence along the z-axis on the guiding layer 41.
  • the light-emitting layer 43 emits light having a peak wavelength in a range of not less than 450 nm and not more than 600 nm.
  • the barrier layer 45 is disposed between the guiding layer 41 and the well layer 47 and is in contact with both the guiding layer 41 and the well layer 47.
  • the well layer 47 is disposed between the barrier layer 45 and the barrier layer 49 and is in contact with both the barrier layer 45 and the barrier layer 49.
  • the barrier layer 49 is disposed between the well layer 47 and the guiding layer 51 and is in contact with both the well layer 47 and the guiding layer 51.
  • the guiding layer 51 is disposed between the light-emitting layer 43 (barrier layer 49 in particular) and the p-type gallium nitride-based semiconductor region 53 (electron-blocking layer 55 in particular) and is in contact with both the barrier layer 49 and the electron-blocking layer 55.
  • the difference in band gap energy between barrier layer 45, 49 and the well layer 47 is not less than 0.7 eV Using the same specifications for the barrier layer 45 and guiding layer 41 or the barrier layer 49 and the guiding layer 51, the guiding layers and the barrier layers may be integrated.
  • the piezoelectric polarization generated in the well layer 47 is negative and directed from the p-type gallium nitride-based semiconductor region 53 to the n-type gallium nitride-based semiconductor region 35.
  • a greater barrier height to the well layer 47 is provided at the p-type gallium nitride-based semiconductor region 53 side as shown in Part (C) of Fig.
  • the p-type gallium nitride-based semiconductor region 53 includes the electron-blocking layer 55, a cladding layer 57, and a contact layer 59 in sequence in the direction of the z-axis on the guiding layer 51.
  • the electron-blocking layer 55 is disposed between the guiding layer 51 and the contact layer 59 and is in contact with both the guiding layer 51 and the contact layer 59.
  • the cladding layer 57 is disposed between the electron-blocking layer 55 and the contact layer 59 and is in contact with both the electron-blocking layer 55 and the contact layer 59.
  • the insulating film 61 is disposed on the p-type gallium nitride-based semiconductor region 53 (contact layer 59 in particular) and is in contact with the contact layer 59.
  • the insulating film 61 is provided with a contact hole extending through the insulating film 61 to the surface of the contact layer 59.
  • the p-electrode 63 is disposed on the insulating film 61 and is in contact with the insulating film 61.
  • the p-electrode 63 is in contact with the contact layer 59 through the contact hole of the insulating film 61.
  • the n-electrode 65 is disposed on the surface of the substrate 33 opposite to the principal surface S7, and is in contact with the substrate 33.
  • the substrate 33 comprises GaN having a semipolar principal surface S7, while the n-type semiconductor layer 37 comprises n-type doped GaN.
  • the n-type semiconductor layer 37 has a thickness of about 500 nm.
  • the cladding layer 39 comprises n-type doped InAlGaN.
  • An indium composition of the cladding layer 39 is 0.02, an aluminum composition of the cladding layer 39 is 0.09, and a gallium composition of the cladding layer 39 is 0.89.
  • the cladding layer 39 has a thickness of about 1.5 ⁇ m.
  • Each of the guiding layers 41, 51 comprises InGaN and has a thickness of about 200 nm.
  • An indium composition of each of the guiding layers 41, 51 is 0.03, and a gallium composition of each of the guiding layers 41, 51 is 0.97.
  • Each of the barrier layers 45, 49 comprises GaN and has a thickness of about 15 nm.
  • the well layer 47 comprises InGaN and has a thickness of about 3 nm.
  • An indium composition of the well layer 47 is 0.30, and a gallium composition of the well layer 47 is 0.70.
  • the difference in band gap energy between the well layer 47 and the barrier layer 45 or 49 is about 1 eV.
  • the electron-blocking layer 55 comprises p-type doped AlGaN.
  • An aluminum composition of the electron-blocking layer 55 is 0.12, and a gallium composition of the electron-blocking layer 55 is 0.88.
  • a thickness of the electron-blocking layer 55 is about 20 nm.
  • the cladding layer 57 comprises p-type doped InAlGaN.
  • An indium composition of the cladding layer 57 is 0.02, an aluminum composition of the cladding layer 57 is 0.09, and a gallium composition of the cladding layer 57 is 0.89.
  • the cladding layer 57 has a thickness of about 400 nm.
  • the contact layer 59 comprises p-type doped GaN.
  • the contact layer 59 has a thickness of about 50 nm.
  • the insulating film 61 comprises, for example, SiO 2 .
  • the p-electrode 63 comprises a pad electrode and a Ni/Au layer. This pad electrode comprises a Ti/Au layer. The Ti/Au layer is disposed on the surface of the Ni/Au layer.
  • the n-electrode 65 comprises a pad electrode and a Ti/Al layer. This pad electrode comprises a Ti/Au layer. The Ti/Au layer is disposed on the surface of the Ti/Al layer.
  • An LD structure having a band of 520 nm is fabricated on a substrate 33 having a principal surface S7 that is the (20-21) plane tilting off toward the m-axis by 75 degrees.
  • the substrate 33 is kept in an atmosphere of NH 3 and H 2 at about 1050°C for about 10 minutes for thermal cleaning to deposit an n-type gallium nitride semiconductor region 37 into a thickness of about 500 nm at about 1050°C.
  • the atmospheric temperature is then reduced to about 840°C to deposit a cladding layer 39 into a thickness of about 1.5 ⁇ m.
  • a guiding layer 41, a light-emitting layer 43, and a guiding layer 51 are deposited in series.
  • the guiding layers 41, 51 are deposited at a deposition temperature of about 840°C into a thickness of about 200 nm
  • barrier layers 45, 49 are deposited at a deposition temperature of about 840°C into a thickness of about 15 nm
  • a well layer 47 is deposited at a deposition temperature of about 740°C into a thickness of about 3 nm.
  • the atmospheric temperature is increased to about 1000°C to deposit an electron-blocking layer 55 into a thickness of about 20 nm.
  • the atmospheric temperature is reduced to about 840°C again to deposit a cladding layer 57 into a thickness of 400 nm and a contact layer 59 into a thickness of about 50 nm in series.
  • the insulating film 61 is deposited, and a striped window having a width of about 10 ⁇ m is formed by wet etching.
  • a p-electrode 63 having a Ni/Au layer and a Ti/Au pad electrode, and an n-electrode 65 having a Ti/Al layer and a Ti/Au pad electrode are made by vapor deposition.
  • the substrate 33 and an n-type gallium nitride-based semiconductor region 35, the guiding layer 41, the light-emitting layer 43, the guiding layer 51, and a p-type gallium nitride-based semiconductor region 53 deposited on the substrate 33 are cleaved at the pitch of about 800 ⁇ m.
  • a dielectric multilayer film of SiO 2 /TiO 2 is formed to produce a gain guided laser.
  • a reference LD (a first comparative LD) having a multiple-quantum-well structure including three wells is fabricated.
  • the other configuration of the first comparative LD is the same as that of the exemplary LD 31 except for the configuration of the light-emitting layer.
  • Pulsed electric current is applied to the first comparative LD at a pulse width of 500 nsec and a duty of 0.1%.
  • the exemplary LD 31 has a threshold current of 800 mA, while the first comparative LD has a threshold current of 1100 mA.
  • Both the exemplary LD 31 and the first comparative LD have a lasing wavelength of 520 nm.
  • the exemplary LD 31 has only one InGaN well layer (well layer 47) that has a high refractive index, the light confinement of the exemplary LD 31 is less effective compared to the first comparative LD. However, it is believed that the enhanced efficiency of light emission and the higher carrier density per unit well contribute to such a low threshold current.
  • a second comparative LD having a single-quantum-well structure including an InGaN guiding layer that has an indium composition of 0.01 and a gallium composition of 0.99 is fabricated.
  • the other configuration of the second comparative LD is the same as that of the exemplary LD 31 except for the configuration of the guiding layer.
  • An observation by transmission electron microscopy (TEM) of a cross-section of the exemplary LD 31 shows a misfit dislocation density of 2 ⁇ 10 4 cm -1 in the interface S11 between the guiding layer 41 and the cladding layer 39 that are at the n-side. No misfit dislocation is observed in the well layer 47.
  • TEM transmission electron microscopy
  • the second comparative LD no defect is observed in the interface between a InGaN guiding layer having an indium composition of 0.01 and a gallium composition of 0.99 and a cladding layer having the same configuration as of the cladding layer 39 that are at the n-side, whereas in the light-emitting layer (having the same configuration as that of the light-emitting layer 43), defects at a density of 1 ⁇ 10 8 cm -2 extend from the interface between a well layer (having the same configuration as that of the well layer 47) and the barrier layer (having the same configuration as that of the barrier layer 45, 49) to the surface of a contact layer (having the same configuration as that of the contact layer 59).
  • the principal surface S7 of the substrate 33 extends along the reference plane S5 tilting from the plane perpendicular to the c-axis of the hexagonal gallium nitride-based semiconductor substrate 33 at a tilt angle ⁇ in a range of not less than 63 degrees and not more than 80 degrees or in a range of not less than 100 degrees and not more than 117 degrees, piezoelectric polarization generated in the well layer 47 can be reduced compared to a substrate having a principal surface S7 perpendicular to the c-axis.
  • Small piezoelectric polarization generated in the well layer 47 leads to strain of the well structure of the light-emitting layer 43 in the direction that carriers (electrons in particular) barely escape from the well, and the efficiency of the carrier injection (electrons in particular) to the wells decreases in proportion to the number of wells.
  • the well layer of the light-emitting layer 43 has a single-quantum-well structure; hence, the efficiency of the carrier injection (electrons in particular) to the well layer is enhanced compared to the multiple-quantum-well structure.
  • the injection efficiency of the carriers (electrons in particular) in the light-emitting layer 43 is significantly higher due to a relatively large difference in band gap energy, not less than 0.7 eV, between the well layer 47 and the barrier layer 45 or 49.
  • the light-emitting layer 43 is coherently disposed on the guiding layer 41 that is disposed on the principal surface S7 and lattice-relaxed only in the direction (parallel to the off direction) along the first axis to relax the strain in the well layer 47 of the light-emitting layer 43 and reduce the piezoelectric polarization.
  • misfit dislocations are present in the interface S11 of the guiding layer 41, the misfit dislocations have relatively small influence on properties of the LD 31.
  • the exemplary LED 1 of the first embodiment has a single-quantum-well structure as described above.
  • a reference LED (a first comparative LED) having a light-emitting layer of a multiple-quantum-well structure including three wells is fabricated.
  • the configuration of the first comparative LED example is the same as that of the exemplary LED except for the light-emitting layer having a multiple-quantum-well structure.
  • the first comparative LED in common with the exemplary LED, has epitaxial layers including a light-emitting layer on a surface tilting off toward the m-axis of a hexagonal gallium nitride-based semiconductor by 75 degrees.
  • a single-quantum-well structure having one quantum-well layer is referred to as SQW, and a multiple-quantum-well structure having three quantum-well layers is referred to as 3QW below.
  • the dependence of photoluminescence (PL) characteristics on temperature of the exemplary LED (SQW) and the first comparative LED (3QW) is evaluated.
  • the results are shown in Fig. 5 .
  • the graph G5 in Fig. 5 shows the results from the exemplary LED and the graph G6 in Fig. 5 shows the results from the first comparative LED.
  • argon second harmonic generation (SHG) laser (wavelength of 244 nm) is used for excitation of carriers in the entire epitaxial layers.
  • the light-emitting layers have substantially the same density of excited carriers not depending on the number of wells included in the light-emitting layer (either one quantum-well layer of SQW or three quantum-well layers of 3QW).
  • a non-emitting process is inhibited to enhance the PL intensity.
  • the exemplary LED and the first comparative LED have substantially the same PL intensity. This shows that the exemplary LED and the first comparative LED have the respective light-emitting layers of the same luminance efficiency.
  • the dependence of electroluminescence (EL) characteristics on temperature of the exemplary LED (SQW) and the first comparative LED (3QW) is also evaluated.
  • the results are shown in Fig. 6 .
  • the graph G7 in Fig. 6 shows the results from the exemplary LED, and the graph G8 in Fig. 6 shows the results from the first comparative LED.
  • the EL characteristics shown in Fig. 6 are obtained at a current of 2 mA.
  • the exemplary LED (SQW) has higher EL intensity in the entire range of temperature (temperature range of not higher than 500 K) shown in Fig. 6 compared to the first comparative LED. At a relatively low temperature, the exemplary LED and the first comparative LED have substantially the same PL intensity but different EL intensities.
  • the exemplary LED of SQW has more enhanced carrier injection compared to the first comparative LED of 3QW.
  • another reference LED (a second comparative LED) having a light-emitting layer of 3QW disposed on the c-plane of a hexagonal gallium nitride-based semiconductor GaN substrate is further fabricated.
  • the configuration of the second comparative LED is the same as that of the first comparative LED except for the epitaxial layers including light-emitting layer disposed on the c-plane of a gallium nitride-based semiconductor GaN substrate.
  • Photoluminescence (PL) of each of the exemplary LED, the first comparative LED, and the second comparative LED is evaluated under applied bias voltages at a temperature of 100 K to obtain the relation between the direction of piezoelectric polarization and the carrier injection.
  • the obtained results of the dependence of photoluminescence (PL) wavelength on applied voltage for each of the exemplary LED, the first comparative LED, and the second comparative LED are shown in Fig. 7 .
  • the graph G9 in Fig. 7 shows the results from the exemplary LED
  • the graph G10 in Fig. 7 shows the results from the first comparative LED example
  • the graph G11 in Fig. 7 shows the results from the second comparative LED example.
  • the results in Fig. 8 show the dependence of photoluminescence (PL) intensity on applied voltage of each of the exemplary LED, the first comparative LED, and the second comparative LED.
  • the graph G12 in Fig. 8 shows the results from the exemplary LED
  • the graph G13 in Fig. 8 shows the results from the first comparative LED
  • the graph G14 in Fig. 8 shows the results from the second comparative LED.
  • the results of the PL intensity in Fig. 8 show that, in the relatively low applied voltage range, the second comparative LED exhibits small change in the PL intensity, while both the exemplary LED and the first comparative LED exhibit relatively large decreases in the PL intensity.
  • the exemplary LED of SQW has a more significant relation between the PL intensity and the applied voltage compared to the first comparative LED of 3QW.
  • the barrier height at the n-side for the electron E1 (the barrier height at the n-side in the well layer Q1 is a relative value V2 to the energy level V1 in the well layer Q1) is higher than the barrier height at the p-side for the electron E1 (the barrier height at the p-side in the well layer Q1 is a relative value V3 to the energy level V1 in the well layer Q1). Consequently, it is believed that the second comparative LED has a high PL intensity even in the range of relatively low applied voltage.
  • an LED such as the exemplary LED or the first comparative LED having epitaxial layers including a light-emitting layer disposed on a surface tilting toward the m-axis of a hexagonal gallium nitride-based semiconductor by 75 degrees has "negative" piezoelectric polarization in the well layer to bend the band as shown in Part (B) of Fig. 9 . Consequently, a trapped electron E1 in a well layer Q2 included in the band tends to escape toward the n-side. In the well layer Q2 shown in Part (B) of Fig.
  • the barrier height at the n-side for the electron E1 (the barrier height at the n-side in the well layer Q2 is a relative value V5 to the energy level V4 in the well layer Q2) is higher than the barrier height at the p-side for the electron E1 (the barrier height at the p-side in the well layer Q2 is a relative value V6 to the energy level V4 in the well layer Q2). Consequently, it is believed that the exemplary LED and the first comparative LED exhibit decreases in PL intensity in the range of low applied voltage. It is believed that, in particular, the exemplary LED of SQW exhibits the drastic decrease in PL intensity, because an electron escaping toward the n-side is not trapped again in an adjacent well layer.
  • the first comparative LED has epitaxial layers including a light-emitting layer on a surface tilting off toward the m-axis of a hexagonal gallium nitride-based semiconductor by 75 degrees, and has a plurality of well layers, the distribution of the injected electron densities is inhomogeneous among the respective well layers. Consequently, the exemplary LED has more advantageous effects such as enhanced luminescence efficiency and reduced voltage compared to the first comparative LED.
  • the direction of piezoelectric polarization is determined by biased photoluminescence (PL).
  • the biased photoluminescence (PL) is a method of detecting PL by applying external voltage to the exemplary LED, the first comparative LED, or the second comparative LED and irradiating excitation light onto the Ni/Au electrode (e.g. p-electrode 25).
  • an LED having epitaxial layers including a light-emitting layer of SQW disposed on the c-plane of a sapphire substrate (a third comparative LED emitting light having a wavelength in 470 nm band), and another LED having epitaxial layers including a light-emitting layer of 3QW disposed on the c-plane of a sapphire substrate (a fourth comparative LED emitting light having a wavelength in 470 nm band)
  • Fig. 12 illustrates the results of observed cathodoluminescence (CL) of the third comparative LED
  • Fig. 13 illustrates the results of observed cathodoluminescence (CL) of the fourth comparative LED
  • Fig. 14 illustrates the results of observed cathodoluminescence (CL) of the exemplary LED.
  • the fourth comparative LED of 3QW has relatively uniform luminescence due to a buffering effect of a plurality of well layers with each other for remedy of the inhomogeneous luminescence, even though the epitaxial layers including a light-emitting layer are disposed on the c-plane, like the third comparative LED. It is believed that the fourth comparative LED of 3QW produces relatively homogeneous luminescence from these reasons.
  • the results of cathodoluminescence (CL) observation of the exemplary LED of SQW in Fig. 14 show homogeneous luminescence.
  • the exemplary LED has epitaxial layers including a light-emitting layer of SQW disposed on a surface tilting off toward the m-axis of a hexagonal gallium nitride-based semiconductor by 75 degrees. It is believed that since such an InGaN well layer deposited on a surface tilting off toward the m-axis of a hexagonal gallium nitride-based semiconductor by 75 degrees has a relatively homogeneous crystal structure, the exemplary LED has relatively homogeneous luminescence.
  • the advantageous effect of SQW of the exemplary LED in the first embodiment is particularly remarkable in a plane orientation and depositing condition that enable the InGaN well layer to deposit homogeneously.
  • a principal surface of the substrate tilting from a plane perpendicular to the c-axis in a range of not less than 63 degrees and not more than 80 degrees or in a range of not less than 100 degrees and not more than 117 degrees tends to readily incorporate indium to produce an InGaN well layer having excellent homogeneity.
  • a nitride-based semiconductor light-emitting device having enhanced efficiency of carrier injection to a well layer is provided in accordance with the embodiment of the present invention.

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JP6438542B1 (ja) * 2017-07-27 2018-12-12 日機装株式会社 半導体発光素子
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