EP2445110B1 - Unité de commande de porte pour dispositif de commutation électrique - Google Patents

Unité de commande de porte pour dispositif de commutation électrique Download PDF

Info

Publication number
EP2445110B1
EP2445110B1 EP10188454.2A EP10188454A EP2445110B1 EP 2445110 B1 EP2445110 B1 EP 2445110B1 EP 10188454 A EP10188454 A EP 10188454A EP 2445110 B1 EP2445110 B1 EP 2445110B1
Authority
EP
European Patent Office
Prior art keywords
switching device
gate driver
switching
turn
intelligent gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
EP10188454.2A
Other languages
German (de)
English (en)
Other versions
EP2445110A1 (fr
Inventor
Yanick Lobsiger
Dominik Bortis
Johann Walter Kolar
Matti Laitinen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ABB Research Ltd Sweden
Original Assignee
ABB Research Ltd Switzerland
ABB Research Ltd Sweden
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ABB Research Ltd Switzerland, ABB Research Ltd Sweden filed Critical ABB Research Ltd Switzerland
Priority to EP10188454.2A priority Critical patent/EP2445110B1/fr
Priority to US13/275,819 priority patent/US8604841B2/en
Priority to CN201110329959.6A priority patent/CN102545859B/zh
Publication of EP2445110A1 publication Critical patent/EP2445110A1/fr
Priority to US13/964,366 priority patent/US8963585B2/en
Application granted granted Critical
Publication of EP2445110B1 publication Critical patent/EP2445110B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/30Modifications for providing a predetermined threshold before switching
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/10Modifications for increasing the maximum permissible switched voltage
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/12Modifications for increasing the maximum permissible switched current
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28Modifications for introducing a time delay before switching

Definitions

  • the present invention relates to controlling gate-controlled electrical switching devices, such as MOSFETs, IGBTs, BJTs, and alike.
  • the invention relates to cases where switching devices are connected in parallel between a source and a load, and thus need to be controlled in such a way that a load current is evenly shared between the parallel-connected switching devices during all modes of operation.
  • Parallel-connected switching devices are typically used in applications where high current throughput is required.
  • the parallel connection is in particular needed in inverter bridges feeding high current AC- or DC-loads.
  • FIG 1 illustrates examples of uncompensated schematic current waveforms for three parallel-connected IGBTs.
  • the waveforms show unbalanced current distribution due to differentiating turn-on and turn-off times.
  • Unbalanced currents cause uneven wear and tear in the switching devices. The uneven wear and tear in turn reduce the life-time of the switching devices.
  • unbalanced currents may cause a switching device to reach its maximum temperature rating or maximum current rating faster than when the currents are in balance.
  • Patent publication US5566036A discloses an apparatus and an arrangement for controlling voltages over series-connected switching devices.
  • a drive unit (4) is used for adjusting timings of switching events of the switching devices.
  • a measured voltage over the series connection, divided by the amount of switching devices, is used for determining a common reference voltage.
  • a voltage over each switching device is also measured. The timings of switching events are adjusted on the basis of differences between the voltages over the switching devices and the common reference voltage.
  • An object of the present invention is to provide a method and an apparatus for implementing the method so as to alleviate the above disadvantages.
  • the objects of the invention are achieved by a method and an apparatus which are characterized by what is stated in the independent claims.
  • the preferred embodiments of the invention are disclosed in the dependent claims.
  • the invention is based on the idea of using intelligent gate driver units (IGDU) with distributed intelligence to control parallel-connected electrical switching devices like IGBTs.
  • IGDU intelligent gate driver units
  • the purpose of the intelligence is to balance the currents of the switching devices, even in dynamic switching events.
  • the IGDUs execute the needed measurements independently and establish a needed communication between each other. They may use master-slave or daisy chain control structures and instantaneous or time integral differences of the currents of parallel-connected switching devices as control parameters.
  • the temperature may also be balanced with the intelligent gate driver units.
  • the concept may also be applied to balance the voltages of series-connected power modules.
  • An advantage of the method and apparatus of the invention is that there is no longer a need for derating of parallel-connected power switching devices, or adding passive components to balance the currents, in dynamic switching events. The cost is therefore reduced. Removing the additional passive components also reduces total power losses.
  • Distributing intelligence allows more accurate control of individual switching devices as well as faster response to the dynamic changes and failures. It also facilitates specification of both upper control algorithms controlling the IGDUs and communication between an upper control algorithm and intelligent gate driver units.
  • An apparatus comprises two or more parallel- or series-connected electrical switching devices, each switching device comprising a control terminal.
  • Figure 2 illustrates a simplified diagram of parallel-connected switching devices 11 to 1 n .
  • the switching devices 11 to 1 n are implemented using power modules.
  • a power module may, for instance, contain a single switching device, a switching device and an antiparallel (free-wheeling) diode (FWD), as in Figure 2 , or a half bridge made of these components.
  • FWD antiparallel (free-wheeling) diode
  • a single power module has more than one internally parallel-connected switching device.
  • other emerging topologies may be incorporated in a single power module.
  • a decentralized active gate control according to the present invention is accomplished by distributing calculation and correction of imbalance in currents.
  • the apparatus comprises one or more of intelligent gate driver units.
  • intelligent gate driver units 21 to 2 n for the electrical switching devices 11 to 1 n are shown.
  • temperatures of the switching devices or voltages over the switching devices may be balanced instead of currents.
  • Each intelligent gate driver unit 21 to 2n comprises a control output c 1 to c n which is adapted to be connected to a control terminal of one of the switching devices 11 to 1 n .
  • each of the intelligent gate driver units 21 to 2 n is connected to a control terminal of one of the switching devices 11 to 1 n .
  • Each intelligent gate driver unit 21 to 2 n controls a switching device 11 to 1 n .
  • the IGDUs are equivalent to each other, thus lowering the manufacturing costs. They are all able to operate independently.
  • each intelligent gate driver unit also comprises means for receiving turn-on and turn-off commands for the switching device from an upper level control.
  • the upper level control produces the turn-on and turn-of commands, on the basis of a control algorithm, for instance a PWM algorithm, to fulfil a desired output voltage and current.
  • the upper level control may, for instance, be implanted using a CPU.
  • the IGDUs share the same control input c ref from the upper control level. The control input forms a basis for switching events, but actual switching events are adjusted by the intelligence in the IGDUs and the information shared between them. Transferring information back to the upper controller to adjust the switching events is not required.
  • the intelligent gate driver units comprise means 211 to 21 n for receiving feedback information on turn-on and turn-off events of the switching devices controlled by them.
  • Minimum information required to balance a dynamic current sharing is both rising and falling edges of the current at turn-on and turn-off events, respectively.
  • the means 211 to 21 n for receiving feedback information may for instance be a current measurement with edge detection.
  • the rising and falling edges may be identified by direct current measurement with various methods, for instance by using shunt resistors, current transducers or Rogowski coils.
  • means 31 to 3 n are used for current measurement.
  • Edges can be detected as a voltage drop over an inductance, e.g., the bonding inductance, in the current path or by means of a related value to the current, e.g., the gate-emitter voltage of the semiconductor, as well.
  • the edge information can easily be transferred into digital data by simple comparator circuits.
  • IGDUs may comprise means for measuring a temperature of a temperature difference of a switching device.
  • the intelligent gate driver units also comprise means 221 to 22 n for receiving reference information on device turn-on and turn-off events of another switching device.
  • the reference turn-on and turn-off events are caused by switching devices controlled by other IGDUs.
  • the switching device causing reference events does not always have to be controlled by an IGDU.
  • one of the switching devices may be controlled with a traditional gate driver unit.
  • the other switching device is controlled with an intelligent gate driver unit which receives its reference information from the switching device controlled by the traditional gate driver unit.
  • the reference information may be produced by the other IGDUs.
  • One or more of the intelligent gate driver units may be connected to other intelligent gate driver units to receive reference information on turn-on and turn-off events of switching devices controlled by the other intelligent gate driver units.
  • Figure 3 shows an embodiment of the present invention, where each IGDU 41 to 4 n comprises means 411 to 41 n , 421 to 42 n , and 431 to 43 n similar to the means 211 to 21 n , 221 to 22 n , and 231 to 23 n in Figure 2 , respectively.
  • each IGDU 41 to 4 n comprise means 441 to 44 n for sending reference information on switching events to the other IGDUs.
  • the means 411 to 41 n produce feedback information, and the means 441 to 44 n produce the reference information to be sent from the feedback information.
  • the means 422 to 42 n are adapted to be connected to the means 441 to 44( n-1 ) for receiving reference information of another intelligent gate driver unit.
  • Each IGDU measures switching events of a switching device connected to the IGDU, and sends the switching event information to other IGDUs. In other words, the IGDUs receive their reference switching events directly from other IGDUs.
  • each IGDU comprises means to detect the events of another switching device.
  • one or more of the intelligent gate driver units are connected to other switching devices to receive reference information on turn-on and turn-off events.
  • Figure 2 illustrates this situation.
  • the times of switching events may be aligned using a daisy chain approach.
  • the intelligent gate driver units form a daisy chain adapted to pass reference information from one gate driver unit to another.
  • the IGDU on the left is always the reference to the IGDU ont the right.
  • the first switching device in the daisy chain does not have to be controlled by an IGDU.
  • the first gate driver unit may be a traditional gate driver unit.
  • Another approach is a master-slave approach.
  • a master-slave approach means for receiving reference information of two or more intelligent gate driver units are connected into one source for reference information. For instance, one IGDU may be selected as a master whose switching event information is transferred to all the rest as a reference. The rest then try to follow the master on the basis of the reference.
  • the master may also be a switching device controlled by a traditional gate driver unit. For instance, if the other switching devices are controlled by intelligent gate driver units which receive feedback information directly from an external current measurement, the master does not have to be an IGDU.
  • the minimum reference information required for the comparison is the time of the rising and falling edges. This information can be conveniently transferred as digital signals by using either electrical or optical transducers. The measurement and transforming of the data into digital form may be done in the IGDUs or by using separate means. If other information than reference information on switching events is also transferred between the IGDUs, the same channel can be used or parallel channels can be built. If the same channel is used, a message frame may have to be defined.
  • the electric potential of the IGDU can be freely selected, and the IGDUs may even share the same potential.
  • a natural choice is that each IGDU is in the potential of the power module it is controlling. In case of an IGBT-module, this might be the potential of the auxiliary emitter. In this case, even though the power terminals of parallel power modules are electrically connected, the communication between the different IGDUs has to be isolated due to transient voltages caused by high current change rates and stray inductances in the power modules and the busbars.
  • the IGDUs may themselves comprise the required galvanic isolation.
  • the means for sending or the means for receiving reference information on switching events may, for instance, comprise a galvanic isolation.
  • the galvanic isolation may also be implemented by using separate means.
  • the feedback information is used together with the reference information to determine the amount of unbalance.
  • the IGDUs according to the present invention comprise means for calculating a value for a control parameter on the basis of the reference information and the feedback information.
  • the intelligent gate driver units comprise means for determining a time of a reference switching device event on the basis of the received reference information and means for determining a time of a switching device event on the basis of the received feedback information.
  • the control parameter is then calculated on the basis of the time difference between the switching device event and the reference switching device event.
  • a time integral difference of the currents of parallel-connected switching devices may also be used.
  • the time difference and time integral difference may be used alone or together as control parameters.
  • One or more previous events may be used in the calculation.
  • Information on temperature or temperature difference may also be used as a control parameter.
  • the IGDU according to the present invention also comprises means for controlling, on the basis of the switching device command and the control parameter, a control signal at the control output to control the switching device.
  • the controlling may, for instance, be done by means of adjusting the switching times or controlling the gate voltages.
  • the control objective may be to balance the currents between the switching devices.
  • the temperature may be balanced by the intelligent IGDUs instead of balancing the currents.
  • a coordinated exclusion of a switching device from the switching action or even from the conducting period can be applied.
  • the concept may also be applied to balance the voltages of series-connected power modules.
  • the IGDUs may also have tasks, such as over-current protection and advanced gate control, so the IGDUs may comprise various voltage and temperature measurements.
  • the IGDU according to the present invention may also comprise means for sending feedback information to the upper control. This may be done directly or via the parallel IGDUs.
  • FIG. 4 illustrates convergence of switching times of four switching devices.
  • the daisy chain strategy similar to that illustrated in Figure 2 or 3 , was applied. As the switching events of the parallel-connected switching devices approach each other, the currents become more balanced.
  • Figure 5 shows measured waveforms for two parallel switches, with and without active switching time correction for the two parallel switches.
  • the upper part of Figure 5 shows an approximately 100 ns difference between the rising and falling edges of the two switching devices. This causes unbalance in the currents, particularly at the falling edges.
  • the lower part of Figure 5 illustrates better performance due to more accurate control. The currents are practically equal.
  • FIG 6 illustrates an embodiment of the present invention, using the master-slave approach.
  • Three switching devices 11 to 13 are connected in parallel.
  • Three IGDUs 41 to 43 control the switching devices 11 to 13.
  • the IGDUs 41 to 43 are the same means as in Figure 3 , now using only one master IGDU 41 as a source for a reference for the other slave IGDUs 42 and 43. In this embodiment the switching events are adjusted to balance the currents of the parallel-connected switching devices.
  • FIG. 7 an operational principle of the embodiment in Figure 6 is described schematically.
  • the slave IGDU 42 detects that its switching event happens after the master IGDU 41 switching event and it makes a correction so that the switching event happens earlier.
  • the slave IGDU 43 detects that its switching event happens before the master IGDU 41 switching event and it makes a correction so that the switching event happens later.
  • the slave IGDU 42 notices that the switching delay was over compensated and it makes a correction for a later switching event.
  • the slave IGDU 43 still switches before the master IGDU 41 and the correction is for a later switching event.
  • switching time adjusting is an ongoing action due to the jitter of digital sampling and other artifacts.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Power Conversion In General (AREA)
  • Electronic Switches (AREA)

Claims (10)

  1. Appareil comprenant :
    au moins deux dispositifs de commutation électrique connectés en série ou en parallèle (11 to 1n), chaque dispositif de commutation comprenant une borne de commande, l'appareil comprenant au moins deux unités de commande grille intelligentes (41 à 4n), chaque unité de commande de grille intelligente comprenant :
    une sortie de commande (c 1 bis cn ) connectée à la borne de commande de l'un des dispositifs de commutation (11 à 1n) ;
    des moyens (431 à 43n) destinés à recevoir des commandes de blocage et de déblocage de l'un des dispositifs de commutation (11 à 1n) ;
    des moyens (411 à 41n) destinés à recevoir des informations en retour relatives aux événements de blocage et de déblocage de l'un des dispositifs de commutation (11 à 1n) ;
    des moyens (421 à 42n) destinés à recevoir des informations de référence relatives à des événements de blocage et de déblocage d'un autre des dispositifs de commutation (11 à 1n) ;
    des moyens (421 à 42n) destinés à calculer une valeur d'un paramètre de commande sur la base des informations en retour et des informations de référence ; et
    des moyens (431 à 43n) destinés à commander, sur la base des commandes de blocage et de déblocage et du paramètre de commande, un signal de commande au niveau de la sortie de commande de façon à commander l'un des dispositifs de commutation (11 à 1n), caractérisé en ce que l'autre dispositif de commutation est un dispositif de commutation de référence sélectionné parmi les au moins deux dispositifs de commutation, le dispositif de commutation de référence étant soit un dispositif de commutation voisin de l'un des dispositifs de commutation soit un dispositif de commutation maître sélectionné en tant que dispositif de commutation de référence de toutes les unités de commande de grille intelligentes.
  2. Appareil selon la revendication 1, caractérisé en ce que l'unité de commande grille intelligente (41 à 4n) comprend :
    des moyens destinés à déterminer l'instant d'occurrence d'un événement de dispositif de commutation de référence sur la base des informations de référence reçues ;
    des moyens destinés à déterminer l'instant d'occurrence d'un événement de dispositif de commutation sur la base des informations en retour reçues ;
    des moyens destinés à calculer une valeur du paramètre de commande sur la base de l'instant d'occurrence d'un événement de dispositif de commutation de référence et de l'instant d'occurrence d'un événement de dispositif de commutation ;
    des moyens destinés à commander, sur la base de la commande de dispositif de commutation et du paramètre de commande, un dispositif de commutation (11 à 1n) de façon à réduire la différence de temps entre l'événement de dispositif de commutation de référence et l'événement de dispositif de commutation.
  3. Appareil selon la revendication 1 ou la revendication 2, caractérisé en ce que l'unité de commande de grille intelligente (41 à 4n) comprend des moyens (441 à 44n) destinés à envoyer des informations de référence à d'autres unités de commande de grille intelligentes (41 à 4n), conçus de façon à être connectés aux moyens (421 à 42n) destinés à recevoir des informations de référence d'une autre unité de commande de grille intelligente (41 à 4n).
  4. Appareil selon l'une quelconque des revendications 1 à 3, caractérisé en ce que les unités de commande de grille intelligentes (41 à 4n) forment une chaîne conçue de façon à transmettre des informations de référence d'une unité de commande de grille intelligente à l'autre.
  5. Appareil selon l'une quelconque des revendications 1 à 3, caractérisé en ce que les moyens (421 à 42n) destinés à recevoir les informations de référence des au moins deux unités de commande de grille intelligentes (41 à 4n), sont connectés à une source d'informations de référence.
  6. Appareil selon la revendication 3, caractérisé en ce que les moyens (441 à 44n) destinés à envoyer les informations de référence à d'autres unités de commande de grille intelligentes (41 à 4n) comprennent un isolement galvanique.
  7. Appareil selon l'une quelconque des revendications 1 à 5, caractérisé en ce que les moyens (421 à 42n) destinés à recevoir les informations de référence comprennent un isolement galvanique.
  8. Procédé destiné à commander des dispositifs de commutation (11 à 1n) qui comprennent une borne de commande, dans un agencement qui comprend une pluralité de dispositifs de commutation, dans lequel le procédé commande les dispositifs de commutation (11 à 1n) en utilisant au moins deux unités de commande de grille intelligentes (21 à 2n), et le procédé comprend, pour chaque unité de commande de grille intelligente (21 à 2n), les étapes consistant à :
    recevoir des commandes de blocage et de déblocage pour l'un des dispositifs de commutation (11 à 1n) ;
    recevoir des informations en retour relatives à des événements de blocage et de déblocage de l'un des dispositifs de commutation (11 à 1n) ;
    recevoir des informations de référence relatives à des événements de blocage et de déblocage d'un autre des dispositifs de commutation (11 à 1n) ;
    calculer une valeur d'un paramètre de commande sur la base des informations de référence et des informations en retour ; et
    commander, sur la base des commandes de blocage et de déblocage et du paramètre de commande, un signal de commande au niveau des sorties de commande (c 1 bis cn ) de l'unité de commande de grille intelligente (21 à 2n), la sortie étant connectée à la borne de commande du dispositif de commutation (11 à 1n), caractérisé en ce que l'autre dispositif de commutation est un dispositif de commutation de référence sélectionné parmi au moins deux dispositifs de commutation, le dispositif de commutation de référence étant soit un dispositif de commutation voisin de l'un des dispositifs de commutation soit un dispositif de commutation maître sélectionné en tant que dispositif de commutation de référence de toutes les unités de commande de grille intelligentes.
  9. Procédé selon la revendication 8, caractérisé en ce que les informations de référence relatives à des événements de commutation sont transmises d'une unité de commande de grille intelligente (41 à 4n) à une autre, en formant de ce fait une chaîne.
  10. Procédé selon la revendication 8, caractérisé en ce qu'une unité de commande de grille intelligente (42 à 4n) est sélectionnée en tant que maître dont les informations d'événement de commutation sont transférées aux autres unités de commande de grille intelligentes (41 à 4n) en tant que référence.
EP10188454.2A 2010-10-22 2010-10-22 Unité de commande de porte pour dispositif de commutation électrique Active EP2445110B1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP10188454.2A EP2445110B1 (fr) 2010-10-22 2010-10-22 Unité de commande de porte pour dispositif de commutation électrique
US13/275,819 US8604841B2 (en) 2010-10-22 2011-10-18 Gate driver unit for electrical switching device
CN201110329959.6A CN102545859B (zh) 2010-10-22 2011-10-20 用于电开关器件的栅极驱动器单元
US13/964,366 US8963585B2 (en) 2010-10-22 2013-08-12 Gate driver unit for electrical switching device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP10188454.2A EP2445110B1 (fr) 2010-10-22 2010-10-22 Unité de commande de porte pour dispositif de commutation électrique

Publications (2)

Publication Number Publication Date
EP2445110A1 EP2445110A1 (fr) 2012-04-25
EP2445110B1 true EP2445110B1 (fr) 2014-05-14

Family

ID=43728809

Family Applications (1)

Application Number Title Priority Date Filing Date
EP10188454.2A Active EP2445110B1 (fr) 2010-10-22 2010-10-22 Unité de commande de porte pour dispositif de commutation électrique

Country Status (3)

Country Link
US (2) US8604841B2 (fr)
EP (1) EP2445110B1 (fr)
CN (1) CN102545859B (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107210740A (zh) * 2014-11-26 2017-09-26 罗伯特·博世有限公司 用于控制并联的功率半导体开关的方法和设备

Families Citing this family (56)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5571013B2 (ja) * 2011-02-15 2014-08-13 株式会社東芝 半導体スイッチ、及び電力変換装置
EP2587670A1 (fr) * 2011-10-26 2013-05-01 ABB Technology AG Système de commande pour contrôler les contacts
JP5596004B2 (ja) * 2011-11-29 2014-09-24 株式会社東芝 半導体スイッチおよび電力変換装置
GB2497970A (en) 2011-12-23 2013-07-03 Amantys Ltd Power semiconductor switching device controller
US20140091627A1 (en) * 2012-09-28 2014-04-03 General Electric Company Systems, methods, and apparatus for a gate driver circuit for an alternative energy power supply
CN102904557B (zh) * 2012-09-29 2015-09-30 陆东海 开关管并联电路
US9231565B2 (en) * 2013-05-14 2016-01-05 Infineon Technologies Austria Ag Circuit with a plurality of bipolar transistors and method for controlling such a circuit
GB201311997D0 (en) * 2013-07-04 2013-08-21 Amantys Ltd Synchronising parallel power switches
CN104283194B (zh) 2013-07-05 2018-08-03 通用电气公司 具有故障保护功能的电路
US9804613B2 (en) 2013-07-22 2017-10-31 The Boeing Company Parallel transistor circuit controller
EP2884661B1 (fr) * 2013-12-11 2019-02-06 ABB Schweiz AG Procédé et appareil pour l'équilibrage des courants
CN104716821A (zh) * 2013-12-12 2015-06-17 杭州先途电子有限公司 空调控制器及其电源变换电路和功率因数校正电路
DK2887547T3 (en) 2013-12-20 2018-07-23 Abb Oy Offsetting power from power semiconductors
US9046912B1 (en) * 2014-02-24 2015-06-02 The Boeing Company Thermally balanced parallel operation of transistors
JP2015177591A (ja) * 2014-03-13 2015-10-05 富士電機株式会社 半導体装置及び半導体システム
US9397566B2 (en) * 2014-03-20 2016-07-19 Intel Corporation Master-slave digital voltage regulators
US9231503B2 (en) * 2014-05-28 2016-01-05 Google Inc. Methods and apparatuses for selectively controlling motor power boards
EP2988403B1 (fr) * 2014-08-19 2019-10-02 General Electric Technology GmbH Chaîne de commutation à semi-conducteur
JP2016046842A (ja) * 2014-08-20 2016-04-04 株式会社日立製作所 電力変換装置およびそれを用いたエレベータ
WO2016028967A1 (fr) 2014-08-20 2016-02-25 Navitas Semiconductor, Inc. Transistor de puissance à grille distribuée
JP6413523B2 (ja) * 2014-09-09 2018-10-31 富士電機株式会社 半導体装置
DE102014218000A1 (de) * 2014-09-09 2016-03-10 BSH Hausgeräte GmbH Schalteinrichtung zum Schalten einer Energieversorgung für eine elektronische Steuereinheit, Haushaltgerät und Verfahren hierfür
DE102014224172A1 (de) * 2014-11-26 2016-06-02 Robert Bosch Gmbh Verfahren und Vorrichtung zum Ansteuern parallel geschalteter Leistungshalbleiterschalter
EP3065296A1 (fr) * 2015-03-05 2016-09-07 General Electric Technology GmbH Chaîne de commutation de semi-conducteur
TW201703406A (zh) * 2015-04-14 2017-01-16 電源整合有限責任公司 切換裝置及功率模組
FR3035556B1 (fr) * 2015-04-24 2017-04-21 Continental Automotive France Procede de synchronisation de circuits de commande a commutation commandes par signaux de commande mli
EP3104526B1 (fr) * 2015-06-09 2020-12-02 Mitsubishi Electric R&D Centre Europe B.V. Système et procédé de commande d'un module de puissance à puces multiples
EP3104506B1 (fr) * 2015-06-09 2018-10-10 Mitsubishi Electric R&D Centre Europe B.V. Procédé et système pour commander la commutation d'un module de puissance à puces multiples
KR101721107B1 (ko) 2015-07-15 2017-03-29 엘에스산전 주식회사 게이트 드라이버 구동장치
US10020759B2 (en) 2015-08-04 2018-07-10 The Boeing Company Parallel modular converter architecture for efficient ground electric vehicles
JP6582714B2 (ja) * 2015-08-18 2019-10-02 富士電機株式会社 並列接続されたパワー半導体素子の協調制御方法、電流バランス制御装置およびパワーモジュール
US9467136B1 (en) * 2015-10-05 2016-10-11 Monolithic Power Systems, Inc. Monolithic integrated circuit switch device with output current balancing for parallel-connection
FI20155709L (fi) 2015-10-09 2017-04-10 Vacon Oy Rinnakkain kytkettyjen teholaitteiden ohjaus
EP3208921B1 (fr) * 2016-02-16 2019-04-17 Mitsubishi Electric R&D Centre Europe B.V. Système et procédé pour commander le fonctionnement d'un module de puissance à puces multiples
CN105846658B (zh) * 2016-03-23 2018-07-17 西安交通大学 一种igbt并联静态均流电路
FR3049785B1 (fr) * 2016-04-01 2019-08-30 Alstom Transport Technologies Convertisseur d'energie electrique, chaine de traction comportant un tel convertisseur et vehicule electrique de transport associe
US9917435B1 (en) * 2016-09-13 2018-03-13 Ford Global Technologies, Llc Piecewise temperature compensation for power switching devices
JP6639373B2 (ja) * 2016-11-18 2020-02-05 株式会社日立製作所 電力変換装置及びパワー半導体素子制御方法
JP6702154B2 (ja) * 2016-11-21 2020-05-27 株式会社デンソー スイッチの駆動装置
JP2018093684A (ja) * 2016-12-07 2018-06-14 ルネサスエレクトロニクス株式会社 半導体装置および電力変換装置
US10090792B2 (en) * 2016-12-08 2018-10-02 Ford Global Technologies, Llc Self-balancing parallel power devices with a temperature compensated gate driver
JP6855829B2 (ja) * 2016-12-16 2021-04-07 富士電機株式会社 複数相ドライバ装置および3相ドライバ装置
JP6673186B2 (ja) * 2016-12-26 2020-03-25 株式会社デンソー 電力変換器制御装置
JP6887320B2 (ja) * 2017-06-13 2021-06-16 株式会社日立製作所 電力変換ユニットの駆動回路および駆動方法、電力変換ユニット、並びに電力変換装置
JP6848832B2 (ja) * 2017-11-28 2021-03-24 三菱電機株式会社 電力変換システム
EP3514929B1 (fr) * 2018-01-19 2021-02-24 Hamilton Sundstrand Corporation Commande de courant pour les interrupteurs connectés en parallèle
DE112019002204B4 (de) * 2018-04-27 2022-08-11 Mitsubishi Electric Corporation Treibereinrichtung für ein leistungs-halbleiterelement
JP7028050B2 (ja) * 2018-04-27 2022-03-02 株式会社デンソー スイッチの駆動装置
JP7156675B2 (ja) * 2018-09-03 2022-10-19 国立大学法人九州工業大学 電力変換器、可変信号遅延回路及び電力変換方法
EP3696978A1 (fr) * 2019-02-14 2020-08-19 Siemens Aktiengesellschaft Module de commutation pour un commutateur électronique
CN110277900B (zh) * 2019-06-24 2021-07-09 深圳市四方电气技术有限公司 Igbt驱动峰值检测保护电路
DE102019218998A1 (de) * 2019-12-05 2021-06-10 Robert Bosch Gmbh Verfahren und Ansteuerschaltung zum Ansteuern von mindestens einem zu schaltenden Leistungstransistor
US10985745B1 (en) * 2020-02-07 2021-04-20 Eaton Intelligent Power Limited Drivers for power semiconductor switches using device feedback
CN111786864B (zh) * 2020-06-09 2022-03-22 许昌许继风电科技有限公司 支持主从模式自动切换功能的双驱动变桨系统及切换方法
DE102020215216A1 (de) 2020-12-02 2022-06-02 Volkswagen Aktiengesellschaft Schaltanordnung zur Ansteuerung einer Halbbrückenschaltung und Ansteuerschaltung
DE102022210650A1 (de) 2022-10-10 2024-04-11 Volkswagen Aktiengesellschaft Verfahren und Vorrichtung zum Betreiben eines Leistungshalbleiter-Moduls

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4335857A1 (de) * 1993-10-21 1995-04-27 Abb Management Ag Stromrichterschaltungsanordnung und Verfahren zur Ansteuerung derselben
DE4403941C2 (de) * 1994-02-08 2000-05-18 Abb Schweiz Ag Verfahren und Schaltungsanordnung zur Ansteuerung von Halbleiterschaltern einer Reihenschaltung
US5712587A (en) * 1996-04-08 1998-01-27 Electric Power Research Institute, Inc. Apparatus and method for simultaneously deactivating series-connected switching devices
JP3447949B2 (ja) * 1998-03-31 2003-09-16 株式会社東芝 絶縁ゲート型半導体素子のゲート駆動回路、電力変換装置
ES2304997T3 (es) * 2000-12-27 2008-11-01 Ct-Concept Technologie Ag Procedimiento de simetrizacion dinamica de interruptores de semiconductor de potencia conectados en serie y en paralelo.
US7567447B2 (en) * 2006-01-04 2009-07-28 General Electric Company Electrical switching device having current balanced transistors

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107210740A (zh) * 2014-11-26 2017-09-26 罗伯特·博世有限公司 用于控制并联的功率半导体开关的方法和设备
CN107210740B (zh) * 2014-11-26 2020-12-08 罗伯特·博世有限公司 用于控制并联的功率半导体开关的方法和设备

Also Published As

Publication number Publication date
CN102545859A (zh) 2012-07-04
US20120098577A1 (en) 2012-04-26
US8963585B2 (en) 2015-02-24
US20130328599A1 (en) 2013-12-12
CN102545859B (zh) 2015-03-11
EP2445110A1 (fr) 2012-04-25
US8604841B2 (en) 2013-12-10

Similar Documents

Publication Publication Date Title
EP2445110B1 (fr) Unité de commande de porte pour dispositif de commutation électrique
JP6438018B2 (ja) 並列電力スイッチの同期
CA2709699C (fr) Convertisseur de puissance a commande de cellules distribuee
US9893668B2 (en) Control system and method
CN108141127B (zh) 功率半导体元件的驱动电路、电力变换组件以及电力变换装置
JP7086054B2 (ja) トランスレス単相ネットワークインバータのハイブリッドクロック方法
CN106208634B (zh) 用于电流/功率平衡的方法和装置
Lobsiger et al. Decentralized active gate control for current balancing of parallel connected IGBT modules
CN107852106B (zh) 对并联连接的功率器件的控制
KR20140074812A (ko) 병렬 운전 전원 장치
EP3176941B1 (fr) Procédé de commande de potentiel de point neutre pour onduleur npc à phase unique
US11682968B2 (en) Control of power converters having integrated capacitor blocked transistor cells
US10630204B2 (en) Network feedback unit to feed energy into a three-phase network and electrical drive system
RU2586870C2 (ru) Схемное устройство с полупроводниковым переключателем и относящейся к нему схемой управления
EP2988403B1 (fr) Chaîne de commutation à semi-conducteur
KR102132633B1 (ko) 지능형 반도체 변압기 시스템의 전력 균형 제어 장치
CN110291719B (zh) 驱控功率半导体器件的控制装置和驱控功率半导体器件的方法
US11121640B2 (en) Systems, methods, and apparatus for controlling a voltage source converter

Legal Events

Date Code Title Description
17P Request for examination filed

Effective date: 20111017

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

AX Request for extension of the european patent

Extension state: BA ME

PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17Q First examination report despatched

Effective date: 20120525

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

INTG Intention to grant announced

Effective date: 20131217

GRAS Grant fee paid

Free format text: ORIGINAL CODE: EPIDOSNIGR3

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: ABB RESEARCH LTD

RIN1 Information on inventor provided before grant (corrected)

Inventor name: LAITINEN, MATTI

Inventor name: LOBSIGER, YANICK

Inventor name: BORTIS, DOMINIK

Inventor name: KOLAR, JOHANN WALTER

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AL AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HR HU IE IS IT LI LT LU LV MC MK MT NL NO PL PT RO RS SE SI SK SM TR

REG Reference to a national code

Ref country code: GB

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: AT

Ref legal event code: REF

Ref document number: 668942

Country of ref document: AT

Kind code of ref document: T

Effective date: 20140615

REG Reference to a national code

Ref country code: IE

Ref legal event code: FG4D

REG Reference to a national code

Ref country code: DE

Ref legal event code: R096

Ref document number: 602010016052

Country of ref document: DE

Effective date: 20140626

REG Reference to a national code

Ref country code: AT

Ref legal event code: MK05

Ref document number: 668942

Country of ref document: AT

Kind code of ref document: T

Effective date: 20140514

Ref country code: NL

Ref legal event code: VDEP

Effective date: 20140514

REG Reference to a national code

Ref country code: LT

Ref legal event code: MG4D

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140814

Ref country code: CY

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140815

Ref country code: LT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: IS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140914

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: RS

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: LV

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: SE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: PL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: HR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: AT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: PT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140915

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: EE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: CZ

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: BE

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: RO

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: SK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602010016052

Country of ref document: DE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed

Effective date: 20150217

REG Reference to a national code

Ref country code: DE

Ref legal event code: R097

Ref document number: 602010016052

Country of ref document: DE

Effective date: 20150217

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MC

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: LU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20141022

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

REG Reference to a national code

Ref country code: IE

Ref legal event code: MM4A

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20141031

Ref country code: SI

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20141031

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 6

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20141022

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SM

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BG

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MT

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: TR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

Ref country code: HU

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT; INVALID AB INITIO

Effective date: 20101022

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 7

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 8

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: MK

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 9

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20140514

REG Reference to a national code

Ref country code: DE

Ref legal event code: R081

Ref document number: 602010016052

Country of ref document: DE

Owner name: ABB SCHWEIZ AG, CH

Free format text: FORMER OWNER: ABB RESEARCH LTD., ZUERICH, CH

REG Reference to a national code

Ref country code: GB

Ref legal event code: 732E

Free format text: REGISTERED BETWEEN 20200206 AND 20200212

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20231020

Year of fee payment: 14

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: IT

Payment date: 20231026

Year of fee payment: 14

Ref country code: FR

Payment date: 20231024

Year of fee payment: 14

Ref country code: FI

Payment date: 20231019

Year of fee payment: 14

Ref country code: DE

Payment date: 20231020

Year of fee payment: 14