EP2383808A3 - Light emitting device package having leads with a recess for the chip mount area - Google Patents

Light emitting device package having leads with a recess for the chip mount area Download PDF

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Publication number
EP2383808A3
EP2383808A3 EP11164125.4A EP11164125A EP2383808A3 EP 2383808 A3 EP2383808 A3 EP 2383808A3 EP 11164125 A EP11164125 A EP 11164125A EP 2383808 A3 EP2383808 A3 EP 2383808A3
Authority
EP
European Patent Office
Prior art keywords
leads
light emitting
recess
emitting device
recess portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP11164125.4A
Other languages
German (de)
French (fr)
Other versions
EP2383808B1 (en
EP2383808A2 (en
Inventor
Masaki Hayashi
Masafumi Kuramoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nichia Corp
Original Assignee
Nichia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nichia Corp filed Critical Nichia Corp
Publication of EP2383808A2 publication Critical patent/EP2383808A2/en
Publication of EP2383808A3 publication Critical patent/EP2383808A3/en
Application granted granted Critical
Publication of EP2383808B1 publication Critical patent/EP2383808B1/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48095—Kinked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1203—Rectifying Diode
    • H01L2924/12035—Zener diode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12042—LASER
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Led Device Packages (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

The light emitting device (100) includes a resin package (20) provided with a recess portion (27), a light emitting element (10) housed in the recess portion (27), a sealing member (30) filled in the recess portion (27) and covering the light emitting element (10), in which the resin package (20) has leads (22a, 22b) which are not exposed two opposing outer side surfaces (20d) but are exposed from two opposing outer side surfaces which are perpendicular with the outer side surfaces (20d) , a resin portion (25) is integrally molded with the leads (22a, 22b), the upper surfaces of the leads (22a, 22b) are exposed from the resin portion 25 to the inner bottom surface (27a) of the recess portion (27), and the top surfaces of the leads (22a, 22b) are formed such that the region constituting the inner bottom surface of the recess portion (27) are lower than their peripheral region.
Figure imgaf001
Figure imgaf002
EP11164125.4A 2010-04-30 2011-04-28 Light emitting device package having leads with a recess for the chip mount area, and corresponding manufacturing methods Active EP2383808B1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010105093A JP5533203B2 (en) 2010-04-30 2010-04-30 Light emitting device and method for manufacturing light emitting device

Publications (3)

Publication Number Publication Date
EP2383808A2 EP2383808A2 (en) 2011-11-02
EP2383808A3 true EP2383808A3 (en) 2014-08-27
EP2383808B1 EP2383808B1 (en) 2018-08-29

Family

ID=44310901

Family Applications (1)

Application Number Title Priority Date Filing Date
EP11164125.4A Active EP2383808B1 (en) 2010-04-30 2011-04-28 Light emitting device package having leads with a recess for the chip mount area, and corresponding manufacturing methods

Country Status (2)

Country Link
EP (1) EP2383808B1 (en)
JP (1) JP5533203B2 (en)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5554691B2 (en) * 2010-11-26 2014-07-23 アピックヤマダ株式会社 LED chip mounting substrate mold, and LED chip mounting substrate manufacturing method
JP5505735B2 (en) * 2011-09-22 2014-05-28 復盛精密工業股▲ふん▼有限公司 Light-emitting diode support frame structure and manufacturing method thereof (2)
JP5083472B1 (en) * 2012-01-25 2012-11-28 パナソニック株式会社 LED package manufacturing method
WO2013111253A1 (en) * 2012-01-25 2013-08-01 パナソニック株式会社 Led package, led light-emitting element, and method of manufacturing same
US9627583B2 (en) 2012-02-15 2017-04-18 Panasonic Intellectual Property Management Co., Ltd. Light-emitting device and method for manufacturing the same
JP5710554B2 (en) * 2012-07-30 2015-04-30 株式会社マイゾックス Surveying pole
WO2014030530A1 (en) * 2012-08-23 2014-02-27 三菱樹脂株式会社 Package for light-emitting device, and light-emitting device
JP6107136B2 (en) 2012-12-29 2017-04-05 日亜化学工業株式会社 LIGHT EMITTING DEVICE PACKAGE, LIGHT EMITTING DEVICE INCLUDING THE SAME, AND LIGHTING DEVICE EQUIPPED WITH THE LIGHT EMITTING DEVICE
EP2957818B1 (en) * 2013-02-18 2020-01-01 Koito Manufacturing Co., Ltd. Vehicle light fitting
JP6484396B2 (en) 2013-06-28 2019-03-13 日亜化学工業株式会社 Light emitting device package and light emitting device using the same
JP6610703B2 (en) * 2013-06-28 2019-11-27 日亜化学工業株式会社 Light emitting device package
JP2015126091A (en) * 2013-12-26 2015-07-06 大日本印刷株式会社 Manufacturing method of lead frame with resin, manufacturing method of semiconductor device, injection molding die device, and lead frame with resin
JP6214431B2 (en) * 2014-02-28 2017-10-18 Ｓｈマテリアル株式会社 LED lead frame
US9799812B2 (en) 2014-05-09 2017-10-24 Kyocera Corporation Light emitting element mounting substrate and light emitting device
JP6413412B2 (en) * 2014-07-11 2018-10-31 日亜化学工業株式会社 Semiconductor light emitting device and manufacturing method thereof
JP2015159324A (en) * 2015-04-30 2015-09-03 大日本印刷株式会社 Lead frame for led with reflector, and manufacturing method of semiconductor apparatus employing the same
JP6468601B2 (en) * 2015-11-30 2019-02-13 大口マテリアル株式会社 Multi-row LED lead frame, manufacturing method thereof, and manufacturing method of LED package
JP6468600B2 (en) * 2015-11-30 2019-02-13 大口マテリアル株式会社 LED package, multi-row LED lead frame, and manufacturing method thereof
JP7353794B2 (en) * 2019-05-13 2023-10-02 ローム株式会社 Semiconductor device, its manufacturing method, and module
DE102020133755A1 (en) 2020-12-16 2022-06-23 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung DEVICE WITH STRUCTURED LEAD FRAME AND METHOD OF MAKING DEVICE
JP7460911B2 (en) * 2020-12-21 2024-04-03 日亜化学工業株式会社 Light emitting device and display using it

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040159850A1 (en) * 2003-02-18 2004-08-19 Sharp Kabushiki Kaisha Semiconductor light-emitting device, manufacturing method thereof, and electronic image pickup device
JP2005294736A (en) * 2004-04-05 2005-10-20 Stanley Electric Co Ltd Manufacturing method for semiconductor light emitting device
US20070145403A1 (en) * 2005-12-27 2007-06-28 Kabushiki Kaisha Toshiba Luminescent device and method for manufacturing the same
US20080224161A1 (en) * 2007-03-13 2008-09-18 Sharp Kabushiki Kaisha Semiconductor Light Emitting Device and Multiple Lead Frame for Semiconductor Light Emitting Device
JP2009295883A (en) * 2008-06-06 2009-12-17 Apic Yamada Corp Method for manufacturing of led chip mounting board, molding die of led chip mounting board, led chip mounting lead frame, led chip mounting board, and led

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001297144A (en) 2000-04-13 2001-10-26 Pc Network Plaza:Kk Method for managing execution verification picture of property under construction
JP3660854B2 (en) * 2000-04-13 2005-06-15 株式会社ルネサステクノロジ Manufacturing method of semiconductor device
JP2006313943A (en) * 2003-02-18 2006-11-16 Sharp Corp Semiconductor light emitting device, manufacturing method thereof, and electronic imaging device
JP2005317661A (en) * 2004-04-27 2005-11-10 Sharp Corp Semiconductor light emitting device and its manufacturing method
JP4359195B2 (en) * 2004-06-11 2009-11-04 株式会社東芝 Semiconductor light emitting device, manufacturing method thereof, and semiconductor light emitting unit
JP6346724B2 (en) * 2004-11-30 2018-06-20 日亜化学工業株式会社 Surface mount type light emitting device and manufacturing method thereof
JP5232369B2 (en) 2006-02-03 2013-07-10 日立化成株式会社 Manufacturing method of package substrate for mounting optical semiconductor element and manufacturing method of optical semiconductor device using the same
JP5599561B2 (en) * 2008-07-22 2014-10-01 日立化成株式会社 Thermosetting resin composition, optical semiconductor element mounting substrate using the same, method for producing the same, and optical semiconductor device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040159850A1 (en) * 2003-02-18 2004-08-19 Sharp Kabushiki Kaisha Semiconductor light-emitting device, manufacturing method thereof, and electronic image pickup device
JP2005294736A (en) * 2004-04-05 2005-10-20 Stanley Electric Co Ltd Manufacturing method for semiconductor light emitting device
US20070145403A1 (en) * 2005-12-27 2007-06-28 Kabushiki Kaisha Toshiba Luminescent device and method for manufacturing the same
US20080224161A1 (en) * 2007-03-13 2008-09-18 Sharp Kabushiki Kaisha Semiconductor Light Emitting Device and Multiple Lead Frame for Semiconductor Light Emitting Device
JP2009295883A (en) * 2008-06-06 2009-12-17 Apic Yamada Corp Method for manufacturing of led chip mounting board, molding die of led chip mounting board, led chip mounting lead frame, led chip mounting board, and led

Also Published As

Publication number Publication date
EP2383808B1 (en) 2018-08-29
JP2011233821A (en) 2011-11-17
JP5533203B2 (en) 2014-06-25
EP2383808A2 (en) 2011-11-02

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