EP2132967A1 - Procédé de fabrication d'un module électronique et module électronique - Google Patents

Procédé de fabrication d'un module électronique et module électronique

Info

Publication number
EP2132967A1
EP2132967A1 EP08708914A EP08708914A EP2132967A1 EP 2132967 A1 EP2132967 A1 EP 2132967A1 EP 08708914 A EP08708914 A EP 08708914A EP 08708914 A EP08708914 A EP 08708914A EP 2132967 A1 EP2132967 A1 EP 2132967A1
Authority
EP
European Patent Office
Prior art keywords
electronic component
circuit board
printed circuit
electronic
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP08708914A
Other languages
German (de)
English (en)
Inventor
Andreas Kugler
Karl-Friederich Becker
Gerhard Liebing
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP2132967A1 publication Critical patent/EP2132967A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H01L2224/82009—Pre-treatment of the connector or the bonding area
    • H01L2224/8203—Reshaping, e.g. forming vias
    • H01L2224/82035—Reshaping, e.g. forming vias by heating means
    • H01L2224/82039—Reshaping, e.g. forming vias by heating means using a laser
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/146—Mixed devices
    • H01L2924/1461—MEMS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
    • H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0207—Cooling of mounted components using internal conductor planes parallel to the surface for thermal conduction, e.g. power planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0355—Metal foils
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09918—Optically detected marks used for aligning tool relative to the PCB, e.g. for mounting of components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4641—Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores

Definitions

  • the invention relates to a method for producing an electronic assembly, comprising at least one electronic component and an electronic assembly GE measure the preamble of claim 9.
  • a method for producing an electrical circuit wherein the circuit comprises electrical components which are mechanically interconnected by a potting compound. On at least one side of the potting compound, at least one layer of conductor tracks is provided, which electrically connects the components to one another.
  • the components are applied to a carrier film and then encapsulated with a potting compound. Subsequently, the carrier foil is removed and on the side on which the components with the carrier foil were bound, one or more layers of traces are applied, which electrically connect the components together.
  • the inventive method for producing an electronic assembly comprising at least one electronic component, comprises the following steps:
  • the electronic components can be positioned exactly.
  • the subsequent lamination of the conductive carrier film with the at least one electronic component attached thereto to a printed circuit board carrier wherein the at least one electronic component points in the direction of the printed circuit board carrier, the at least one electronic component is enclosed by the printed circuit board carrier.
  • the device is completely encapsulated.
  • the at least one electronic component is enclosed by a polymer compound after being attached to the conductive carrier film.
  • the enclosing of the at least one electronic component with the polymer compound leads to an additional protection of the component. As a result, the risk of damage is significantly reduced even with sensitive components.
  • the polymer composition with which the at least one electronic component is enclosed is, for example, a low-pressure molding compound, for example an epoxy low-pressure molding compound.
  • the low-pressure molding compound is applied, for example, by a transfer molding process.
  • placeholders can be kept free in the polymer composition, for example for thicker dielectrics. However, these can also be encapsulated as inserts during encapsulation of the at least one electronic component.
  • the attachment of the at least one electronic component is preferably carried out by gluing.
  • the conductive carrier film has an adhesive layer.
  • the adhesive layer preferably forms the insulating layer at the same time.
  • the conductive carrier foil is, for example, a self-adhesive conductive carrier foil. The sticking can be done by hot and pressure processes. This is also a hot glue process, for example.
  • the conductive carrier film used is, for example, a copper foil, also known as printed circuit board RCC material.
  • Other suitable conductive films are, for example, LCP films or FEP films.
  • As a metal is suitable in addition to copper, for example, aluminum.
  • alignment marks are introduced into the conductive carrier foil.
  • the Justagemarken are, for example, holes or blind holes with any cross section. These can be introduced, for example, by etching, punching or drilling in the conductive carrier film.
  • the Justagemarken be mounted on the at least one electronic component opposite side of the conductive carrier film.
  • the alignment marks allow the exact position of the at least one electronic component to be determined even after enclosing the at least one electronic component with the polymer mass or after laminating the conductive carrier foil to the printed circuit board carrier. This is necessary for contacting the at least one electronic component.
  • suitable as alignment marks for example, components that are equipped with the conductive film.
  • the conductive foil is preferably drilled or x-rayed to detect the devices.
  • the Justagemarken may of course also have any other known to the expert form.
  • Holes are preferably introduced at the positions at which the at least one electronic component is to be electrically contacted with the conductive carrier foil.
  • the holes are metallized, for example.
  • the introduction of the holes is done for example by laser drilling.
  • the positions at which the holes are inserted are determined by the adjustment marks.
  • the metallization of the holes in order to achieve a contact of the electronic component with the conductive carrier film is carried out by methods known in the art.
  • the metallization can be carried out, for example, by electroless metal deposition. Electroless metal deposition is a common process used in printed circuit board manufacturing.
  • the metallization of the holes is preferably carried out with copper.
  • interconnects can be applied, for example, by applying further layers containing interconnects to the conductive carrier film structured in step (c).
  • a dielectric is preferably first applied, by means of which the conductor tracks formed in step (c) are covered. At the same time this results in an isolation of the conductor tracks, so that no unwanted electrical contact with the conductor tracks of the subsequently applied layer takes place.
  • further printed conductors are applied to the dielectric by methods known to the person skilled in the art.
  • the further layers which contain conductor tracks can alternatively also be produced by applying further conductive foils to the first layer and subsequently structuring the foil to form conductor tracks.
  • the at least one electronic component is contacted with a metal core on the side facing away from the conductive carrier film after laminating the conductive carrier film to the printed circuit board carrier in step (b) the metal core is also integrated in the printed circuit board after being laminated to the printed circuit board carrier.
  • the electronic component then gives off heat to the metal core during operation, via which it can be discharged to the outside.
  • Advantage of the method according to the invention is that by enclosing the at least one electronic component with the polymer composition or by embedding the electronic component in the printed circuit board carrier a cost-effective encapsulation of passive and active electronic components is achieved.
  • the electronic assembly is very reliable due to the complete encapsulation of sensitive components.
  • Another advantage of the encapsulation is that this height compensation is possible when different high components are used.
  • the method according to the invention avoids risky mixing techniques in production, for example soldering, gluing and wire bonding.
  • the electronic assembly in the high-frequency technology that is, when the electronic component is a high-frequency component, reproducible high-frequency transitions are achieved by the planar output structure, which is achieved by the inventive method.
  • the method according to the invention also makes it possible to integrate any necessary heat sinks on power semiconductors. These can, for example, contact the electronic component on the side facing away from the conductive carrier film. Alternatively, it is also possible for these to be embedded, for example, in the polymer compound with which the at least one electronic component is enclosed.
  • the inventive method can continue to achieve a cost-effective wiring and encapsulation by the use of processes on many modules simultaneously.
  • the invention relates to an electronic assembly comprising at least one electronic component which is connected to a printed conductor structure on a printed circuit board, wherein the at least one electronic component is embedded in the printed circuit board and the printed conductor structure is arranged on the surface of the printed circuit board.
  • the expensive substrate and packaging technology as currently used in the prior art, is replaced or reduced to a small component.
  • the electronic assembly produced according to the invention can be further processed as a standard component.
  • the conductor track structure is formed in a plurality of layers.
  • an increased land use on an electronic circuit board is possible. Due to the additional layers, the electronic module can be equipped and contacted with components in the smallest possible space. In order to be able to dissipate good heat, which arises during operation of the electronic module, it is preferred that in the circuit board, a metal core is contained, which is connected to the at least one electronic component metallically.
  • the electronic assembly In addition to the at least one electronic component, it is also possible for the electronic assembly to contain one or more mechanical components.
  • Electronic components which are used in the method according to the invention or in the electronic module designed according to the invention are all electronic components known to the person skilled in the art, such as are used in printed circuit board technology and microelectronics.
  • mechanical components all components come into consideration, as they are used in printed circuit board technology.
  • FIG. 1 to 8 several steps of the production of a device according to the invention.
  • FIG. 1 shows a conductive carrier foil 1 comprising a conductive layer 3 and an insulating layer 5.
  • the insulating layer 5 is preferably an adhesive layer or a thermoplastic, to which electronic components can be applied.
  • adjustment marks 7 are introduced on the side of the conductive carrier film 1, on which the conductive layer 3 is located.
  • the alignment marks 7 can be introduced into the conductive carrier film 1, for example by etching, punching, drilling, for example laser drilling.
  • the alignment marks are also components connected to the conductive carrier film 1, which are bored free or detected by X-ray microscopy. Any other, known to the expert form for Justagemarken is possible.
  • the conductive layer 3 is preferably a metal layer. Particularly preferred as the metal is copper.
  • electronic components 9 are applied to the insulating layer. This is shown in FIG.
  • mechanical components it is also possible for mechanical components to be applied to the insulating layer 5 of the conductive carrier film 1.
  • the electronic components 9 or mechanical components which are applied to the insulating layer 5 of the conductive carrier film 1 are conventional components, as used in printed circuit board construction. These are, for example, chips, processors, high-frequency components, SMD components, antenna modules, heat sinks, MEMS or MOEMS.
  • the application of the electronic components 9 or mechanical components is preferably carried out by adhering to the insulating layer 5.
  • the electronic components 9 are placed on the insulating layer 5 of the conductive substrate 1, as the electronic components 9 may be later in the electrical circuit should. It can be applied to individual or all electronic components 9 heat sink to ensure increased heat dissipation during operation of the electronic components 9.
  • the optionally providable heat sinks are hereby placed on the side of the electronic components 9, which faces away from the conductive carrier film 1.
  • the polymer composition 11 is, for example, an epoxy low pressure molding compound.
  • placeholders for thicker dielectrics which are used, for example, for antennas or heat sinks, may be overmolded in the polymer compound 11, if necessary.
  • the wrapping with the polymer compound 11 takes place for example by means of a transfer molding process.
  • the placeholders can be formed for example as depressions or trays.
  • any other method known to those skilled in the art can be used with which the electronic components 9 can be encased with the polymer compound 11.
  • the jacket with the polymer compound 11 has the advantage that a height compensation for components 9 with different thickness is possible. This is advantageous for the subsequent lamination process.
  • Components can also be pre-encapsulated on peelable film and mounted on the carrier film 1 after removing the film.
  • the conductive film 1 is cut to PCB blank. After cutting, the conductive foil 1 with the electronic components 9 mounted thereon and, if appropriate, further mechanical components, which are not shown here, are laminated onto a printed circuit board carrier 13. This is shown in FIG. In the embodiment variant shown here, the conductive film 1 with the electronic components 9 has been laminated onto the printed circuit board carrier 13 without the electronic components 9 being enclosed by the polymer compound 11. According to the invention, however, the embodiment shown in FIG. 3, in which the electronic components 9 are enclosed by the polymer compound 11, is also laminated onto the printed circuit board carrier 13.
  • the lamination is carried out according to methods known in the art.
  • the printed circuit board carrier 13 is laminated onto the conductive film 1 in such a way that the electronic components 9 or the electronic components 9 surrounded by the polymer compound 11 are enclosed by the printed circuit board carrier 13.
  • the printed circuit board carrier 13 is laminated on the side on the conductive film 1, on which the electronic components 9 are mounted.
  • a glass-fiber reinforced and pre-drilled at the points of the components 9 cured printed circuit board material is placed on the film.
  • a prepreg and, if appropriate, another cured printed circuit board material is applied.
  • the cured circuit board material is usually a glass fiber reinforced epoxy resin.
  • an epoxy resin is also generally used. However, this is not completely cured. By applying pressure and an elevated temperature, the prepreg hardens completely, whereby this connects with the cured printed circuit board material.
  • the composite of prepreg and cured printed circuit board material forms the printed circuit board carrier 13.
  • holes 17 in the carrier foil 1, comprising the conductive layer 3 and 3, are formed at the connection points of the electronic components 9 the insulating layer 5, introduced.
  • the correct positioning of the holes 17 can be determined by the initially introduced adjustment marks 7. This makes it possible to produce the holes 17 precisely at the positions where the electrical connections of the electronic components 9 are located.
  • a laser drilling method is used. If the soldering 17 are also produced by a laser drilling method, a second laser is preferably used for the cooling channels 31. But it can also be drilled holes 17 and cooling channels 31 with the same laser.
  • the electronic components 9 are electrically contacted with the conductive layer 3. This is shown in FIG.
  • metal 19 is deposited in the holes 17 by methods known to those skilled in the art, for example by electroless metal deposition. This metal connects the terminals of the electronic components 9 to the printed conductor structure 15. An electronic contact was made.
  • the metal 19 used for metallization is copper.
  • a starting metallization of palladium is generally first deposited without current. This is followed by a galvanic copper deposition.
  • the metal 19 may take the form of a sleeve or fill the holes 17 completely.
  • the conductive layer 3 After the introduction of the holes 17 for the contacting of the electronic components 9 in the conductive film 1 and the metallization of the holes 17, the conductive layer 3, as shown in Figure 5, structured.
  • the structuring is carried out by any known to the expert method. Suitable methods are, for example, etching methods, photoresist methods, laser drilling methods or laser ablation methods.
  • FIG. 7 shows an electronic module 21.
  • the electronic assembly comprises two printed circuit boards 23 which are constructed as shown in FIG.
  • a dielectric 25 is applied to a further interconnect structure 27th applied.
  • a dielectric 25 are, for example, epoxy resins or FR4 materials that are known from printed circuit board technology.
  • the application of the dielectric 25 takes place with the usual methods known to the person skilled in the art. For example, it is possible to apply the dielectric 25 by doctoring, brushing, printing, laminating, curtain casting, film coating, spray coating or similar methods.
  • a further printed conductor structure 27 is applied.
  • first laminate the dielectric 25 and then a conductive film After laminating the dielectric 25 and the conductive foil, first holes are made which are then metallized to electrically connect the conductive foil to underlying layers. Subsequently, a further printed conductor structure 27 is worked out of the conductive foil.
  • cooling channels 31 In order to remove heat from the electronic components 9, it is possible to introduce cooling channels 31 into the printed circuit board carrier 13 on the side of the electronic components 9 facing away from the printed conductor structures 15, 27.
  • the cooling channels 31 can be connected to a metal core 33. Heat is removed from the electronic components 9 via the metal core 33 and the cooling channels 31.
  • the bonding of the cooling channels 31 to the metal core 33 is generally carried out via a back-side metallization or alternative connections, in which the inner walls of the cooling channels 31 are provided with a metal layer. But it is also possible to completely fill the cooling channels 31 with a metal.
  • connection of the printed circuit boards 23 preferably also takes place by means of a laminating process, as is customary in printed circuit board production processes.
  • the conductor track structure 15 of a circuit board 23 can be connected to the conductor track structure 27 of the second circuit board 23.
  • the electrical contact is made, for example, by a metallization of the wall of the bore 35.
  • a bore 37 which terminates on the metal core 33, the conductor track structure 15, 27 can be electrically contacted with the metal core 33.
  • a ground contact can be realized.
  • the electrical contact is preferably carried out by means of a metallization.
  • the metallization of the bores 35, 37 is produced, for example, by electroless or galvanic metal deposition. Alternatively, it is also possible, for example, to guide a wire through the holes 35, 37.
  • FIG. 8 differs from the embodiment shown in FIG. 7 in that, in the case of a printed circuit board, the electronic components 9 are not encased in the polymer compound 11 and in the case of the second printed circuit board 23 used for the electronic assembly 21 Components 9 are enclosed with the polymer mass 11.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Structure Of Printed Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

L'invention concerne un procédé de fabrication d'un module électronique (21) comportant au moins un composant électronique (9). Dans une première étape, le ou les composants électroniques (9) sont fixés sur une couche isolante (5) d'une pellicule conductrice (1), le côté actif du composant électronique (9) étant dirigé vers la pellicule conductrice (1). Dans une deuxième étape, la pellicule conductrice (1) et le ou les composants électroniques (9) qui y sont fixés sont laminés sur un support de plaquette (13), le ou les composants électroniques (9) étant dirigés vers le support de plaquette (13). Ensuite, des pistes conductrices (15) sont créées par structuration de la pellicule conductrice (1) et le ou les composants électroniques (9) sont mis en contact. L'invention concerne également un module électronique comportant au moins un composant électronique (9) connecté à une structure de pistes conductrices sur un support de plaquette (13). Le ou les composants électroniques (9) sont intégrés au support de plaquette (13) et la structure de pistes conductrices (15, 27) est disposée à la surface de la plaquette (23).
EP08708914A 2007-03-30 2008-02-12 Procédé de fabrication d'un module électronique et module électronique Withdrawn EP2132967A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102007015819A DE102007015819A1 (de) 2007-03-30 2007-03-30 Verfahren zur Herstellung einer elektronischen Baugruppe sowie elektronische Baugruppe
PCT/EP2008/051681 WO2008119586A1 (fr) 2007-03-30 2008-02-12 Procédé de fabrication d'un module électronique et module électronique

Publications (1)

Publication Number Publication Date
EP2132967A1 true EP2132967A1 (fr) 2009-12-16

Family

ID=39535385

Family Applications (1)

Application Number Title Priority Date Filing Date
EP08708914A Withdrawn EP2132967A1 (fr) 2007-03-30 2008-02-12 Procédé de fabrication d'un module électronique et module électronique

Country Status (5)

Country Link
EP (1) EP2132967A1 (fr)
JP (1) JP5150720B2 (fr)
CN (1) CN101682993B (fr)
DE (1) DE102007015819A1 (fr)
WO (1) WO2008119586A1 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008000842A1 (de) * 2008-03-27 2009-10-01 Robert Bosch Gmbh Verfahren zur Herstellung einer elektronischen Baugruppe
CN105848416B (zh) * 2016-03-31 2019-04-26 华为技术有限公司 一种基板及移动终端

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6512182B2 (en) 2001-03-12 2003-01-28 Ngk Spark Plug Co., Ltd. Wiring circuit board and method for producing same
WO2005008733A2 (fr) * 2003-07-14 2005-01-27 Avx Corporation Ensemble electronique modulaire et procede de fabrication de celui-ci
FI117369B (fi) * 2004-11-26 2006-09-15 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
DE102005003125A1 (de) 2005-01-21 2006-07-27 Robert Bosch Gmbh Elektrische Schaltung und Verfahren zur Herstellung einer elektrischen Schaltung
KR100656751B1 (ko) * 2005-12-13 2006-12-13 삼성전기주식회사 전자소자 내장 인쇄회로기판 및 그 제조방법

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
None *
See also references of WO2008119586A1 *

Also Published As

Publication number Publication date
DE102007015819A1 (de) 2008-10-09
CN101682993B (zh) 2012-03-21
WO2008119586A1 (fr) 2008-10-09
CN101682993A (zh) 2010-03-24
JP2010524213A (ja) 2010-07-15
JP5150720B2 (ja) 2013-02-27

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