EP1988569A2 - Procédé pour la fabrication d'un contact à borne d'un dispositif semi-conducteur de puissance et composant électronique avec un contact à borne fabriqué selon ce procédé - Google Patents

Procédé pour la fabrication d'un contact à borne d'un dispositif semi-conducteur de puissance et composant électronique avec un contact à borne fabriqué selon ce procédé Download PDF

Info

Publication number
EP1988569A2
EP1988569A2 EP07008553A EP07008553A EP1988569A2 EP 1988569 A2 EP1988569 A2 EP 1988569A2 EP 07008553 A EP07008553 A EP 07008553A EP 07008553 A EP07008553 A EP 07008553A EP 1988569 A2 EP1988569 A2 EP 1988569A2
Authority
EP
European Patent Office
Prior art keywords
contact
semiconductor device
carrier substrate
welded
semiconductor component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP07008553A
Other languages
German (de)
English (en)
Other versions
EP1988569A3 (fr
Inventor
Martin Birner
Rainer Kreutzer
Heinz Dr. Wöllmer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to EP07008553A priority Critical patent/EP1988569A3/fr
Publication of EP1988569A2 publication Critical patent/EP1988569A2/fr
Publication of EP1988569A3 publication Critical patent/EP1988569A3/fr
Ceased legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K20/00—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating
    • B23K20/12—Non-electric welding by applying impact or other pressure, with or without the application of heat, e.g. cladding or plating the heat being generated by friction; Friction welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B23K2101/40—Semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/2401—Structure
    • H01L2224/2402—Laminated, e.g. MCM-L type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/3754—Coating
    • H01L2224/37599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901—Structure
    • H01L2224/4903—Connectors having different sizes, e.g. different diameters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4905—Shape
    • H01L2224/49051—Connectors having different shapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73219—Layer and TAB connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73221—Strap and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/852—Applying energy for connecting
    • H01L2224/85201—Compression bonding
    • H01L2224/85205—Ultrasonic bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1301—Thyristor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]

Definitions

  • the invention relates to a method for producing a connection contact on a semiconductor component for power electronics.
  • the invention also relates to an electronic component having a semiconductor device provided with a terminal contact.
  • Semiconductor devices for the power electronics are usually formed as a flat plate, which are arranged on plate-shaped carrier substrates.
  • carrier substrates often called DCB (D irect C opper B onded) -Trägersubstrate used which consist of a ceramic insulator which is provided on one flat side with a metallic layer, typically made of copper Cu.
  • the semiconductor components are soldered with one of their flat sides on the metallic layer of the carrier substrate.
  • the semiconductor device On its opposite flat side, the semiconductor device must also be provided with an electrical connection contact on which a high, flowing through the semiconductor device perpendicular to its flat sides load current can be tapped (load connection). The switching or controlling this load current via a gate or control terminal on the semiconductor device.
  • the connection for the load current (load connection) and the connection for the control current (control connection) are generally electrically separated from each other.
  • the terminal contacts In order to be able to carry large load currents with the lowest possible power loss at the transition between the semiconductor component and the terminal contact, it is necessary for the terminal contacts for the load current to have the lowest possible contact resistance to the semiconductor component in order to reduce the electrical power loss at the transition and thus to reduce the thermal load of the semiconductor device.
  • a low contact resistance can be realized on the DCB carrier substrate facing flat side of the semiconductor device by this is soldered flat on the metallized DCB carrier substrate.
  • Various methods are known in the prior art for producing the load connection on the flat side of the semiconductor component opposite the DCB carrier substrate.
  • the DE 197 19 703 A1 known power semiconductor module is a bonding connection with a plurality of contacted with the semiconductor device bonding wires provided that connect to a solid connection element.
  • WO 03/030247 A2 An alternative technology is known in which, in a first step, a plastic film is laminated onto the semiconductor component, into which openings are subsequently introduced, so that an electrical contact is produced at a subsequent coating with an electrically conductive material at these openings Can have contact surface.
  • connection types can also be used for contacting the control connection (gate contact), the most common type of gate contact being contacting with a bonding wire.
  • the invention is based on the object of specifying a method for producing a connection contact on an electrical contact surface of a semiconductor component arranged on a substrate for power electronics, with which an electrical connection to the semiconductor device is possible, which has a high stability, a high current carrying capacity and a low Transition resistance has.
  • the invention has the object, an electronic Specify component with a semiconductor device having a contact made in this way.
  • the object is achieved according to the invention with the features of claim 1.
  • the semiconductor device is welded to at least one of its flat sides with a friction welding process with a metallic contact element in the manufacture of a terminal contact to a semiconductor device for power electronics.
  • connection contact is effected by a solid metal contact element which is connected materially directly to the semiconductor component, a particularly space-saving design results.
  • a high current carrying capacity is possible, since a large contact surface and thus also a low contact resistance can be realized by the metallic contact element.
  • the metallic contact element which preferably consists of copper Cu, the heat generated in the semiconductor device can be better dissipated. Another advantage is that a friction welding process is a manufacturing process that can be performed efficiently and inexpensively.
  • An immediate cohesive connection in the sense of the present application is also understood to mean an embodiment in which the semiconductor component has a thin metallic contact layer serving as a contact surface on its flat side to be contacted prior to producing the friction-welded connection with the contact element.
  • the method is particularly suitable for the production of a connection contact in a semiconductor component which is arranged with one of its flat sides on a carrier substrate, and in which the metallic contact element is welded to the semiconductor component on its side facing away from the carrier substrate flat side.
  • a cylindrical contact pin is provided as the contact element, which has an annular circumferential shoulder, with which it is placed on the semiconductor device, and which is welded by a rotational friction welding with the semiconductor device.
  • the friction welding process is preferably an ultrasonic welding process, with the particularly short production times are possible.
  • a particularly space-saving and good current and heat-conducting arrangement is when the semiconductor device is disposed on a DCB carrier substrate and soldered thereto. In this way, a large-area contact on the bottom, i. on the carrier substrate facing flat side of the semiconductor device possible.
  • a semiconductor device 2 in particular a power semiconductor device, for example an IGBT or a thyristor, is arranged on a carrier substrate 4.
  • the carrier substrate 4 is a ceramic DCB carrier substrate based on aluminum oxide Al 2 O 3 or aluminum nitrite AlN, which is provided with a metallic layer 6, preferably made of copper Cu, at least on its flat side facing the semiconductor component 2.
  • the semiconductor component 2 with its flat side 8 facing the carrier substrate 4-its underside-is soldered over a large area to the carrier substrate 4 via a thin solder layer 10.
  • the semiconductor device 2 On its side facing away from the carrier substrate 4 flat side 12 - the top - the semiconductor device 2 is provided on at least a portion of its surface with a metallic layer 14 which forms in the embodiment two electrically separate contact zones 16 and 18, one of which for the load terminal and the another is provided for the control terminal.
  • the contact zone 18 provided for the control connection is contacted with a bonding wire 20.
  • the contact zone 16 provided for the load connection is electrically connected to a contact element 22, which in the example is formed by a cylindrical contact pin which has on one of its end faces an annular peripheral shoulder 24, with which it is seated in the contact zone 16 on the semiconductor component 2 and cohesively connected via a Reibsch spavon with this, that is welded.
  • the cylindrical contact pin is vertical with its cylinder axis arranged to the flat sides of the semiconductor device 2, so that there is a particularly space-saving embodiment.
  • FIG. 2 shows a particularly suitable for the production of a friction welding connection between a cylindrical part and a workpiece friction welding, in the example, an ultrasonic torsion welding device in a schematic perspective view.
  • Such an ultrasonic torsion welding apparatus includes two piezoelectric vibration transducers 30 which are mechanically coupled to a cylindrical sonotrode 32.
  • the piezoelectric vibration transducers 30 engage tangentially on the circumference of the sonotrode 32, so that their indicated by the double arrows 34 linear vibration is converted into a torsional or rotational vibration of the sonotrode 32.
  • the two workpieces 22, 4 (2) to be joined together are arranged on a receiving tool 38.
  • the picking tool 38 and the sonotrode 32 are now pressed against each other with interposed workpieces 22, 4 (2) by exerting an axial force F and the sonotrode 32 is placed in a torsional or torsional vibration with a high vibration frequency (for example 20 kHz).
  • a high vibration frequency for example 20 kHz.
  • the control connection is located on the underside (flat side 8) of the semiconductor component 2.
  • the metallic layer 6 of the carrier substrate 4 is structured accordingly.
  • a bonding wire 20 is bonded to the metallic layer 6 of the carrier substrate 4.
  • the top of the semiconductor device 2 analogous to the embodiment according to FIG. 1 provided with a metallic layer 14 which is divided into two separate contact zones 16 and 18.
  • the metallic layer 14 is produced on the upper side (flat side 12) of the semiconductor component 2 by a method as described in the introduction WO 03/030247 A2 is known, and in which in one of the metallic coating upstream process step on the semiconductor component 2 and the carrier substrate 4 existing component, a plastic film 40 is laminated, which is provided with openings and is then coated metallically, so that at the openings an electrical contact to the semiconductor device 2 is produced.
  • a contact element 22 is a hollow cylindrical contact pin
  • the metallic layer 14 on the top (flat side 12) of the semiconductor device 2 is structured such that the contact zone 18 is arranged for the control terminal within the hollow cylindrical contact element 22 and contacted there with the bonding wire 20, which runs inside the contact pin.
  • an L-shaped terminal bracket which is seated with its short leg on the contact zone 16 of the semiconductor device 2 and is also welded thereto by friction welding.
  • connection conductor 22 The attachment of the contact element 22 with a connection conductor can be done in different ways.
  • FIG. 7 is exemplified that designed as a fully cylindrical pin contact element 22 has a threaded bolt 50 at its remote from the semiconductor device 2 free end.
  • the threaded bolt 50 passes through an opening located in a connection conductor 52, so that the connection conductor 52 can be fixed with a nut 54 on a shoulder of the contact element 22 surrounding the threaded bolt 50.
  • a hollow cylindrical contact element 22 is provided, which is provided with an internal thread, so that a connecting conductor 52, which is likewise provided with an opening, can be mechanically fixed to the contact element 22 via a screw 56.
  • connection 58 with the contact element 22, as shown in FIG. 9 is illustrated with reference to an embodiment with a hollow cylindrical contact element 22 with an internal control port.
  • connection types crimp or press connections or fusion welded connections are also possible.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)
  • Die Bonding (AREA)
EP07008553A 2007-04-26 2007-04-26 Procédé pour la fabrication d'un contact à borne d'un dispositif semi-conducteur de puissance et composant électronique avec un contact à borne fabriqué selon ce procédé Ceased EP1988569A3 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP07008553A EP1988569A3 (fr) 2007-04-26 2007-04-26 Procédé pour la fabrication d'un contact à borne d'un dispositif semi-conducteur de puissance et composant électronique avec un contact à borne fabriqué selon ce procédé

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP07008553A EP1988569A3 (fr) 2007-04-26 2007-04-26 Procédé pour la fabrication d'un contact à borne d'un dispositif semi-conducteur de puissance et composant électronique avec un contact à borne fabriqué selon ce procédé

Publications (2)

Publication Number Publication Date
EP1988569A2 true EP1988569A2 (fr) 2008-11-05
EP1988569A3 EP1988569A3 (fr) 2008-12-10

Family

ID=39761045

Family Applications (1)

Application Number Title Priority Date Filing Date
EP07008553A Ceased EP1988569A3 (fr) 2007-04-26 2007-04-26 Procédé pour la fabrication d'un contact à borne d'un dispositif semi-conducteur de puissance et composant électronique avec un contact à borne fabriqué selon ce procédé

Country Status (1)

Country Link
EP (1) EP1988569A3 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103028836A (zh) * 2011-10-04 2013-04-10 隆达电子股份有限公司 增强基板与半导体芯片间打线接合的方法及焊接控制系统
US9773719B2 (en) 2012-11-26 2017-09-26 Infineon Technologies Dresden Gmbh Semiconductor packages and methods of fabrication thereof

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665254A (en) * 1970-10-12 1972-05-23 Rca Corp Semiconductor diode

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3137570A1 (de) * 1980-09-25 1983-03-31 Brown, Boveri & Cie Ag, 6800 Mannheim Verfahren zum direkten verbinden von kupferteilen mit oxidkeramiksubstraten
DE3523061A1 (de) * 1985-06-27 1987-01-02 Siemens Ag Halbleiter-chip-anordnung
US5189507A (en) * 1986-12-17 1993-02-23 Raychem Corporation Interconnection of electronic components
US5715989A (en) * 1996-06-04 1998-02-10 Texas Instruments Incorporated Microelectronic wire bonding using friction welding process
DE102004003275B4 (de) * 2004-01-21 2007-04-19 Infineon Technologies Ag Halbleiterbauteil mit Verbindungselementen auf Halbleiterchips und Verfahren zur Herstellung derselben
DE102005002707B4 (de) * 2005-01-19 2007-07-26 Infineon Technologies Ag Verfahren zur Herstellung elektrischer Verbindungen in einem Halbleiterbauteil mittels koaxialer Mikroverbindungselemente

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665254A (en) * 1970-10-12 1972-05-23 Rca Corp Semiconductor diode

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103028836A (zh) * 2011-10-04 2013-04-10 隆达电子股份有限公司 增强基板与半导体芯片间打线接合的方法及焊接控制系统
US9773719B2 (en) 2012-11-26 2017-09-26 Infineon Technologies Dresden Gmbh Semiconductor packages and methods of fabrication thereof
US10325834B2 (en) 2012-11-26 2019-06-18 Infineon Technologies Dresden Gmbh Semiconductor packages and methods of fabrication thereof
DE102013113061B4 (de) * 2012-11-26 2020-10-08 Infineon Technologies Dresden Gmbh Halbleitervorrichtung und Verfahren für deren Herstellung
DE102013022519B3 (de) 2012-11-26 2023-07-13 Infineon Technologies Dresden Gmbh Halbleitervorrichtung und Verfahren zum Ausbilden einer Halbleitervorrichtung

Also Published As

Publication number Publication date
EP1988569A3 (fr) 2008-12-10

Similar Documents

Publication Publication Date Title
DE102009033321B4 (de) Leistungshalbleitervorrichtung
DE102013219833B4 (de) Halbleitermodul mit leiterplatte und vefahren zur hertellung eines halbleitermoduls mit einer leiterplatte
DE102014221636B4 (de) Halbleitermodul und Verfahren zum Herstellen desselben
DE102010030317B4 (de) Schaltungsanordnung mit Shuntwiderstand
DE102009055691B4 (de) Leistungshalbleitermodul
DE102009014794B3 (de) Verfahren zum Herstellen eines für Hochvoltanwendungen geeigneten festen Leistungsmoduls und damit hergestelltes Leistungsmodul
EP2743973A2 (fr) Procédé de mise en contact d'un élément semi-conducteur par soudage d'un élément de contact à une couche frittée sur l'élément semi-conducteur et composant semi-conducteur avec une stabilité améliorée vis-à-vis des influences thermomécaniques
EP3401950B1 (fr) Procédé de fabrication d'un module semiconducteur de puissance
DE102014115909B4 (de) Press-Pack-Zelle und Verfahren zum Betrieb einer Press-Pack-Zelle
DE102019211109A1 (de) Verfahren und Entwärmungskörper-Anordnung zur Entwärmung von Halbleiterchips mit integrierten elektronischen Schaltungen für leistungselektronische Anwendungen
EP2757586B1 (fr) Module semi-conducteur de puissance et procédé de fabrication d'un module semi-conducteur de puissance
DE102004041088A1 (de) Halbleiterbauteil in Flachleitertechnik mit einem Halbleiterchip
DE102007036841B4 (de) Halbleiterbauteil mit Halbleiterchip und Verfahren zu dessen Herstellung
DE102015220639B4 (de) Halbleitervorrichtung und Verfahren zum Herstellen derselben
DE102016115221A1 (de) Verfahren zum Verbinden von mindestens zwei Substraten zur Bildung eines Moduls
EP1988569A2 (fr) Procédé pour la fabrication d'un contact à borne d'un dispositif semi-conducteur de puissance et composant électronique avec un contact à borne fabriqué selon ce procédé
EP2704194B1 (fr) Module semi-conducteur de puissance et procédé de fabrication d'un module semi-conducteur de puissance
EP3384527B1 (fr) Module électronique de puissance
DE102007002807B4 (de) Chipanordnung
DE102019115573B4 (de) Leistungselektronische Schalteinrichtung und Verfahren zur Herstellung
DE102005046710B4 (de) Verfahren zur Herstellung einer Bauelementanordnung mit einem Träger und einem darauf montierten Halbleiterchip
EP4047648A1 (fr) Module de puissance comprenant un composant de puissance connecté à un substrat par frittage et brasage et procédé de fabrication correspondant
WO2012062300A2 (fr) Système de câblage à fil épais et procédé de fabrication
DE102012207560B4 (de) Verfahren zur herstellung und zum betrieb eines halbleitermoduls
WO2007080027A1 (fr) Dispositif de refroidissement de composants de puissance sur des cartes de circuit imprimé et son procédé de fabrication

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR

AX Request for extension of the european patent

Extension state: AL BA HR MK RS

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR

AX Request for extension of the european patent

Extension state: AL BA HR MK RS

17P Request for examination filed

Effective date: 20090518

17Q First examination report despatched

Effective date: 20090710

AKX Designation fees paid

Designated state(s): AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LI LT LU LV MC MT NL PL PT RO SE SI SK TR

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION HAS BEEN REFUSED

18R Application refused

Effective date: 20110915