EP1898566A1 - Procédé et dispositif de transmission de données numériques - Google Patents

Procédé et dispositif de transmission de données numériques Download PDF

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Publication number
EP1898566A1
EP1898566A1 EP07112699A EP07112699A EP1898566A1 EP 1898566 A1 EP1898566 A1 EP 1898566A1 EP 07112699 A EP07112699 A EP 07112699A EP 07112699 A EP07112699 A EP 07112699A EP 1898566 A1 EP1898566 A1 EP 1898566A1
Authority
EP
European Patent Office
Prior art keywords
data
module
data storage
storage area
modules
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP07112699A
Other languages
German (de)
English (en)
Inventor
Carsten Resch
Juergen Hanisch
Otto Pfitzer
Uwe Scheurer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP1898566A1 publication Critical patent/EP1898566A1/fr
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/403Bus networks with centralised control, e.g. polling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40006Architecture of a communication node
    • H04L12/40032Details regarding a bus interface enhancer
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/54Organization of routing tables
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/10Packet switching elements characterised by the switching fabric construction
    • H04L49/103Packet switching elements characterised by the switching fabric construction using a shared central buffer; using a shared memory
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00Packet switching elements
    • H04L49/25Routing or path finding in a switch fabric
    • H04L49/253Routing or path finding in a switch fabric using establishment or release of connections between ports
    • H04L49/254Centralised controller, i.e. arbitration or scheduling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/44Star or tree networks

Definitions

  • the invention relates to a method for transmitting digital data between a plurality of modules, each associated with at least one address, via a central processing unit.
  • the invention relates to a transmission device with a plurality of modules, each of which is assigned at least one address, and with a central processing unit with a buffer.
  • Networks for example computer networks, consist of a plurality of computers exchanging data with each other, the so-called participants.
  • the participants can be connected in a variety of ways.
  • the concrete structure of a network, that is to say which participant is connected to which or to which other participants, is called topology of the network.
  • Known topologies are, for example, the ring topology, in which the subscribers are each arranged with two adjacent subscribers in a closed ring.
  • Another example is the so-called star topology, in which there is a central participant to which all other participants are connected with a two-point connection. The other participants are not connected.
  • routing In a network it is necessary that information can be exchanged between the participants in the form of data, in particular digital data. Should data be transmitted from one subscriber to another subscriber within the network, a path from the sending subscriber to the receiving subscriber must be established. This process is called routing.
  • Routing can be done in networks with or without software support.
  • routing with software support decides a suitable computer program which participant of the network is next responsible for the transport of the data.
  • the software may also control the routing of the data to the next subscriber.
  • This forwarding can be active or passive. In the case of active forwarding by the computer program, the data from one participant is copied into the memory of the other participant. In passive forwarding, the data is copied by a subscriber into a buffer from which the next subscriber picks up the data. In this form of routing, the computer program must constantly intervene in the network or the chain of data transport.
  • a further object of the present invention is to provide a transmission device for carrying out the method.
  • the object is achieved by a method of the aforementioned type, which is characterized in that the buffer for each module an addressable via the module address address data storage area and a state identifier of the data storage area for information about whether the Data storage area is writable with new data or contains valid data for reading, wherein a transmitting module writes data in data storage areas in response to the status identifier and another module received reads the data depending on the status identifier from the data storage area.
  • the modules may be the aforementioned participants of a computer network.
  • the term module is to be understood more generally.
  • a module is any hardware circuit that changes data. For example, modules are conceivable that change the sampling rate, number of channels or the resolution of the digital data to be transmitted.
  • the method according to the invention offers the advantage that the software in the system comprising the modules is relieved of the tasks of routing.
  • the method according to the invention offers the advantage that long signal propagation times of the data between the individual modules are kept low even with an increasing number of modules, so that a larger number of modules can be contained in the network.
  • the method according to the invention is also suitable for transmitting data over a plurality of logical channels.
  • each module must be allocated as many addressable data storage areas as addressable as logical channels are to be transmitted.
  • the sending module places the data in its associated data storage area and the received module reads the data from the data storage area of the sending module. For this purpose, the address of the data storage area of the transmitting module is transmitted to the module received.
  • This embodiment uses all the modules their associated data storage areas for storing the data to be sent by them.
  • the sending module stores data in the data storage area associated with a received module, and the received module reads the data from its associated data storage area. This is the transmitting module transmits the address of the data storage area of the received module. In this embodiment, all modules use the data storage areas assigned to them for reading the data.
  • the filing and reading out of the data from or into the data storage area is controlled by the central unit.
  • the central unit transmits to the modules those addresses in whose associated data storage areas the data to be transmitted are stored or from which these data are to be read. Further, the central unit transmits the status identifiers to notify the received module that valid data is available.
  • the status code is used by the sending module as information about whether the data in the data storage area to be described has already been read and can be overwritten. But it is also possible that the switching of the paths between the individual modules via a higher-level software.
  • synchronous data can be transmitted without the need to transmit clock information. This can be realized by the data exchange between the central processing unit and the transmitting or receiving module is coupled to the clock of the central processing unit.
  • the storing and reading out of the data from or into the data storage area is expediently triggered by the status identifier, in order to prevent any time delays in the transmission of the data.
  • the data is always forwarded in this way at the earliest possible time.
  • the data, addresses and / or status identifiers are exchanged via hardware interfaces between the modules and the central unit.
  • Hardware interfaces have the advantage that they can transfer the data very quickly and no additional software is required.
  • the modules, the interfaces and the central unit are integrated in a semiconductor chip. This allows many modules to be linked together in a small space.
  • a generic transmission device which is adapted to transmit digital data according to one of the methods of claims 1 to 6, by the buffer for each module via the module associated address addressable data storage area and a state identifier of the data storage area for information whether the data storage area is writable with new data or contains valid data for reading, wherein data can be written by a transmitting module in data storage areas depending on the status identifier and the data readable by another received module depending on the status identifier from the data storage area.
  • the transmission device is implemented in hardware. As a result, a fast data transmission and a fast activation of transmission paths can be achieved.
  • FIG. 1 shows a transmission device 1.
  • the transmission device 1 has five modules 2, 3, 4, 5, 6.
  • the modules 2, 3, 4, 5, 6 are hardware circuits that can change a data stream of audio data. For example, the sampling rate of an audio signal, the number of channels to be transmitted or the resolution can be changed.
  • the transmission device 1 further comprises a central unit 7 with a memory area 8, which is designed as RAM (random access memory).
  • RAM random access memory
  • each module 2, 3, 4, 5, 6 is assigned a data storage area 9 which can be addressed via an address 10.
  • the data storage area 9 and the assigned address 10 are assigned to the module 2.
  • the data storage area 11 with the assigned address 12 is assigned to the module 6.
  • the central unit 7 further comprises for the addressable data storage area 9, 11 a status identifier for information as to whether the data storage area 9, 11 can be written with new data or contains valid data for reading out.
  • the modules 2, 3, 4, 5, 6 are connected to the central unit 7 via suitable interfaces 13, 14. Via the interfaces 13, 14 addresses 10, 12, the data storage areas 9, 11 are assigned to be exchanged between the central unit 7 and the modules 2, 3, 4, 5, 6.
  • Each module 2, 3, 4, 5, 6 knows its associated data storage area 9, 11, which can be addressed via the address 10, 12.
  • the address 10 of the associated memory area 9 is implemented in the module 2 in hardware in this embodiment. Of course, the address 10 of the associated memory area 9 could be communicated to the module 2 also via the central unit 1.
  • each module 2, 3, 4, 5, 6 can write data into the respectively assigned data storage area 9, 11. Read access is not allowed. For example, module 2 may only write data to data storage area 9.
  • the modules 2, 3, 4, 5, 6, however, it is allowed to read from the data storage areas 9, 11 of the other modules 2, 3, 4, 5, 6.
  • the module 6 can read from the data storage area 9 associated with the module 2.
  • the transmitting module In order to transmit the data from the module 2, the transmitting module, to the module 6, the module received, the module 2 writes the data to be transmitted in the data memory area 9 assigned to it.
  • the central unit 7 sets the status identifier for the data memory area 9 to the status in that valid data are available for reading.
  • the central unit 1 transmits the address 10 of the described data storage area 9 to the received module, here the module 6. Between which Modules 2, 3, 4, 5, 6 in individual cases to be exchanged data is controlled by the central unit, optionally by an input from a user from the outside via a corresponding input device (not shown).
  • the module 6 recognizes from the status identifier that valid data is available in the data storage area 9. Where the data is located in the buffer 8 of the central unit 7, the module 6 is informed about the address 10. The module 6 reads the data from the data storage area 9.
  • the second alternative for the transmission of data from the module 2 to the module 6 is that the modules 2, 3, 4, 5, 6 are only allowed to read data from the data storage registers 9, 11 assigned to them. Writing to the associated data storage areas 9, 11 is not permitted.
  • modules 2, 3, 4, 5, 6 are allowed to write to the data storage areas 9, 11 of the other modules 2, 3, 4, 5, 6.
  • the module 2 To transfer the data from the module 2 to the module 6, the module 2 is informed by the central unit 7 of the address 12 of the data storage area 11 of the module 6. Then, the module 2 writes the data to be transmitted in the data storage area 11 of the module 6. Then, the central unit 7 transmits the module 6, the status identifier for the data storage area 11. In the present case the module 6 is transmitted the status that valid data for reading from the data storage area 11th ready. The module 6 reads the data from the data storage area 11 via the interface 14.
  • the status identifier for the data storage area 11 is set to the status that the data storage area 11 can be written with new data. Due to the state identifier, it is not necessary to delete the data storage area 9, 11 after each read. The data that is out of date can easily be overwritten.
  • the method according to the invention can also be used to exchange synchronous data, ie those which have to comply with a fixed time grid.
  • the synchronization takes place not via the exchange of clock information between the modules 2, 3, 4, 5, 6, but only via the common clock of the CPU 7.
  • an audio data stream with a time base of 16 kHz and an audio data stream with a time base of 40 kHz could be routed without changing the hardware.
EP07112699A 2006-09-08 2007-07-18 Procédé et dispositif de transmission de données numériques Withdrawn EP1898566A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102006042317.8A DE102006042317B4 (de) 2006-09-08 2006-09-08 Verfahren und Vorrichtung zur Übertragung digitaler Daten

Publications (1)

Publication Number Publication Date
EP1898566A1 true EP1898566A1 (fr) 2008-03-12

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EP07112699A Withdrawn EP1898566A1 (fr) 2006-09-08 2007-07-18 Procédé et dispositif de transmission de données numériques

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DE (1) DE102006042317B4 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102008057910B4 (de) 2008-11-18 2010-10-07 P&L Edv Systeme Gmbh Patientenverwaltungssystem mit intelligenter Schnittstelleneinrichtung zur Übertragung medizinischer Daten
DE102014112704B3 (de) * 2014-09-03 2015-12-03 Phoenix Contact Gmbh & Co. Kg Netzwerksystem und Netzwerkteilnehmer zur Datenübertragung über eine Cloud-Infrastruktur und Verfahren zur Einrichtung

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320859B1 (en) * 1997-10-31 2001-11-20 Nortel Networks Limited Early availability of forwarding control information
US20030002509A1 (en) * 2001-05-17 2003-01-02 Jan Vandenhoudt Distributed shared memory packet switch
US6674753B1 (en) * 1998-07-10 2004-01-06 Nec Corporation Switching apparatus of time division multiplexing system for controlling data transmission through message memory shared between plural channels, method for data transmission and information storage medium for the method

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6122274A (en) * 1997-11-16 2000-09-19 Sanjeev Kumar ATM switching system with decentralized pipeline control and plural memory modules for very high capacity data switching
DE19831405A1 (de) * 1998-07-13 2000-01-20 Siemens Ag Steuerungssystem mit einem Personalcomputer
US6912566B1 (en) * 1998-07-28 2005-06-28 Siemens Aktiengesellschaft Memory device and method for operating the memory device
JP3731385B2 (ja) * 1999-06-09 2006-01-05 株式会社日立製作所 パケット交換装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320859B1 (en) * 1997-10-31 2001-11-20 Nortel Networks Limited Early availability of forwarding control information
US6674753B1 (en) * 1998-07-10 2004-01-06 Nec Corporation Switching apparatus of time division multiplexing system for controlling data transmission through message memory shared between plural channels, method for data transmission and information storage medium for the method
US20030002509A1 (en) * 2001-05-17 2003-01-02 Jan Vandenhoudt Distributed shared memory packet switch

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DE102006042317A1 (de) 2008-03-27

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