EP1817778A1 - Composant multicouche pourvu de plusieurs varistances de capacite differente en tant qu'element de protection contre les decharges electrostatiques - Google Patents

Composant multicouche pourvu de plusieurs varistances de capacite differente en tant qu'element de protection contre les decharges electrostatiques

Info

Publication number
EP1817778A1
EP1817778A1 EP05824292A EP05824292A EP1817778A1 EP 1817778 A1 EP1817778 A1 EP 1817778A1 EP 05824292 A EP05824292 A EP 05824292A EP 05824292 A EP05824292 A EP 05824292A EP 1817778 A1 EP1817778 A1 EP 1817778A1
Authority
EP
European Patent Office
Prior art keywords
varistor
inner electrode
electrode
internal electrodes
plane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP05824292A
Other languages
German (de)
English (en)
Other versions
EP1817778B1 (fr
Inventor
Thomas Feichtinger
Thomas Pürstinger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Electronics AG
Original Assignee
Epcos AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Epcos AG filed Critical Epcos AG
Publication of EP1817778A1 publication Critical patent/EP1817778A1/fr
Application granted granted Critical
Publication of EP1817778B1 publication Critical patent/EP1817778B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/18—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material comprising a plurality of layers stacked between terminals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01C—RESISTORS
    • H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
    • H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
    • H01C7/105—Varistor cores

Definitions

  • the invention relates to an electrical multilayer component which includes ESD protective elements.
  • a ceramic multilayer varistor which has opposing internal electrodes.
  • the internal electrodes connected to the same electrical potential are arranged one above the other.
  • the electrode stacks connected to different electrical potentials are arranged next to each other. This device is used as ESD protection of high-frequency circuits and data lines.
  • the object to be achieved is to specify a multilayer component with ESD protective elements, which is suitable both as ESD protection of high-frequency circuits and data lines and as ESD protection of supply lines.
  • An electrical component is specified in which a first varistor (having a relatively large capacitance and power compatibility) is formed by two overlapping electrodes and a varistor ceramic arranged therebetween, and a second varistor by two internal electrodes lying in one plane and a varistor ceramic arranged between them (with a relatively small capacity due to its preferably small active volume).
  • a first varistor having a relatively large capacitance and power compatibility
  • a second varistor by two internal electrodes lying in one plane and a varistor ceramic arranged between them (with a relatively small capacity due to its preferably small active volume).
  • a multilayer component is specified with a base body, on the side surfaces of which external contacts are arranged, which are connected to internal electrodes arranged in the base body.
  • the main body has a plurality of layers of varistor ceramic (eg ZnO-Bi, ZnO-Pr), between which metallization levels with electrode structures formed therein are arranged.
  • a first varistor is formed by a pair of superimposed internal electrodes and the varistor ceramic arranged therebetween.
  • a second varistor is formed by two juxtaposed inner electrodes and arranged between their mutually facing side surfaces varistor ceramic.
  • the second varistor which has a low capacitance, is suitable as ESD protection for a radio frequency or data line and can be connected between this fast signal line and ground.
  • the first varistor which is characterized by a higher Stromimpulragagiller and a much higher capacity, it can be connected between a power or voltage supply line and ground.
  • more than just one or two internal electrodes can be provided.
  • Two main surfaces of the superimposed internal electrodes lying opposite one another in the vertical direction span an active volume of the first varistor.
  • the ak- tive volume of the first varistor is preferably at least 0.001 mm 3 .
  • Two side surfaces of the juxtaposed inner electrodes, which lie opposite one another in the horizontal direction, span an active volume of the second varistor, which is preferably at most 10% of the active volume of the first varistor.
  • the distance between the juxtaposed inner electrodes is in a preferred variant at least 20 microns.
  • the first and the second varistor preferably share the same inner electrode, which is connected in a variant to ground, which z. B. represents a common reference potential for high-frequency or data lines and supply lines.
  • the inner electrode connected to the ground - preferably the electrode with the largest area in the corresponding plane - is referred to below as the first electrode and the inner electrodes disposed in the same plane next to the first electrode are referred to as second electrodes.
  • the arranged in the further level, the first electrode opposite the inner electrode is referred to as the third electrode and arranged in the same plane, lying adjacent to the third electrode inner electrodes as fourth electrodes.
  • Second varistors arranged in the first plane are each formed by the first electrode, in each case one of the second electrodes and the varistor ceramic located therebetween. Further second varistors arranged in the second plane are in each case connected through the third electrode, one each ne of the fourth electrode and the intermediate varistor ceramic formed.
  • the first electrode is preferably arranged centrally in the respective plane. However, it is also possible that the first electrode is arranged to one side of the first plane and the second electrodes are arranged to the opposite side of this plane.
  • the superimposed internal electrodes preferably have substantially equal areas.
  • the distance between two second electrodes is preferably at least twice as large as the distance between the first and one of the second electrodes.
  • All features relating to the first level, the first electrode and the second electrode are - as far as is technically meaningful - transferable to the second level, third electrode and fourth electrodes.
  • a plurality of first electrodes or a divided first electrode may be provided.
  • the first plane is divided in a lateral direction into two edge regions and a middle region arranged therebetween, wherein the first electrode is arranged in the middle region and the second electrodes are arranged in the edge regions, wherein the central region is free of the second electrodes.
  • the terminals of the first and third electrodes are preferably to the opposite side surfaces of the basic body led out.
  • the terminals of the first and the third electrode may alternatively be led out to the same side of the main body or to different, mutually perpendicular side surfaces of the main body.
  • the terminals of the second and fourth electrodes may be led out to like side surfaces of the main body as the first and the third electrode. Only two side surfaces of the main body are covered with external contacts. But it is also possible to occupy all side surfaces of the body with at least one external contact.
  • the first and second planes preferably have essentially identically dimensioned and identically arranged electrode structures.
  • Mutually associated second and fourth electrodes can be arranged one above the other or offset from each other and connected to the same external contact.
  • the formed in different levels second varistors whose electrodes are arranged one above the other, are preferably connected on one side to the same external contact.
  • the second varistors formed in the same plane are preferably connected to different external contacts, wherein each external contact can be connected to a separate signal line. This makes it possible to suppress several fast signal lines by a single compact device.
  • a first high-capacitance varistor may be formed, which may be formed by a further first electrode, a further third electrode lying opposite it in the vertical direction, and a third electrode disposed opposite thereto.
  • te varistor ceramic is formed.
  • Two first varistors may also have a common electrode which can be connected to ground, wherein these varistors are connected on the other side to a respective external contact or can be connected to the respective own supply line.
  • the first varistor can be realized by a stack of superimposed electrodes (instead of only a pair of internal electrodes arranged one above the other). In this case, first and third electrodes are arranged alternately in the vertical direction. It is also possible for a plurality of first and second planes (with second or fourth electrodes) to be provided, which are arranged alternately.
  • the multilayer component is preferably suitable for surface mounting.
  • the external contacts are designed such that they each extend beyond the side surface of the base body and are partially arranged at least on the lower main surface of the base body.
  • the switching voltage of a varistor formed in the vertical direction, d. H. the varistor voltage between the superimposed internal electrodes is preferably at least 5 V at a current load of 1 mA.
  • the varistor voltage in an advantageous variant is at most 250 V.
  • the SehaltSpannung of a varistor formed in the horizontal direction, ie the varistor voltage between the juxtaposed inner electrodes, at a current load of 1 mA is preferably at least 10 V.
  • the varistor voltage is in an advantageous variant of a maximum of 500 V.
  • FIG. 1A shows a varistor component with a first and two second varistors in cross section
  • FIG. 1B shows the plan view of the first plane of the component according to FIG. 1A
  • FIG. 1C shows the plan view of the second plane of the component according to FIG.
  • FIG. 1D shows the top view of the component according to FIG. 1A from above (left), on a first side surface (in the middle) and on a second side surface (on the right),
  • FIG. IE shows the equivalent circuit diagram of the component according to FIGS. IA to ID,
  • FIG. 2A shows a component with a first varistor and four second varistors in cross section
  • FIG. 2B shows the plan view of the first plane of the component according to FIG. 2A
  • FIG. 2C shows the plan view of the second plane of the component according to FIG. 2A
  • FIG. 2D shows a view of the component according to FIGS. 2A to 2C from above
  • FIG. 3A shows a varistor component with a first varistor and four second varistors each formed in each plane
  • FIG. 3B shows the plan view of the first plane of the component according to FIG. 3A
  • FIG. 3C shows the plan view of the second plane of the component according to FIG. 3A
  • FIG. 3D shows the view of the component according to FIGS. 3A to 3C from above (left) and from the side (right),
  • Figure 3E is an electrical equivalent circuit diagram of the device according to Figures 3A to 3D.
  • FIGS. 1A to 1D show various views of a component according to the invention with a base body GK comprising a plurality of layers of varistor ceramic, between which a first metallization level El with internal electrodes IE10, IE11 formed therein and a second metallization level E2 with internal electrodes IE20, IE21 formed therein are arranged ,
  • Figure IA corresponds to a cross-section through the device along the line AA 'shown in Figures IB and IC.
  • FIG. 1B shows the first plane E1 and FIG. 1C the second plane E2 of the component according to FIG. 1A.
  • the first inner electrode IE10 has a larger area than the second inner electrode IE11 arranged next to it.
  • the below the The first inner electrode IE10 arranged third inner electrode IE20 has a larger area than the arranged next to her or below the second inner electrode IEIl fourth inner electrode IE21.
  • the inner electrode IE10 is connected to an outer contact 1 and the inner electrode IE20 is connected to an outer contact 2.
  • the internal electrodes IEI1, IE21 are connected to a further external contact 3.
  • the external contacts 1 and 2 are arranged on opposite first side surfaces of the main body GK.
  • the outer contact 3 is arranged on a second side surface of the main body GK, which is perpendicular to the first side surfaces. In this variant, only three side surfaces are covered with external contacts.
  • a first varistor (varistor V1 in FIG. IE) is formed by the opposing internal electrodes IE10, IE20 and a varistor ceramic arranged therebetween.
  • the first inner electrode IE10 and the third inner electrode IE20 preferably have the same areas.
  • a second varistor V21 is formed by the inner electrodes IE10, IE11 arranged side by side in the first plane El and a varistor ceramic arranged therebetween.
  • a further second varistor V25 is formed by the inner electrodes IE20, IE21 arranged side by side in the second plane E2 and a varistor ceramic arranged therebetween.
  • An active volume of a varistor is the volume of a varistor material arranged between two electrodes.
  • the active volume of the first varistor Vl is spanned between the mutually facing main surfaces of the internal electrodes IE10 and IE20 and is at least 0.001 mm-3.
  • the active volume of the second varistor V21 is clamped between opposite side surfaces of the first inner electrode IE10 and the second inner electrode IE1l.
  • the active volume of the second varistor V21 is clear -. B. by at least one order of magnitude, in a preferred variant by at least two orders of magnitude - smaller than the active volume of the first varistor Vl.
  • FIG. 1D shows on the left a view of the component according to FIGS. 1A to 1C from above, in the middle the plan view of the first side surface and on the right the plan view of the second side surface of the component.
  • the external contacts 1, 2, 3 go beyond the respective side surface and are partially arranged on a main surface (preferably underside) of the base body, wherein they form suitable electrical connections of the component for surface mounting.
  • the internal electrodes IEI1 and IE21 connected to the same electric potential are stacked. In a variant of the invention, it is possible that these electrodes are laterally offset from each other.
  • first and the third inner electrode IE10, IE20 are connected to the external contacts arranged on the opposite side surfaces.
  • All external contacts of the component can, as in FIG. 3D, be mounted on mutually opposite first side surfaces of the component. be arranged elements, wherein the perpendicular thereto second side surfaces of the body are free of external contacts. It is also possible that all side surfaces of the body, as in the variant of Figure 2D, are covered with external contacts.
  • FIG. 2A A further variant of the invention is shown in FIG. 2A, in which in the first plane E1 the first inner electrode IE10 is arranged between two second inner electrodes IE11, IE12 and in the second level E2 the third inner electrode IE20 is arranged between two fourth inner electrodes IE21, IE22.
  • the first varistor Vl and the second varistors V21, V25 are formed here and in the variant presented in FIGS. 3A to 3E as in FIGS. 1A to 1 IE.
  • a further second varistor is formed by the internal electrodes IE10, IE12 and a varistor ceramic arranged therebetween.
  • a further second varistor is formed by the internal electrodes IE20, IE22 and a varistor ceramic arranged therebetween.
  • FIGS. 3A to 3D show various views of a further varistor component comprising a total of eight second varistors.
  • FIG. 3A shows this component in a schematic cross section along the line AA 1 .
  • FIGS. 3B, 3C show the plan view of the first El or second E2 plane E2 of the component.
  • a first inner electrode IE10 and four second inner electrodes IEI1, IE12, IE13 and IE14 are arranged.
  • the first inner electrode IE10 is arranged centrally in the plane E1 between two groups of second inner electrodes.
  • a third inner electrode is IE20 and four fourth internal electrodes IE21, IE22, IE23 and IE24 arranged.
  • the third inner electrode IE20 is arranged centrally in the plane E2 between two groups of fourth internal electrodes.
  • the second varistors are formed in the first plane El by a respective second inner electrode, the side surface of the first inner electrode IE10 opposite thereto and the varistor ceramic arranged therebetween.
  • the further second varistors are formed in the second plane E2 by a respective fourth inner electrode, the opposite side surface of the third inner electrode IE20 and the varistor ceramic arranged therebetween.
  • FIG. 3E shows the equivalent circuit diagram of the component presented in FIGS. 3A to 3D.
  • the first varistor Vl is connected between the external contacts 2 and 5.
  • the external contact 2 is grounded. All second varistors V21 to V28 are connected to the external contact 2.
  • the second varistor V21 defined by the internal electrodes IE10 and IE1 is connected to the external contact 1.
  • the second varistor V22 defined by the internal electrodes IE10 and IE12 is connected to the external contact 3.
  • the second varistor V23 defined by the internal electrodes IE10 and IE13 is connected to the external contact 4 and the second varistor V24 defined by the internal electrodes IE10 and IE14 is connected to the external contact 6.
  • the further second varistors V25 to V28 are formed corresponding to the second varistors V21 to V24 in the second plane E2 of the component.
  • the present invention is not limited to the embodiments shown in this document or the number of elements shown. It is possible to form the electrode pair formed by the first and third inner electrodes to arrange arbitrarily in the corresponding metallization levels. It is possible to divide the first or the third inner electrode into two, preferably equal in area, partial electrodes and to connect these partial electrodes to a respective external electrical contact.
  • V2j second varistors, j 1 to 8

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Thermistors And Varistors (AREA)

Abstract

Composant multicouche qui possède un corps de base (GK) en céramique de varistance sur les surfaces latérales duquel sont placés des contacts externes (1, 2, 3, 4), et des électrodes internes (IE10, IE11, IE20) situées dans le corps de base (GK) et connectées aux contacts externes. Un volume actif d'une première varistance (V1) est formé entre deux électrodes internes (IE10, IE20) superposées et un volume actif d'une seconde varistance (V21) est formé entre deux électrodes internes (IE10, IE11) situées côte à côte.
EP05824292.6A 2004-12-03 2005-12-02 Composant multicouche pourvu de plusieurs varistances de capacite differente en tant qu'element de protection contre les decharges electrostatiques Active EP1817778B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004058410.9A DE102004058410B4 (de) 2004-12-03 2004-12-03 Vielschichtbauelement mit ESD-Schutzelementen
PCT/DE2005/002183 WO2006058533A1 (fr) 2004-12-03 2005-12-02 Composant multicouche pourvu de plusieurs varistances de capacite differente en tant qu'element de protection contre les decharges electrostatiques

Publications (2)

Publication Number Publication Date
EP1817778A1 true EP1817778A1 (fr) 2007-08-15
EP1817778B1 EP1817778B1 (fr) 2018-10-03

Family

ID=35998899

Family Applications (1)

Application Number Title Priority Date Filing Date
EP05824292.6A Active EP1817778B1 (fr) 2004-12-03 2005-12-02 Composant multicouche pourvu de plusieurs varistances de capacite differente en tant qu'element de protection contre les decharges electrostatiques

Country Status (5)

Country Link
US (1) US7986213B2 (fr)
EP (1) EP1817778B1 (fr)
JP (1) JP4741602B2 (fr)
DE (1) DE102004058410B4 (fr)
WO (1) WO2006058533A1 (fr)

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* Cited by examiner, † Cited by third party
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DE102004032706A1 (de) 2004-07-06 2006-02-02 Epcos Ag Verfahren zur Herstellung eines elektrischen Bauelements und das Bauelement
DE102004058410B4 (de) 2004-12-03 2021-02-18 Tdk Electronics Ag Vielschichtbauelement mit ESD-Schutzelementen
JP2009088342A (ja) * 2007-10-01 2009-04-23 Aica Kogyo Co Ltd 多層プリント配線板とその製造方法
DE102009007316A1 (de) 2009-02-03 2010-08-05 Epcos Ag Elektrisches Vielschichtbauelement
DE102009010212B4 (de) 2009-02-23 2017-12-07 Epcos Ag Elektrisches Vielschichtbauelement
DE102009049077A1 (de) 2009-10-12 2011-04-14 Epcos Ag Elektrisches Vielschichtbauelement und Schaltungsanordnung
DE102017105673A1 (de) * 2017-03-16 2018-09-20 Epcos Ag Varistor-Bauelement mit erhöhtem Stoßstromaufnahmevermögen

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Also Published As

Publication number Publication date
US7986213B2 (en) 2011-07-26
EP1817778B1 (fr) 2018-10-03
JP4741602B2 (ja) 2011-08-03
US20080186127A1 (en) 2008-08-07
JP2008522419A (ja) 2008-06-26
DE102004058410B4 (de) 2021-02-18
WO2006058533A1 (fr) 2006-06-08
DE102004058410A1 (de) 2006-06-08

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