Classifications

• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
  • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
  • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
  • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
  • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
  • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
  • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
  • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2300/00—Aspects of the constitution of display devices
  • G09G2300/04—Structural and physical details of display devices
  • G09G2300/0439—Pixel structures
  • G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2300/00—Aspects of the constitution of display devices
  • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
  • G09G2300/0809—Several active elements per pixel in active matrix panels
  • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
• • G—PHYSICS
  • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
  • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
  • G09G2300/00—Aspects of the constitution of display devices
  • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
  • G09G2300/0876—Supplementary capacities in pixels having special driving circuits and electrodes instead of being connected to common electrode or ground; Use of additional capacitively coupled compensation electrodes
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
  • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
  • H10K59/10—OLED displays
  • H10K59/12—Active-matrix OLED [AMOLED] displays
  • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements

Definitions

• the present invention relates to a microelectronic device for emitting light radiation and can be used for example to form a matrix of improved pixels of displays or OLED type screens (OLED for "Organic Light Emission Displays", in French displays organic electroluminescent).
• OLED Organic Light Emission Displays
• OLED screens are flat screens using the OLED organic diode luminescence property.
• a pixel-integrated current addressing device is generally provided.
• FIG. 1 An example according to the prior art of such an addressing device associated with a light-emitting diode 10, of the OLED (OLED for "Organic Light Emission Diode”) type is illustrated in FIG. 1.
• This example of an addressing device comprises firstly a first thin film transistor or TFT (TFT for "thin film transistor”) denoted 11, functioning as a switch, and whose opening or closing is controlled by a selection signal, for example in the form of a voltage noted vlin applied to the grid of the latter.
• TFT thin film transistor
• the addressing device further comprises at least one second thin film transistor or TFT noted 12 making it possible to produce a current id at the input of the light-emitting diode 10, as a function of a control voltage vdat, the current id causing the emission of radiation by the diode 10.
• the adjustment voltage vdat is a function a value of luminous intensity or luminance at which it is desired to fix the radiation emitted by the diode 10. For a certain value of the selection signal vlin, the first transistor 11 can be put in a "closed" state.
• the control voltage vdat is then applied to the drain of the first thin-film transistor 11, and transmitted on the gate of the second thin-film transistor 12 connected to the source of the first transistor 11, the second transistor 12 then emitting the current id to the input of the light-emitting diode 10.
• the second transistor 12 thus acts as a current modulator at the input of the diode 10.
• the second transistor 12 is generally biased in saturation mode, by a bias voltage denoted Vdd for example of the order of + 16V, applied to the drain of the second transistor 12.
• the first transistor 11 and the second transistor 12 may be TFT (Thin Film Transistor) type transistors. in French transistor thin layer), formed for example of a active layer based on amorphous silicon or polycrystalline silicon.
• TFT Thin Film Transistor
• the current modulator transistor 12 of such an addressing device may be eventually replaced by two common drain transistors biased by the voltage + Vdd, and whose respective sources are connected to an electrode of the light-emitting diode 10.
• this variant can make it possible to improve the efficiency of the method of manufacturing the OLED pixel arrays, the efficiency being defined in this case by the ratio between the number circuitry usable at the end of the manufacturing process and the total number of circuits initially subjected to the manufacturing process.
• the addressing device also comprises a capacitor 13, called a "storage” capacitor, designed to enable the vdat control signal to be retained, when this signal is transmitted on the gate of the second thin-film transistor 12.
• the capacitor 13 is generally arranged so that one of its electrodes marked 14 is connected to the gate of the current modulator transistor 12 and to the source of the first switch transistor 11, while the other electrode 15 is connected to a mass or at a fixed potential.
• This mass or this fixed potential is generally provided by a line or a bus, whose role is, as described for example in the aforementioned document and the EP document.
• the arrangement of the lines or buses used to polarize the storage capacitors Cs of the different pixels is generally such that these lines or these buses intersect other lines making it possible, for example, to route the data signals. or the biasing signals of the current modulator means may be noise source also called "cross talk".
• the capacitance value of capacitor 13 is generally high and induces a large bulk of the latter. This congestion can limit the aperture ratio of the pixels.
• the polarization of the second electrode of the storage capacitor Cs by a specific line and the space generated by this capacitor also makes the arrangement of the various components of the pixel relative to one another difficult.
• the present invention proposes a microelectronic device making it possible to produce a light radiation provided with a matrix comprising a plurality of pixels, each pixel being formed of a stack of layers and comprising: electroluminescent means, capable of emitting light radiation as a function of a current received as input, current modulator means capable of modulating, as a function of a control signal carried by a data line, said input current of the electroluminescent means,
• a selection line connected to the switch means capable of conveying said selection signal to the switch means, a polarization line connected to the current modulator means, capable of conveying a bias signal of the current modulator means, a storage capacitor , able to hold said input control signal of the current modulator means and comprising a first electrode connected to the current modulator means, the second capacitor electrode being connected to another selection line of another pixel of the matrix
• the current modulator means may be located between the switch means and the storage capacitor in said stack of layers. Such an arrangement can make it possible to limit the number of crossings of lines or semiconductor and / or different metal zones within each pixel.
• the current modulator means as well as at least a portion of the storage capacitor, may be located between the polarization line and the electroluminescent means.
• said second capacitor electrode is not connected to a line or a bus whose role is specifically and solely dedicated to the polarization of the latter, but to a line having another function. , for example that of routing the selection signal of another pixel, or for example that of polarizing the current modulator means of said pixel.
• This may in particular make it possible to facilitate the arrangement of the components of said pixel, as well as a saving of space within each pixel of the matrix.
• This space saving can make it possible to obtain pixels of reduced size or / and to improve the aperture ratio according to the Anglo-Saxon terminology of each of said pixels.
• This may also make it possible to reduce the number of crossings between lines likely to convey an electrical signal to the within a same pixel, and thus reduce the type of cross talk interference that can be generated by these crossings.
• the modulator means are connected to a polarization line. This can make it possible to associate each pixel of the matrix with a standard electronic addressing circuit or to protect itself from a specific addressing circuit.
• the modulator means comprise at least one gate capable of receiving said adjustment signal and formed from a so-called layer of gate material layer
• the first electrode of the capacitor storage can be connected to said grid and formed from a layer called "active layer", different from the layer of gate material.
• the second electrode of the capacitor and said other selection line of the other pixel can be connected and formed from a same layer, for example the layer of gate material.
• Such arrangements may make it possible to limit the number of crossings between lines or semiconductor and / or metal zones carrying different signals within each pixel and to limit the noise as well as risks of short-circuiting.
• Said electroluminescent means may comprise an electrode formed of at least one layer of organic nature. Said matrix can then be an array of OLED pixels. Said switch means may comprise at least one thin film transistor. The current modulator means may in turn comprise at least one thin film transistor. According to one possibility, the current modulator means may also comprise a thin-film transistor.
• the current modulator means may comprise a first thin film transistor and a second thin film transistor sharing a common drain region.
• said other pixel may be a pixel neighboring said pixel, for example located on the same vertical row of the pixel matrix as the latter .
• the storage capacitor may be in contact with said other selection line of said neighboring pixel over a distance of at least 50 ⁇ m or half the width of the pixel.
• the storage capacitor can take many forms. According to an advantageous embodiment, the latter may comprise a portion located between the polarization line and the electroluminescent means and another part located between the electroluminescent means and said selection line of said other pixel.
• said storage capacitor can have an L shape, which can in particular facilitate the arrangement of components within each pixel. This particular shape may also allow when one of the bars forming the X L 'is in contact with and parallel to the selection line of another pixel, to obtain a storage capacitor having good electrical properties.
• the storage capacitor may optionally be formed of two capacitors placed in parallel.
• the invention also relates to a microelectronic device for producing a light radiation having a matrix comprising a plurality of pixels, each pixel being formed of a stack of layers and comprising:
• electroluminescent means capable of emitting light radiation as a function of a current received at the input
• modulator means of current switch means connected to said data line, able to transmit or not said adjustment signal to the current modulator means as a function of a selection signal
• a selection line connected to the switch means adapted to convey said selection signal to the switch means, a polarization line connected to the current modulator means, adapted to convey a bias signal of the current modulator means, a capacitor capable of retaining said input signal from the current modulator means and comprising a first electrode connected to the current modulator means and a second capacitor electrode connected to said polarization line, the modulator means being situated in said stack between the storage capacitor and the switch means.
• the modulator means may comprise at least one gate capable of receiving said adjustment signal and formed from a so-called layer of gate material layer, the first electrode of the storage capacitor being connected to said gate and formed to from a layer called "active layer", different from the layer of gate material.
• the current modulator means and at least a portion of the storage capacitor may be located between the polarization line and the light emitting diode.
• FIG. 1 illustrates an electrical diagram of an OLED pixel according to the prior art
• FIGS. 2 and 3 illustrate electrical diagrams of exemplary pixel matrixes according to the invention
• FIG. 4 illustrates an example of a stack of layers included in a matrix of pixels according to the invention
• FIGS. 5A, 5B, 5C, 5D illustrate the patterns of different layers of such a stack
• FIG. 6 illustrates another stack of layers included in an alternative pixel matrix according to the invention
• FIGS. 7A, 7B, IC 1 illustrate the patterns of different layers of such another stack
• FIGS. 8A, 8B illustrate another example of a stack of layers included in another variant of the following OLED pixel array 1 invention.
• This device comprises a matrix of m (with m an integer) lines or "horizontal rows" (in the direction of the axis i an orthogonal reference [O; i, - j] defined in this figure) vertices “(following the direction of an axis j of the orthogonal reference [0; i; j]) of pixels or OLED-like cells (OLED for" Organic Light Emission Display ").
• a pixel P comprising, first of all, electroluminescent means of an organic nature, for example an OLED (OLED) diode which is to be noted OEL, is particularly distinguished.
• the OEL diode is able to emit light radiation as a function of a current supplied to it by means of current modulator means, for example in the form of a first thin-film transistor TFT2a and a second thin-film transistor noted TFT2b.
• the respective source regions of the first thin-film transistor TFT2a and the second thin-film transistor TFT2b are each connected to the anode of the OEL diode.
• the current modulator means are biased by a bias voltage + Vdd for example + 16V, carried by a polarization line denoted PL connected to a common drain region TFT2a transistors TFT2b and.
• the polarization line PL extends in the same direction as that of the vertical rows of the pixel array.
• the polarization line PL can be shared by several pixels belonging to the same vertical row as the pixel P, or even to all the pixels belonging to the same vertical row of the matrix as the pixel P.
• the current emitted from the means of the pixel P depends in particular on a control voltage vdat conveyed by a line that will be noted DL and which will be called "data line".
• This line of data DL extends in this example, in the direction of the vertical rows of the matrix.
• the data line DL may be shared by several pixels, or even by all the pixels belonging to the same vertical row as the pixel P.
• the data line DL is connected to switch means, which take the form of, for example, a thin-film transistor TFT1.
• the source of transistor TFT1 is connected to the gates of transistors TFT2a and TFT2b.
• the transistor TFT1 makes it possible to transmit or not on the gate of the transistor TFT2a and on the gate of the transistor TFT2b, the adjustment voltage vdat, as a function of a so-called "selection" signal noted vsel.
• the selection signal vsel is applied for example on the gate of the transistor TFT1.
• the selection voltage vsel of the pixel P is conveyed by a line called “selection", denoted SL, which extends in this example, in the same direction as that of the horizontal rows of the matrix.
• the selection line SL can be shared by several pixels, or even by all the pixels belonging to the same horizontal row as the pixel P. Thus, in this example, the pixels of the matrix are addressed, horizontal row by horizontal row.
• the pixel P furthermore comprises a so-called “storage” capacitor Cs, which makes it possible to retain the vdat adjustment signal, when this signal is transmitted to the current modulator means TFT2a and TFT2b.
• the capacitor Cs is arranged in such a way that one of its electrodes is connected to the respective gates of the modulating transistors TFT2a and TFT2b, whereas the second electrode is connected to a line or a bus acting as a ground line or a fixed potential.
• the modulating transistors TFT2a and TFT2b may be located between the switching transistor and the storage capacitor Cs. Such an arrangement may make it possible to reduce the so-called "cross talk" noise within the pixel.
• the line or the bus connected to the second electrode of the capacitor Cs corresponds in this example to a selection line SL 'of another pixel P', close to the pixel P and situated on the same vertical row as the latter .
• the selection line SL 'belonging to the neighboring pixel P' makes it possible to convey a selection signal of said neighboring pixel P '.
• the selection line SL conveys the selection signal vsel to the pixel P, while the other selection line SL 'of said neighbor pixel P' is inactive and does not carry a selection signal.
• P ' is preferably the neighboring pixel of the previously addressed line. Indeed, if P 'is addressed after P, the load at the terminals of the capacitor Cs may be modified during the addressing of the line that serves as an electrode. The other selection line SL 'can then act as a ground for the second electrode of the capacitor Cs. When SL 'is inactive, it is maintained at a fixed potential, for example between -2 V and + 2 V, generally close to OV.
• a line or a bus whose role is solely and specifically dedicated to the polarization of the second electrode storage capacitor Cs.
• This polarization is, in this example, provided by the selection line SL 'of said neighbor pixel P', which also has the role of conveying the selection signal of said neighbor pixel P '.
• Such a pixel arrangement may be compatible with a standard electronic addressing circuit, for example a circuit of the type used for LCD (Liquid Crystal Display) dies.
• the common drain transistors TFT2a and TFT2b may be replaced by a single thin-film transistor, the drain of which is polarized by the line PL, the source is connected to the anode of the OEL electroluminescent means, and the gate connected to the first electrode of the storage capacitor.
• This modulator transistor may be located between the switch transistor and the storage capacitor.
• FIG. 3 represents a variant of the exemplary device previously described. The 56
• each storage capacitor included in each pixel of the matrix and in particular in the pixel P is this time noted C 's and comprises firstly a first electrode connected to the gates of the current modulator transistors TFT2a and TFT2b, and a second electrode connected to the polarization line PL of the pixel P.
• a line or a bus whose role is solely and specifically dedicated to the polarization of the second electrode of the capacitor storage.
• This polarization is provided by the line PL which also allows the polarization signal to be conveyed from the current modulating transistors TFT2a and TFT2b.
• the arrangement within the pixel may be such that the current modulating transistors TFT2a and TFT2b are located between the switch transistor and the storage capacitor. Such an arrangement may make it possible to reduce the so-called "cross talk" noise within the pixel.
• vdat is of the order of 10V and vsel of the order of 15 V.
• FIG. 4 represents a technological stack or layers in top view of a portion of an array of OLED cells or pixels.
• the pixel P is delimited in particular by a line denoted 112 belonging to it and by another line denoted 312 belonging to a neighboring pixel P "situated on the same horizontal row of the matrix as the pixel
• the lines 112 and 312 extend in a direction parallel to the axis j of an orthogonal reference [0; /; j] defined in Figure 4, which corresponds to the same direction as that of the vertical rows of the matrix.
• the lines 112 and 312 respectively correspond to the data line DL capable of conveying the adjustment signal vdat of the pixel P, and to a data line denoted DL '' capable of conveying the adjustment signal of the neighboring pixel P ''.
• the pixel P is also delimited by another pair of lines of which a denoted 106 belongs to it and of which another denoted 206 belongs to another neighboring pixel P 'located on the same vertical row of the matrix as the pixel P.
• the lines 106 and 206 extend in a direction parallel to the axis i of the orthogonal reference [0; i; j], corresponding to the same direction as that of the vertical rows of the matrix. Lines 106 and 206 respectively correspond to the selection line SL capable of conveying the selection signal
• the arrangement of the pixel P is such that the switching transistor TFT1 is placed close to a crossing between the data line DL and the selection line SL, and in the vicinity of the current modulating transistors TFT2a and TFT2b.
• the transistors TFT2a and TFT2b meanwhile are placed between a rectangular-shaped zone 140, which corresponds to an electrode of the light-emitting diode OEL, and a line 128, which extends in a direction parallel to the axis j of the reference [0; i, - j], and corresponding to the polarization line PL of said current modulating transistors TFT2a and TFT2b.
• the modulating transistors TFT2a and TFT2b can also be located between the switch transistor TFT1 and the storage capacitor Cs.
• This arrangement can make it possible to reduce the number of crossings between zones or semiconductor and / or metallic, horizontal and vertical lines of the pixel. Cross talk noise or crossover noise and the risk of short circuits can be reduced.
• the storage capacitor of the pixel P conforms to the shape of the electrode 140 of the light-emitting diode.
• This storage capacitor Cs comprises a first portion located between the electrode 140 of the light emitting diode and the polarization line PL, and a second portion located 19
• Said technological stack is formed in particular of an active layer, for example based on polysilicon, the patterns of which are also shown in plan view in FIG. 5A.
• an active layer for example based on polysilicon
• the patterns of which are also shown in plan view in FIG. 5A.
• a zone marked 100 of this active layer are formed in particular a drain region 100a, and a source region 100b of the switching transistor TFT1.
• a zone denoted 102 are respectively formed a source region 102a of the first current modulator transistor TFT2a, another source region 102b of the second current modulator transistor TFT2b, and a drain region 102c common to the first and second second current modulator transistor.
• Another area of the active layer denoted 104 corresponds in turn to a first electrode of the storage capacitor Cs.
• This first electrode is covered with an insulator (not shown) for example based on SiO 2 , which can be formed in the same layer as the gate insulator respectively of transistors TFT1, TFT2a and TFT2b.
• the arrangement of the zones 100, 102, 104 may be such that the zone 102 is located between the zone 100 and the zone 104.
• the active zone of the current modulating transistors TFT2a and TFT2b is located between the active zone of the transistor TFT1 switch and the first electrode of the storage capacitor Cs.
• a layer of gate material for example aluminum, overcomes said gate insulator and capacitor Cs.
• the patterns of this layer based on gate material are represented in FIG. 5B and include in particular the line 106, which corresponds to the said selection line SL of the pixel P.
• Juxtaposed zones denoted 107a, 107b, 107c are each connected to the line 106. As shown by the stack of FIG. 4, these juxtaposed zones 107a, 107b, 107c cover a portion of the zone 100 of the active layer (FIG. 5A) and form a multi-gate structure for the switching transistor TFT1.
• the gate material-based layer also comprises portions 108 and 109, which, as shown by the stack of FIG. 4, cover portions of the zone 102 of the active layer, which respectively correspond to the gate of the first transistor switching circuit TFT2a and the gate of the second switching transistor TFT2b.
• Another region of the gate material layer, in the form of an X L 'and denoted 110 in FIG. 5B corresponds for its part to the second electrode of the storage capacitor Cs.
• the portions 108 and 109 of the gate material-based layer, respectively corresponding to the gate of the first switching transistor TFT2a and the gate of the second switching transistor TFT2b, are separated from the zone 110 of the material-based layer. grid.
• the second electrode is in turn connected to the line denoted 206 which corresponds to the selection line SL 'of said neighboring pixel P'.
• the second electrode of the capacitor and the selection line SL 'of the pixel P' can thus be connected and formed from the same layer, in particular of the layer of gate material.
• Line 206 serves as a fixed potential line or ground line for the second capacitor electrode.
• the pixel according to the invention does not comprise a line or zone whose role is specifically dedicated to that of line of mass or fixed potential for the second electrode of the storage capacitor.
• line 206 plays this role and also serves as a selection line SL 'of the neighboring pixel P'.
• a part noted 110a of the zone 110 extends in a direction parallel to the axis i of the reference [0; /; j] and constitutes the horizontal bar of the ⁇ L '.
• This part 100a has a length d1 which can be of the order of 50 ⁇ m, for example 58 ⁇ m and which is in contact with the selection line SL 'of the neighboring pixel P', over a distance equal to the distance d1.
• the contact distance between the second electrode of the capacitor Cs and the selection line SL 'of the neighboring pixel may vary according to the shape of the capacitor Cs.
• the contact distance between the second electrode of the capacitor and the selection line SL ' for a pixel for example, dimensions 120 microns * 360 microns or be for example of at least l / 5 th of the pixel width and not more than 4/5 PREA of the width of the pixel.
• the zone 110 forming the second electrode of the capacitor Cs may have a surface area, for example of the order of 3300 ⁇ m 2, for a capacitor capacitance of the order of 1.2 pF.
• Another part denoted 110b of this zone 110 constitutes the horizontal bar of ⁇ L ', and extends in a direction parallel to the axis j of the reference [O; T; J].
• This portion 100b has a length d2 which may be of the order of 60 microns, for example 67 microns.
• a pixel implemented according to the invention is not limited to a shape in ⁇ L '. This 'L' shape makes it possible to maintain a large contact distance between the second electrode of the capacitor and the selection line SL 'of the neighboring pixel P' and to have a storage capacitor Cs having good electrical properties, while limiting the congestion of the latter.
• a layer based on dielectric material is not limited to a shape in ⁇ L '. This 'L' shape makes it possible to maintain a large contact distance between the second electrode of the capacitor and the selection line SL 'of the neighboring pixel P' and to have a storage capacitor Cs having good electrical properties, while limiting the congestion of the latter.
• a node denoted 114 belonging to this line of data DL is electrically connected, via a vertical contact or rated via 115 to the drain region
• a second node 116, also formed in the metal layer can make it possible to provide a connection, between the source region of the switching transistor TFT1 and the gate 108 of the first current modulating transistor TFT2a, via vertical contacts or
• a third connection node denoted 120 makes it possible, by means of vertical contacts or vias denoted 121 and 122, to electrically connect the source region of the first current modulator transistor TFT2. and the noted area 140 serving as the anode for the OEL light-emitting diode.
• a fourth connection node denoted 124 makes it possible for it, via vertical contacts 125 and 126, to electrically connect the source region of the second current modulator transistor TFT2b with the anode zone 140 of the OEL diode.
• a fifth connection node noted 128, also formed in the metal layer, has the role of providing a connection between the first electrode of the capacitor Cs and the gate region of the current modulator transistor TFT2a, via vertical contacts. 129 and 130.
• the first electrode of the storage capacitor is connected to said gate of the current modulator transistor TFT2a, and thus adapted to receive the adjustment signal.
• the first electrode of the storage capacitor and the gate of the current modulator transistor TFT2a are formed from different layers. 50456
• the line noted 131 which corresponds to the polarization line PL of current modulating transistors TFT2a and TFT2b.
• a connection node noted 132 belonging to this polarization line PL is electrically connected to the common drain region TFT2a and TFT2b transistors.
• the technological stack may furthermore comprise a passivation layer, above the metal layer represented in FIG. 5B, as well as another layer represented in FIG. 5D, surmounting the passivation layer and in which zone 140 is formed forming the anode of the OEL light-emitting diode.
• This zone 140 may be based on ITO (ITO for Indium TiN Oxide) and have for example the shape of a rectangle, of length L (defined in FIG. 5D in a direction parallel to the axis j of the reference [0; i; j]) for example of the order of 250 microns, for example 253 microns.
• the stack shown in FIG. 4 and FIGS. 5A-5D is completed by at least one layer of organic nature of carrier injections (not shown ), for example based on Alq3, capable of emitting light radiation.
• no specific supply or bias line is used for the second electrode of the storage capacitor Cs.
• the number of buses in the pixel according to the invention being reduced, the number of crossings between buses or lines for conveying electrical signals within the same pixel is also this. which may allow particular phenomena of noise or "cross talk" due to these crossings.
• FIG. 6 represents another example of a technological stack of the type of the one previously described, but which differs in particular in the constitution and the shape of the storage capacitor included in each pixel.
• the storage capacitor Cs included in the pixel P differs from that illustrated in connection with FIG. 4, in that it is formed of two capacitors CsI and C's2 placed in parallel with each other. other.
• the capacitor Cs is also in the form of a rectangle (whose length is parallel to the axis j of a reference [0; i; j] defined in this figure 6) and which is placed between the polarization line PL and the electrode 140 of the light emitting diode. 26
• the technological stack of FIG. 6 notably comprises an active layer whose patterns are represented in FIG. 7A.
• the patterns of the active layer differ from those of the active layer included in the previously described stacking example, especially at a zone 404, which forms the first electrode for the capacitor CsI, and which in this example a shape of a rectangle whose length is parallel to the axis j of a reference [0; i; j].
• An area marked 402 of the active layer forms the active region of the modulator transistors TFT2a and TFT2b and is located between the first electrode of the capacitor CsI and another zone denoted 400 of the active layer acting as an active zone for the switching transistor TFT1.
• the technological stack of FIG. 6 also includes a grid material layer 411 over the active layer, the patterns of which are shown in FIG. 7B. Among the patterns of the noted grate material layer
• [0; i; j] constitutes a second electrode for the capacitor CsI.
• This second electrode is as for the pixel example described above, connected to a selection line SL 'of another pixel P', adjacent to the pixel P and located on the same vertical row of the matrix as the latter.
• the zone marked 410 also constitutes an electrode for the capacitor Cs2.
• An area of the grid material layer, including first modulation transistor TFT2a and the gate of the second modulation transistor TFT2b, is located between the zone 410 and juxtaposed zones denoted 107a, 107b, 107c forming a multi-gate structure for the switching transistor TFT1.
• the technological stack further includes a metal layer 435, located over the gate material layer 411, and whose patterns are shown in Figure 7C.
• the metal layer 435 are formed in particular the polarization line PL, as well as the data line DL.
• the metal layer 435 comprises in particular an additional pattern 436, in the form of a rectangle, whose length is parallel to the axis j of a orthogonal reference [0; i; j].
• Pattern 436 forms another electrode for capacitor C's2. This second electrode is connected to the first electrode of the capacitor CsI formed in the active layer 405, via vias or vertical contacts 437.
• the pattern 436 is also connected to another additional pattern 438 formed in the metal layer. 435 and which, via vias or vertical contacts 439, is connected to the gate of the first current modulator transistor TFT2a.
• FIGS. 8A and 8B illustrate a technological stacking variant seen from above of a pixel, of the type of those included in the matrix previously described in connection with FIG. 3.
• zones 500, 502, 504 formed from an active layer are shown.
• Zone 502 serves as an active area for the current modulating transistors and is located between a zone 500 acting as an active zone for the switch transistor and a zone 504 serving as a first electrode of the storage capacitor.
• a gate material layer 511 on the active layer and another metal layer 535, located above layer 511 are shown.
• the layer based on gate material is formed in particular a zone 510, for example in the form of a rectangle, parallel in the direction of its length to the polarization line PL of the pixel P.
• the polarization line PL of the pixel P is itself formed in the metal layer 535.
• the zone 510 of the layer of gate material forms a second electrode of the storage capacitor C 's.
• the arrangement of the polarization line PL with respect to the zone 510 is such that an orthogonal projection on the same plane of the zone 510 and of the line PL are at least partially merged.
• the zone 510 is electrically connected to the polarization line PL via vertical contacts 532.
• the polarization line PL serves as a fixed potential line for one of the electrodes of the capacitor C 's.
• the other electrode of the capacitor C 's (not shown in this figure) is connected to or connected to the gate of the current modulator transistor TFT2a via an interconnection 537 formed in the metal layer 535.
• the Current modulating transistors TFT2a and TFT2b may be located between the switch transistor and the storage capacitor Cs.
• the current modulating transistors TFT2a and TFT2b, and the storage capacitor Cs may be located between the polarization line PL and the light emitting diode.

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  • 2004-06-18 FR FR0451293A patent/FR2871939B1/fr not_active Expired - Fee Related
• 2005
  • 2005-06-17 WO PCT/FR2005/050456 patent/WO2006092473A1/fr not_active Application Discontinuation
  • 2005-06-17 US US11/628,768 patent/US20080054784A1/en not_active Abandoned
  • 2005-06-17 JP JP2007516017A patent/JP2008502933A/ja active Pending
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