Classifications

• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
  • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • G11C11/161—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
  • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
  • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • G11C11/165—Auxiliary circuits
  • G11C11/1675—Writing or programming circuits or methods
• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
  • G11C11/5607—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using magnetic storage elements
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10B—ELECTRONIC MEMORY DEVICES
  • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
• • H—ELECTRICITY
  • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
  • H10N50/00—Galvanomagnetic devices
  • H10N50/80—Constructional details

Definitions

• the present invention relates to the field of magnetic memories, and in particular non-volatile random access magnetic memories allowing the storage and the reading of data in electronic systems. More specifically, it relates to magnetic random access memories, called M-RAM (Magnetic Random Access Memory), consisting of a magnetic tunnel junction. The invention also relates to a thermomagnetic writing process within such a memory. .
• M-RAM Magnetic Random Access Memory
• M-RAM magnetic memories have seen a renewed interest with the development of magnetic tunnel junction (MTJ, for "Magnetic Tunnel Junction”) having a strong magneto-resistance at room temperature.
• MTJ Magnetic Tunnel Junction
• These magnetic random access memories have many advantages: - speed (a few nanoseconds of writing and reading time), 0 - non-volatility, absence of fatigue in reading and writing, - insensitivity to ionizing radiation.
• the memory point consisted of an element known as "with giant magneto-resistance", consisting of a stack of several metallic layers alternately magnetic and non-magnetic.
• This type of structure can, for example, be found in documents US-A-4,949,039 and US-A-5,159,513 for the basic structure, and in document US-A-5,343,422 for the creation of a RAM memory from these basic structures.5
• This technology by its architecture, allows the realization of non-volatile memories with a simple technology, but of limited capacity. Indeed, the fact that the memory elements are connected in series along each line limits the possibility of integration, since the signal is increasingly weak when the number of elements increases.
• magnetic tunnel junction MTJ
• These magnetic memories with magnetic tunnel junction have, for example, been described in document US-A-5 640343. In their simplest forms, they are composed of two magnetic layers of different coercivity, separated by a thin insulating layer.
• each memory element (10) consists of the association of a CMOS transistor (12) and a junction MTJ tunnel (11).
• Said tunnel junction (11) comprises at least one magnetic layer (20) called “storage layer”, a thin insulating layer (21) and a magnetic layer (22) called “reference layer”.
• the two magnetic layers are made from 3d metals (Fe, Co, Ni) and their alloys, and the insulating layer is traditionally made of alumina (Al 2 O 3 ).
• the magnetic layer (22) is coupled to an anti-ferromagnetic layer (23), the function of which is to trap the layer (22), so that its magnetization does not tilt, or tilts reversibly under the effect of '' an external magnetic field.
• the reference layer (22) can itself be made up of several layers, as for example described in the document TJS-A-5,583,725, in order to form a synthetic anti-ferromagnetic layer.
• the junction (11) is placed between a switching transistor (12) and a current supply line (14) (Word Line) forming an upper conductive line.
• a switching transistor (12) and a current supply line (14) (Word Line) forming an upper conductive line.
• An electric current passing through it produces a first magnetic field.
• a lower conductive line (15) (Bit Line), generally disposed orthogonal to the line (14) (Word Line) allows, when an electric current flows there, to produce a second magnetic field.
• the transistor (12) In the write mode, the transistor (12) is blocked, and no current therefore flows through the transistor. Current pulses are circulated in the current supply line (14) and in the line (15).
• the junction (11) is therefore subject to two orthogonal magnetic fields. One is applied along the difficult magnetization axis of the storage layer, also called “free layer” (22), in order to reduce its reversal field, while the other is applied along its axis of easy magnetization, in order to provoke the reversal of the magnetization and therefore the writing of the memory point.
• the transistor (12) In the read mode, the transistor (12) is placed in saturated mode, that is to say that the electric current passing through this transistor is maximum, by sending a positive current pulse in the gate of said transistor.
• the electric current sent in the line (14) passes only through the memory point, the transistor of which is placed in saturated mode. This electric current makes it possible to measure the resistance of the junction of this memory point.
• By comparison with a reference memory point it is then known whether the magnetization of the storage layer (22) is parallel or anti-parallel to that of the reference layer (20). The state of the memory point considered (“0” or “1”) can thus be determined.
• the magnetic field pulses generated by the two lines (14, 15) allow, as will be understood, the switching of the magnetization of the storage layer (20) during the writing process.
• These magnetic field pulses are produced by sending short current pulses (typically 2-5 nanoseconds) and low intensity (typically less than 10 milliamps) along the current lines (14, 15).
• the intensity of these pulses and their synchronization are adjusted so that only the magnetization of the memory point located at the intersection of these two current lines (selected point) can switch under the effect of the magnetic field generated by the two conductors.
• the other memory points, located on the same line or on the same column (semi-selected points) are, in fact, only subject to the magnetic field of one of the conductors (14, 15), and consequently do not return.
• the writing being constituted by an external magnetic field, it is subject to the value of the individual reversal field of each memory point. If the function of distribution of the turning fields for all the memory points is large (indeed, it is not uniform due to manufacturing constraints and intrinsic statistical fluctuations), it is necessary that the magnetic field on the memory point selected is greater than the highest reversal field of the distribution, at the risk of accidentally reversing certain memory points located on the row or on the corresponding column, whose reversal field, located in the lower part of the distribution, is weaker than the magnetic field generated by the row or column alone.
• the aspect ratio of the memory point can be reduced by using the intrinsic anisotropy of the material constituting the storage layer (known to those skilled in the art under the name of magnetocrystalline anisotropy) to define the two stable states of the system.
• the temporal or thermal stability of the system is however no longer guaranteed because it is the same physical parameter that governs the writing process and thermal stability: if the magnetocrystalline anisotropy is important, the system is stable (in time and in temperature) and the two states of the memory point are well defined.
• the magnetic field required to reverse the magnetization of said memory point from one stable state to another (the writing field) is important, therefore the power consumed during the writing process is large.
• a current pulse is sent through the memory point during the writing process, by opening the transistor (12), in order to induce a significant heating of said memory point.
• the heating of the memory point produces a lowering of the required magnetic writing field.
• current pulses are sent in the lines (14, 15) to create two orthogonal magnetic fields, allowing the switching of the magnetization of the storage layer of the considered junction.
• This writing thermally assisted, improves writing selection, since only the selected memory point is heated, the other half-selected memory points on the same line or on the same column remaining at room temperature.
• the improvement described in this document aims to increase the selectivity for writing by heating the addressed junction while keeping the basic concept of writing by sending two pulses of orthogonal magnetic fields.
• the objective of the present invention is to further optimize the advantages previously mentioned by lowering the field of reversal of the magnetization of the memory point by the selection of a particular geometry of said memory point, and in particular by implementing a circular geometry. Indeed, it has been possible to show, and this is the heart of the present invention, that within the framework of such a circular geometry of the memory point, the shape anisotropy of the memory point which is responsible for an increase of the magnetization reversal field is zero. Consequently, the electrical power required to write a memory point can be considerably reduced in the thermally assisted writing approach. This result constitutes a decisive advantage, in particular for portable applications and for applications in technology on SOI (Silicon on Insulator).
• the invention relates to a magnetic memory with thermally assisted writing, each memory point of which consists of a magnetic tunnel junction, and the section of which, parallel to the plane of the layers making up the tunnel junction, is circular or substantially circular, said tunnel junction comprising at least: - a magnetic reference layer, called “trapped layer”, whose magnetization is of fixed direction, a magnetic storage layer, called “free layer”, whose magnetization direction is variable, - a layer insulating, interposed between the free layer and the trapped layer, and in which the storage layer is formed of at least one soft magnetic layer, that is to say of reduced magnetic anisotropy, preferably less than 10 Oersted, and typically between 1 and 3 Oersted, and a trapping layer, the two layers being magnetically coupled by contact, and in which the temperature of memory operation in reading or at rest is chosen below the blocking temperature of the free and trapped layers respectively, that is to say the temperature at which the magnetic trapping disappears.
• a magnetic reference layer called "trapped layer”
• free layer whose magnetization direction is
• the soft magnetic layer of the storage layer consists of an alloy based on nickel, cobalt and iron and the trapping layer consists of an alloy based on iron and cobalt, or an anti-ferromagnetic alloy based on manganese, or amorphous alloys based on rare earth and transition metal.
• the reference layer of the trapped layer preferably consists of an artificial anti-ferromagnetic synthetic layer, consisting of two ferro-magnetic layers of alloys based on nickel, cobalt and iron, separated by a non-magnetic layer, so that the magnetizations of the two ferromagnetic layers are anti-parallel.
• the storage and reference layers may further comprise near the interface with the tunnel barrier an additional layer of cobalt or of alloy rich in cobalt and intended to increase the polarization of tunnel electrons and therefore the magnitude of magnetoresistance.
• the memory points are organized in a network, each memory point being connected at its top to a conductive line and at its base, to a selection transistor, the writing being carried out at a memory point considered by the simultaneous sending of electric current pulses in said conductor and a heating current by the opening of said transistor.
• the control transistor and its corresponding control line are placed under the memory point considered.
• FIG. 1 is a schematic representation of the architecture of a magnetic memory of the prior art, the memory points of which consist of a magnetic tunnel junction.
• FIG. 2 also already described, is a schematic representation of the shapes of the memory points of the prior art.
• FIG. 3 is a schematic representation illustrating the state of magnetization of the constituent layers of the memory points, respectively in state "1" and in state "0".
• FIG. 4A is a schematic representation of a memory point according to a first embodiment of the invention, of which FIG. 4B is a schematic view from above.
• FIG. 5A is a schematic representation of a memory point according to a variant of the invention, of which FIG. 5B is a schematic view from above.
• FIG. 5A is a schematic representation of a memory point according to a variant of the invention, of which FIG. 5B is a schematic view from above.
• FIG. 6A is a schematic representation of another variant of a memory point in accordance with the present invention, of which FIG. 6B is a schematic view from above.
• FIG. 3 shows the orientations of the magnetization of the various layers constituting a memory point, in particular of the prior art.
• the storage layer (30) consists of a stack comprising at least one ferro-magnetic layer (32) and an anti-ferromagnetic layer (31). These two layers are deposited so that a magnetic exchange coupling is established between the two layers.
• the stack of the complete memory point also comprises at least one insulating layer (33) and a reference layer (34), advantageously associated with a trapping layer (35).
• This architecture is described under the name of trapped storage layer. The advantages provided by this architecture are multiple: - limit of stability of memory points pushed back, - insensitivity to external magnetic fields, - possibility of carrying out multi-level storage.
• the memory point using a trapped storage layer is no longer elongated, but circular, and more precisely, its cross section parallel to the plane of the constituent layers is circular.
• the memory point has a cylindrical or conical profile, and therefore a symmetry of revolution.
• the memory point can also be of non-circular geometry as long as its aspect ratio remains less than 1.2 (20% difference between the length and the width). In doing so, and as already indicated above, the shape anisotropy of the memory point is minimized, significantly reducing the field of reversal of the magnetization of the memory point during the writing process, and consequently, decreasing the power. electrical required.
• An example of the dependence of the writing field for the different form factors is given in figure 7.
• the storage layer (30) or free layer is formed of a soft material, that is to say of which the inversion field (coercive field) is very small.
• this material is an alloy containing nickel, iron or cobalt, in particular permalloy Ni 8 oFe 2 o, NiFeCo or FeCoB.
• the trapping layers (31) and (35) are made of an anti-ferromagnetic material and in particular of an alloy based on manganese of the PtsoMnso, t 2 oMn8o or NisoMnso type. It is important to specify that the thicknesses, the chemical nature or the microstructure of the trapping layers (31) and (35) differ so that their blocking temperatures (temperature at which the exchange coupling with the adjacent ferromagnetic layer, respectively the storage layer (30) and the reference layer (34)) are well differentiated.
• the blocking temperature of the layer (31) must be lower than that of the layer (35) in order to allow, during writing, to unlock the magnetization of the storage layer (30) to be written, without altering the direction of the magnetization of the reference layer (34) of the same memory point.
• the reference layer (34) is a synthetic structure consisting of a synthetic anti-ferromagnetic layer and two ferromagnetic layers of alloys based on nickel, cobalt and iron, separated by a non-magnetic layer, such so that the magnetizations of the two ferromagnetic layers are coupled with anti-parallel orientations of their magnetizations, in order to minimize the magneto-static field acting on the storage layer (30).
• the storage and reference layers may further comprise near the interface with the tunnel barrier an additional layer of cobalt or of alloy rich in cobalt, and intended to increase the polarization of the tunnel electrons and therefore the amplitude of magnetoresistance.
• the memory point comprises the actual magnetic tunnel junction, of cylindrical shape as already mentioned, an addressing transistor (46) provided with its control line (47) and a conductor (48), making it possible to generate the magnetic field in parallel to the easy axis of the magnetization of the storage layer (41).
• the magnetization of the magnetic layers is substantially in the plane of the layers.
• this structure with a single tunnel barrier could advantageously be replaced by a structure with a double tunnel barrier.
• the storage layer (41) consists of a three-layer antiferromagnetic (for example Ir 2 oMn 8 o) sandwiched between two ferromagnetic layers, simple or complex (for example NisoFe 0 / Co 9 oFe ⁇ o).
• This storage “three-layer” is inserted between two tunnel barriers, on the opposite side of which are located the two reference layers similar to those described in the state of the art.
• the operation of these structures can be described as follows.
• the blocking temperatures of the storage and reference layers must be higher than the operating temperature of the memory excluding heating, and even significantly higher than this operating temperature, as soon as one wishes to store the information in a stable manner.
• the blocking temperature of the storage layer must be lower than that of the reference layer.
• the transistor (46) associated with the memory point (40) is switched to blocked mode by a voltage pulse in the line (47).
• a voltage pulse is applied to the memory point (40) via the line (48), so that an electric current flows through the tunnel junction (40) via the transistor (46).
• the voltage level is defined so that the power density produced at the junction allows the temperature of the tunnel junction (40) to rise to a temperature higher than the temperature blocking the anti-ferromagnetic layer (42), and lower than the blocking temperature of the trapping layer (45). At this temperature, the magnetization of the storage layer (41) is no longer trapped by the layer (42) and can therefore turn over under the effect of a writing magnetic field.
• the current pulse in the excitation conductor (48), which no longer passes through the tunnel junction (40), is maintained with a sign and an amplitude such that the magnetic field produced allows the magnetization to reverse. the storage layer (41) in the desired direction.
• the synchronization and the duration of the pulse must be adjusted so that the magnetization of the storage layer (41) is oriented in the desired direction during the cooling of the memory point (40), up to a point temperature. memory lower than the blocking temperature of the antiferromagnetic layer (42). ⁇ is then possible to cut the current in the line (48).
• the memory point (40) finishes falling back to the operating temperature without writing and the magnetization of the storage layer (41) stops freezing in the desired direction.
• the memory point is then written.
• the thermal stability of the memory is ensured by the shape anisotropy of the memory point, directly related to the aspect ratio between length and width of the memory point.
• the energy of the barrier per unit of volume is then written as:
• E fc * + ⁇ 2
• the first term (K) is the magneto-crystalline anisotropy and the second term is the shape anisotropy.
• the second term now corresponds to the exchange energy between the storage layer (41) and the trapping layer (42).
• the energy of the barrier is adapted by the choice of materials (42) (through the exchange constant J ex ) and (41) (through the thickness t and the magnetization Ms ) to be sufficient to allow thermal and temporal stability
• the current flowing through the memory point causes a rise in temperature up to or above the blocking temperature T B of the layer (42) , so that the storage layer (41) is removed.
• the conductive line used to generate the heating pulse can be distinct from the conductive line used to generate the magnetic field pulse, this in order to optimize the respective current densities for the two operations.
• this additional current line (69), implemented for the generation of the magnetic field pulse, and electrically isolated from the memory point (60) and from the conductor (67), is placed above the memory point (60), so as to allow the superimposition of the control transistor (66) and its control line (67) with the memory point (60), thus preserving the compact memory.
• the current pulses in lines (68) and (69) can be controlled independently, both from the point of view of the amplitude of the current, the duration of the current draw and their synchronization. Furthermore, by using a storage layer trapped by an anti-ferromagnetic layer, this writing technique allows the realization of more than two magnetic states in the memory point (40). For this, it is no longer necessary to have a single conductive line to generate the writing field, but two perpendicular lines as shown in FIG. 5A, the lines (48) and (49). The combination of these two perpendicular fields makes it possible to create any direction of magnetic field in the plane of the sample.
• This principle consists in passing a tunnel current through the junction. If the electrons pass through the tunnel from the reference layer to the storage layer, i.e. if the current flows from the storage layer to the reference layer, the magnetization of the storage layer will s '' orient parallel to the direction of the injected spins, provided that the current is sufficiently intense, which again assumes that the barrier has low electrical resistance. If, on the contrary, the electrons pass by tunnel effect from the storage layer towards the reference layer, the magnetization of the storage layer will be oriented anti-parallel to the magnetization of the reference layer.
• the reading process is identical to that described in the prior art.
• the resistance of the memory point (40) is read by a current of low amplitude controlled by the opening of the control transistor (46).
• the resistance is generally compared to that of a reference cell not shown in FIGS. 4 to 6.
• the reversal field of the storage layer (41) can be extremely weak, since it is no longer defined except by intrinsic properties of said storage layer (41),
• the write selectivity is preserved, since the other memory points located on the same row or the same column not being heated during the writing process, the corresponding storage layers (41) of said memory points not selected remain coupled to the corresponding anti-ferromagnetic layers (42), therefore being insensitive to the applied magnetic field.
• multi-level storage is facilitated since the magnetostatic energy is the same in all directions of space. Consequently, the writing field is identical whatever the direction given to the magnetization with respect to the reference direction.
• the heating can be obtained by an external heating element not shown in FIGS. 4 and 5. This heating element can be a layer of high electrical resistivity situated above or below layers (42 or 45) respectively.
• the reference layer (44) is of the synthetic anti-ferromagnetic type in order to improve the discrimination in writing by reducing the magneto-static field.
• the storage layer of the memory point can consist of one or more ferro-magnetic layers of the amorphous fenimagnetic alloy (AAF) type.
• AAF amorphous fenimagnetic alloy
• the temperature reached during the writing process is no longer a blocking temperature of the antiferromagnetic layer (42), but the Curie temperature of the trapping layer (42) produced in AAF.
• Such layers in AAF are precisely cobalt alloys and rare earth, such as samarium (Sm), terbium (Tb) or, but not limited to, gadolinium (Gd).
• the addressing technique according to the invention allows simultaneous writing of several memory points by selecting the simultaneous heating of several memory points. This approach increases the overall writing speed of the memory.

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  • 2004-02-23 FR FR0401762A patent/FR2866750B1/fr not_active Expired - Lifetime
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