EP1575013B1 - Capteur avec une sortie pour sortir des données par multiplexage - Google Patents

Capteur avec une sortie pour sortir des données par multiplexage Download PDF

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Publication number
EP1575013B1
EP1575013B1 EP04030561A EP04030561A EP1575013B1 EP 1575013 B1 EP1575013 B1 EP 1575013B1 EP 04030561 A EP04030561 A EP 04030561A EP 04030561 A EP04030561 A EP 04030561A EP 1575013 B1 EP1575013 B1 EP 1575013B1
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EP
European Patent Office
Prior art keywords
lsn
msn
sensor
data words
analog
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EP04030561A
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German (de)
English (en)
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EP1575013A3 (fr
EP1575013A2 (fr
Inventor
Hans-Jörg Dipl.-Ing. Fink
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TDK Micronas GmbH
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TDK Micronas GmbH
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    • G—PHYSICS
    • G08—SIGNALLING
    • G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C19/00—Electric signal transmission systems
    • G—PHYSICS
    • G08—SIGNALLING
    • G08C—TRANSMISSION SYSTEMS FOR MEASURED VALUES, CONTROL OR SIMILAR SIGNALS
    • G08C15/00—Arrangements characterised by the use of multiplexing for the transmission of a plurality of signals over a common path

Definitions

  • Sensors are usually located at the location of the size to be determined. Either this already requires the measuring principle or serves to keep measuring errors and uncertainties as small as possible.
  • the measured variables such as temperature, magnetic field, pressure, force, flow, level, etc. are converted in the sensor into physical signals, which are then fed to the receiving device.
  • a conversion into electrical signals takes place in the sensor, which can be easily generated, transmitted and received, in particular if a processor is provided as the receiver, which has corresponding interfaces.
  • the signals to be transmitted can be analog or digital signals. Digital signals have the advantage over analog signals that they can be disturbed less on the transmission, but this must be paid for by an increased effort on the transmitter and receiver side as well as on the transmission link. On the other hand, digital signals often fit better into the signal environment of the connected processors, because their signal processing also takes place essentially in digital form.
  • the data is expediently transmitted serially.
  • the transmission takes place here as a continuous data stream or by means of time-separated data packets.
  • the individual bits of the data are coded and transmitted by means of two easily distinguishable logical states.
  • a disadvantage of the serial data transmission is the time required for the transmission with longer data words because the transmission rate is relatively slow. Long signal lines can wipe the pulse edges, which requires a significantly reduced data rate compared to the processor clock for reliable detection. In As a rule, during this time, at least the associated data input of the receiver is blocked for other data, in the worse case, the blocking extends to other parts of the processor, which then, for example, does not allow interruption.
  • the document WO 03/002950 discloses a system for transmitting signals from sensors to a receiver consisting of an anolog / digital converter, a digital signal conditioning module, a period conversion module, and an endstop with two power drivers.
  • the period conversion module hides the N most significant bits of the digital value.
  • the solution of the task is based on the recognition that not all data are simultaneously converted for transmission into an analog signal, a pseudo signal, but only in sections.
  • the resulting analog signals are then multiplexed in succession.
  • the bits determined from the transmitted pseudo signals are correctly combined, so that the complete data word is available again for further processing.
  • the number of multiplex sections and the number of data transmitted in each multiplex section depends on the respective characteristics of the participating functional units and the expected interference. If the disturbance is small, then it allows more discretely distinguishable states than when the disturbance is high. In the limiting case, the interference is so high that a multiplex transmission is no longer possible, but each bit must be transmitted individually, but this is again purely sequential operation.
  • the multiplexed data packets must be reassembled correctly on the receiver side. It must therefore be given a secure assignment to which of the various data packets are each. There are a lot of possibilities for this.
  • a very simple solution is the marking by short pauses between the associated multiplex sections of a single data word and long pauses, which are used to distinguish different data words. The order of the associated data packets is fixed.
  • a major advantage of the described multiplex transmission is that even high-resolution sensor signals can be detected by the analog-to-digital converters with a lower bit resolution in the processors. If a 14-digit data word is split into two 7-bit sections, then a 10-bit analog-to-digital converter in the processor will be able to resolve that signal and determine the associated 7-bit.
  • the first 7 bits, which are assigned to the higher or lower digits of the data word, are then stored in a first register.
  • the 7 bits of the lower or higher-order digits of the data word are determined and stored in the correct position in a second register or in vacant positions of the first register.
  • the transfer of a 14-digit data word is performed in two steps. Further processing then takes place in the processor as a 14-digit data word.
  • the detection of the exact throttle position in an internal combustion engine is called, which is required for the setting of a quiet idle.
  • the example shows that typically two-step transmission is sufficient, which simplifies the procedures for identifying the two sections. For example, one can split the available voltage range between 0.25V and 4.75V into two parts of 0.25V to 2.25V and 2.75V to 4.75V. In one area, the higher-order digits are transmitted and in the other range the lower-valued digits are transmitted. The interference immunity is halved in this case, but still has a gain of about 15 compared to the above example with the transmission of a 10-bit signal.
  • the definition of the particular data area or its request can also be made by the controller itself, by switching a load resistance of the transmission line via one of its I / O gates to the VSS or VDD potential. This switching is detected via the changed current direction in a corresponding evaluation circuit in the sensor output and triggers the transmission of the desired data section.
  • Another way to define the data packets and, where appropriate, to trigger them can be done via signals on the supply line VDD or another connection of the sensor.
  • DE 198 19 265 C1 it is described how command signals from an external controller are fed to a sensor via the supply voltage connection VDD.
  • a relatively high VDD voltage value triggers the transmission of the higher order data
  • a relatively low VDD voltage value triggers the transmission of the lower order data or vice versa.
  • the data in the higher-order range does not change, but only the data in the low-order range.
  • Fig. 1 In the manner of a table, the 14-bit or 14-bit output signal of a sensor is displayed.
  • the 0 to 13 bit digit bit area defining a binary number corresponds to 16384 distinguishable signal ranges.
  • the sensor signal value is the decimal number Dec. 5241 is assumed, the associated binary value is specified under "value”. If this binary number is split into two 7-bit areas, the new binary values MSN and LSN given under the right-hand column "value" result.
  • MSN stands for "most significant nibble”
  • LSN stands for "least significant nibble”. Expressed in decimal numbers, MSN is 40 and LSN is 121.
  • these subsections MSN and LSN are also referred to as short data words. In the lower right corner, a formula is used to show that both short data words add together again to the original decimal value Dec. 5241, provided that the decimal MSB value 40 is previously increased with the weighting factor 128 over the LSN value.
  • the decimal value 5241 is mapped to the output voltage Vout going from 0V to 5V, with the full swing equal to the decimal value 16384.
  • the decimal value 5241 results in a voltage value of 1,600 V.
  • Fig. 4 schematically shows the analog output signal Vout for a sensor for recording angle values.
  • the angles ⁇ passing through from -60 ° to + 60 ° are linearly assigned the voltage values from 0 V to 5 V.
  • Fig. 5 shows in the timing diagram the successive transmission of Kurz briefly words LSN and MSN of Fig. 1 as different voltage levels Vout of 4.727 V and 1.563 V.
  • a short transition of about 0.2 ms signals the change from LSN to MSN.
  • the change is triggered in the embodiment in that it is detected in the sensor output, that the current flow direction has reversed on the transmission line, which is effected for example by switching the load resistance RL of VSS or GND to VDD.
  • a sensor 1 is connected with its signal output 2 to a transmission path 3, which has a load resistance RL of, for example, 10 kOhm.
  • the remote from the transmission line 3 end of the load resistor is connected to an I / O input of a receiver 4, such as a controller, which can selectively switch its output potential between VSS and VDD and thus in the sensor 1, the delivery of the respective short data word as an analog pseudo signal controls.
  • a receiver 4 such as a controller
  • FIG. 7 another realization of the external triggering of the short data words is shown schematically.
  • the control is now via the supply voltage VDD, which is modulated by the controller 4 in a suitable manner via the I / O connection. Whether an overvoltage and undervoltage +/- ⁇ U is used or different overvoltages depends only on the detection circuit in the sensor.
  • the load resistor RL is in this case connected to a fixed potential, eg VDD.
  • Fig. 8 schematically shows a block diagram of the functional units of an embodiment for a sensor 1.
  • the actual sensor element 6 delivers its analog measurement signal to an analog-to-digital converter 7.
  • the subsequent processing is done digitally in the circuit block 8. If this parameter or program instructions needed, then these are from a Memory 9 fetched. There also intermediate results etc. can be stored.
  • the result of the processing is the digital output signal of the block 8, a multi-digit data word, which is ultimately to be transmitted to a receiver, not shown.
  • This data word is split in the circuit block 10 into two short data words MSN and LSN, which are buffered in the registers 11, 12.
  • the content of the two registers is switched by a control device 14 at the correct time to a digital-to-analog converter 15 which converts the short data words MSN and LSN respectively into an analog pseudo signal, which is supplied via an amplifier 16 to an output terminal of the sensor 1 becomes.
  • the required supply lines and control lines and clocks are not shown for the sake of clarity. Whether the individual functional units are realized wholly or partly by means of an adapted circuit or by means of a program is within the scope of the invention.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Time-Division Multiplex Systems (AREA)

Claims (11)

  1. Procédé de transmission de données d'un capteur (1) vers un récepteur (4), caractérisé en ce que
    - chaque mot original de donnée dans un espace d'adressage mesuré est divisé en au moins deux mots de données brefs séparés (MSN, LSN) de sorte que le nombre d'adresses correspondantes est inférieur à celui du mot original de données,
    - les mots de données brefs séparés (MSN, LSN) sont convertis au moyen d'un convertisseur numérique-analogique (15) en un pseudo signal analogique,
    - un signal d'entrée est produit sur une entrée de signal du récepteur (4) par multiplexage temporel des pseudos signaux analogiques sur une sortie du capteur (1) et une liaison de transmission (3),
    - l'entrée de signal est couplée à un convertisseur analogique-numérique (5) qui convertit les pseudo-signaux analogiques en mots de données brefs (MSN, LSN) du côté du récepteur de sorte que le nombre des adresses correspond aux nombres des adresses des mots de données brefs (MSN, LSN) sur le capteur (1), et
    - les adresses correspondantes des mots de données brefs (MSN, LSN) sont réunies à nouveau à l'adresse correcte d'un mot de données du côté du récepteur qui correspond au mot original de données.
  2. Procédé selon la revendication 1, caractérisé en ce que la transmission des mots de données brefs (MSN, LSN) est réalisée au moyen d'un multiplexage modifié si les données du mot de données bref de poids fort (MSN) ne change pas entre deux mots de données successifs.
  3. Procédé selon la revendication 2, caractérisé en ce que lors du multiplexage modifié seuls les mots de données bref de poids faible (LSN) sont transmis.
  4. Procédé selon l'une quelconque des revendications 1 à 3, caractérisé en ce que la différence entre les mots de données brefs (MSN, LSN) corrects ou non est réalisée par des pauses de durées différentes.
  5. Procédé selon l'une quelconque des revendications 1 à 4, caractérisé en ce que les mots de données brefs (MSN, LSN) à différencier sont adaptés à la dynamique de la sortie du capteur.
  6. Procédé selon l'une quelconque des revendications 1 à 4, caractérisé en ce que les mots de données brefs (MSN, LSN) à différencier sont adaptés à des sens séparés du courant de sortie du capteur.
  7. Procédé selon la revendication 6, caractérisé en ce que les sens différents du courant sont produits au moyen d'une résistance de charge (RL) commutable sur la liaison de transmission (3) selon que l'extrémité distante de la liaison de transmission est commutée sur une haute ou une basse tension (VDD, VSS).
  8. Procédé selon la revendication 7, caractérisé en ce que la commutation de la résistance de charge (RL) est exécutée au moyen d'un port d'entrée-sortie du récepteur (I/O).
  9. Procédé selon l'une quelconque des revendications 1 à 4, caractérisé en ce que les mots de données brefs définis par un signal de commande du récepteur (4) sont adressables.
  10. Procédé selon la revendication 9, caractérisé en ce que le signal de commande du capteur (1) est produit sur une sortie séparée ou sur la connexion d'alimentation (VDD) .
  11. Capteur (1) avec une sortie de données pour la transmission de mots de données formées sur un signal du capteur vers un récepteur (4), caractérisé en ce que
    - le capteur (1) comporte des dispositifs (10, 11, 12) pour diviser chaque mot de données original à adressage mesuré en au moins deux mots de données brefs (MSN, LSN) avec un nombre d'adresses réduit par rapport à celui des adresses du mot de données original ;
    - il comporte un dispositif de multiplexage (13) qui est piloté par un dispositif de commande (14) et qui est connecté aux dispositifs (10, 11, 12) afin de séparer les pseudo signaux analogiques ;
    - il comporte un convertisseur numérique-analogique (15) sur le chemin de signal après le multiplexeur (13) afin de réunir les mots de données brefs séparés (MSN, LSN) en un pseudo signal analogique, et
    - un amplificateur (15) entre le multiplexeur (13) et la sortie du capteur (1) qui fournit la puissance nécessaire pour la transmission.
EP04030561A 2004-02-13 2004-12-23 Capteur avec une sortie pour sortir des données par multiplexage Active EP1575013B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102004007486 2004-02-12
DE102004007486A DE102004007486A1 (de) 2004-02-13 2004-02-13 Sensor mit Multiplex-Datenausgang

Publications (3)

Publication Number Publication Date
EP1575013A2 EP1575013A2 (fr) 2005-09-14
EP1575013A3 EP1575013A3 (fr) 2007-10-31
EP1575013B1 true EP1575013B1 (fr) 2010-02-24

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US (1) US7319418B2 (fr)
EP (1) EP1575013B1 (fr)
JP (1) JP4745679B2 (fr)
KR (1) KR101089486B1 (fr)
DE (2) DE102004007486A1 (fr)

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Also Published As

Publication number Publication date
JP4745679B2 (ja) 2011-08-10
US7319418B2 (en) 2008-01-15
KR101089486B1 (ko) 2011-12-02
EP1575013A3 (fr) 2007-10-31
KR20060041930A (ko) 2006-05-12
DE102004007486A1 (de) 2005-10-27
JP2005228336A (ja) 2005-08-25
EP1575013A2 (fr) 2005-09-14
DE502004010803D1 (de) 2010-04-08
US20050243184A1 (en) 2005-11-03

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