Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04B—TRANSMISSION
  • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
  • H04B1/06—Receivers
  • H04B1/16—Circuits
  • H04B1/30—Circuits for homodyne or synchrodyne receivers
• • H—ELECTRICITY
  • H03—ELECTRONIC CIRCUITRY
  • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
  • H03L7/00—Automatic control of frequency or phase; Synchronisation
  • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
  • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
  • H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
  • H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers

Definitions

• Radiofrequency device of the zero or quasi-zero intermediate frequency type minimizing the parasitic frequency modulation applied to an integrated local oscillator.
• the invention relates to frequency synthesis and more particularly that implemented in radio frequency devices, receivers or transmitters, of the zero or almost zero intermediate frequency type.
• the invention advantageously applies, but is not limited to, wireless communication systems, and more particularly to cellular mobile telephones.
• a terminal of a wireless communication system such as for example a cellular mobile telephone
• direct conversion, or transposition at zero intermediate frequency is an alternative to a superheterodyne architecture, and is particularly well suited to allow very architectural solutions. strongly integrated for this terminal.
• a direct conversion receiver or a receiver with zero intermediate frequency (zero-IF receiver) converts the useful signal band directly around the zero frequency (baseband) instead of converting it to an intermediate frequency of the order a few hundred MHz.
• a direct conversion transmitter converts the base band of the wanted signal directly around the radio frequency carrier frequency.
• zero-IF radio frequency devices present a difficulty in differentiating the useful signal if continuous spurious signals are present at the input. Also, in certain cases, it is then preferable to use radiofrequency devices with quasi-zero intermediate frequency (low IF), that is to say of which the intermediate frequency is not strictly zero, but low and in practice less than a MHz.
• low IF quasi-zero intermediate frequency
• a frequency local oscillator, or transposition frequency close to the radiofrequency frequency for either carrying out a frequency transposition towards the radiofrequency domain of the signal to be transmitted (in the case of a transmitter), or carrying out a frequency transposition downwards , of the received signal (in the case of a receiver).
• a frequency synthesizer is generally used working at a frequency multiple of the transposition frequency. And, the transposition signal is then generated at the output of a “suitable frequency” divider.
• the frequency synthesizer is generally obtained with a voltage controlled oscillator (VCO) and a phase locked loop (PLL: “Phase Locked Loop”).
• spurious signals due to imperfections in the transmission or reception chain, spurious signals (harmonics or products of mixing useful signals) will exist and will be injected through spurious paths (magnetic coupling, capacitive coupling, .. .) in the voltage controlled oscillator. This then results in a parasitic frequency modulation applied to the voltage controlled oscillator.
• This mechanism is known to those skilled in the art under the Anglo-Saxon name of NCO PULLI ⁇ G.
• the output of the charge pump of the phase locked loop is a sine wave having the frequency ⁇ f. If ⁇ f is greater than the cutoff frequency of the phase locked loop, the voltage control of the oscillator will not be affected. On the other hand, if ⁇ f is small, that is to say less than the cut-off frequency of the phase locked loop, the voltage control of the oscillator will act to reduce the amplitude of the modulation of the oscillator.
• the phase locked loop will correct the disturbance.
• the disturbance will be low, due to the 1 / ⁇ f effect.
• the disturbance will be high. Also, a natural solution would be to make a phase locked loop having a high cutoff frequency.
• the reference frequency provides the spacing between the channels.
• the reference frequency is in practice equal to 400 kHz for an oscillator delivering a frequency of 3.6 GHz.
• the division performed in the loop is not an integer division, one can then choose a higher reference frequency. However, the use of a fractional divider is detrimental to the noise level.
• a loop cutoff frequency of the order of 40 to 50 kHz is chosen at most, which is largely insufficient to avoid the parasitic modulation problems mentioned above.
• the invention aims to provide a more satisfactory solution to the problems of parasitic frequency modulation applied to the oscillator, and more particularly when this oscillator and the mixer are integrated on the same chip.
• the invention therefore proposes a radiofrequency device of the zero or quasi-zero intermediate frequency type, intended to receive or transmit a radiofrequency signal whose reception or emission frequency belongs to a frequency range subdivided into frequency channels.
• the radiofrequency device which can therefore be a radiofrequency receiver or a radiofrequency transmitter, comprises on the same electronic chip of the frequency transposition means connected to a local so-called main oscillator.
• the main oscillator is incorporated within a main phase-locked loop whose reference frequency is supplied by an auxiliary voltage-controlled oscillator, itself incorporated in an auxiliary phase-locked loop whose frequency reference is less than the frequency of the auxiliary oscillator.
• the reference frequency of the main loop that is to say the frequency of the auxiliary oscillator, is lower than the output frequency of the main oscillator. It is also greater than ten times the frequency spacing of the channels reduced to the output frequency of the main oscillator. In addition, this reference frequency of the main loop is distant from an integer multiple of the reception or emission frequency of at least the cutoff frequency of the main loop.
• the invention provides a phase-locked dual loop frequency synthesizer.
• a first oscillator in this case the auxiliary oscillator, makes it possible to obtain all the characteristics desired for the transposition signal (channel selection, stability, phase noise, etc.).
• This oscillator is controlled by the auxiliary loop.
• this auxiliary oscillator oscillates at a frequency which does not correspond to any harmonic or product of mixture of useful signals, it will not be disturbed.
• a second oscillator in this case the main oscillator, oscillating for example at twice the transposition frequency, will be controlled by the main loop taking as a reference the output frequency of the auxiliary oscillator.
• the loop filter can have a relatively wide bandwidth, of the order of a few tens of MHz, with the following advantages:
• the reference frequency of the auxiliary loop is less than or equal, preferably equal, to the frequency spacing of the channels reduced to the reference frequency of the main loop. Furthermore, according to one embodiment of the invention, the reference frequency of the main loop is greater than one twentieth of the output frequency of the main oscillator.
• the frequency range to which the transmission or reception frequency belongs is around 900 MHz or 1800 MHz
• the reference frequency of the main loop can be taken equal to 450 MHz, while the reference frequency of the auxiliary loop can be equal to 50 kHz.
• the output frequency of the main oscillator can then be equal to 3.6 GHz.
• the electronic chip which already includes the frequency transposition means as well as the main local oscillator, can also include the two phase locked loops.
• the device can be entirely produced on the electronic chip.
• the invention also provides a component of a wireless communication system, for example a cellular mobile telephone, incorporating a radiofrequency device, as defined above.
• FIG. 1 schematically illustrates a cellular mobile telephone incorporating in its transmission chain a frequency synthesizer according to the invention
• - Figure 2 schematically illustrates a cellular mobile telephone incorporating in its reception chain a frequency synthesizer according to the invention
• FIG. 3 illustrates in more detail, but still schematically, an embodiment of a synthesizer according to the invention.
• the reference TP designates a cellular mobile telephone intended in this example to operate according to the DCS standard. It is recalled here that in the DCS standard, the frequency of emission of the radiofrequency signal or the frequency of reception, belongs to a frequency range between 1808 MHz and 1880 MHz, this frequency range being subdivided into frequency channels spaced by 200 kHz .
• a voltage controlled oscillator which will hereinafter be referred to as "main oscillator”, has the reference
• NCOP and delivers an SSP output signal at an output frequency here equal to 3.6 GHz.
• This main oscillator NCOP is followed by a frequency divider by two, referenced DV, delivering a transposition signal ST at the frequency of 1.8 GHz.
• a complex mixer MX (that is to say processing the two channels I and Q in phase quadrature) receives, on the one hand, the transposition signal ST and, on the other hand, a useful signal in baseband SUBB issued by the PBB baseband processor of the TP telephone.
• the signal is modulated around the frequency of 1.8 MHz and is then transmitted by the A ⁇ T antenna of the telephone after passing through a PPA preamplification stage followed by a PA power amplification stage.
• the signal received by the antenna A ⁇ T is amplified in a low noise amplifier L ⁇ A .
• the signal is then transposed into baseband in the mixer MX using the frequency transposition signal ST, also from an NCOP oscillator.
• the useful signal in baseband SUBB is then delivered after amplification and analog digital conversion to the processor in baseband PBB of the telephone TP.
• the architecture described here for the transmission or reception chain of the TP telephone is an architecture known as "zero IF", that is to say at zero intermediate frequency.
• the invention also applies to radio frequency receivers or radio frequency transmitters of the quasi-zero intermediate frequency type, that is to say for example less than 1 MHz.
• the frequency transposition stage (or mixer) and the main NCOP oscillator are located on the same PC electronic chip. Due to imperfections in the transmission or reception chain, spurious signals (frequency harmonics or mixing products of useful signals) will appear and will be injected through spurious paths into the main oscillator with consequent frequency modulation parasite applied to this main oscillator, and known to those skilled in the art under the Anglo-Saxon name of "VCO PULLI ⁇ G".
• the invention aims to provide a solution to this problem, which is particularly critical when the main oscillator NCOP and the mixer MX are located on the same PC chip. Also, the invention proposes a frequency synthesizer with two phase locked loops PLL1 and PLL2, as shown in FIG. 3.
• the main NCOP oscillator is incorporated within a so-called "main" phase locked loop, and referenced PLL2.
• This phase locked loop comprises, in a conventional manner, an edge detector PFD2 followed by a charge pump CP2 and a loop filter FB2.
• the loop filter output controls the VCOP oscillator in voltage.
• the VCOP oscillator output provides the SSP signal, and the output signal is otherwise divided by an integer k2 in an integer divider DN2 before being compared to an SRFP reference signal in the edge detector PFD2.
• the reference signal SRFP is delivered by a voltage controlled oscillator NCOA, itself incorporated in an auxiliary phase locked loop referenced PLL1.
• NCOA voltage controlled oscillator
• the architecture of this PLL1 loop is similar to that of the PLL2 loop, except that the entire division is performed this time within a divider DV1 using an integer kl.
• the reference signal SRFA of the loop PLL1 is delivered by an external generator, for example a quartz.
• the frequency of the SRFP signal must be high to have a sufficiently wide bandwidth of the PLL2 loop, typically greater than 1 MHz, and this so that the PLL2 loop greatly reduces the effect of PULLI ⁇ G at which the VCOP oscillator is subject.
• the frequency of the SRFP signal must be located in an unpolluted area, that is to say distant from an integer multiple of the reception or transmission frequency, at least the cutoff frequency of the main loop.
• the frequency spacing of the channels being 200 kHz for a reception transmit frequency around 1.8 GHz (corresponding to a frequency spacing of 400 kHz for a SSP signal frequency equal to 3.6 GHz, or at a spacing of
• the reference frequency of the auxiliary loop is equal to the frequency spacing of the channels, reduced to the reference frequency of the main loop.
• the VCOA oscillator oscillates at a frequency which is situated in an unpolluted zone, that is to say which does not correspond to any harmonic or product of mixture of useful signals, it will not be disturbed.
• the main NCOP oscillator is subject to PULLI ⁇ G.
• the effect will be greatly reduced by the loop gain of the PLL2 loop.

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• Engineering & Computer Science (AREA)
• Computer Networks & Wireless Communication (AREA)
• Signal Processing (AREA)
• Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
• Transmitters (AREA)
• Transceivers (AREA)

Applications Claiming Priority (3)

Publications (1)

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• 2002
  • 2002-10-14 FR FR0212743A patent/FR2845840B1/fr not_active Expired - Fee Related
• 2003
  • 2003-10-08 EP EP03808753A patent/EP1561280A2/de not_active Withdrawn
  • 2003-10-08 WO PCT/FR2003/002956 patent/WO2004036750A2/fr not_active Application Discontinuation
  • 2003-10-08 US US10/531,501 patent/US20060217077A1/en not_active Abandoned

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