EP1501125A3 - Leistungshalbleitermodul mit skalierbarer Aufbautechnik - Google Patents

Leistungshalbleitermodul mit skalierbarer Aufbautechnik Download PDF

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Publication number
EP1501125A3
EP1501125A3 EP04014432A EP04014432A EP1501125A3 EP 1501125 A3 EP1501125 A3 EP 1501125A3 EP 04014432 A EP04014432 A EP 04014432A EP 04014432 A EP04014432 A EP 04014432A EP 1501125 A3 EP1501125 A3 EP 1501125A3
Authority
EP
European Patent Office
Prior art keywords
substrates
power semiconductor
semiconductor module
base plate
housing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP04014432A
Other languages
English (en)
French (fr)
Other versions
EP1501125A2 (de
Inventor
Yvonne Manz
Jürgen Steger
Thomas Dr. Stockmeier
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semikron Elektronik GmbH and Co KG
Original Assignee
Semikron GmbH and Co KG
Semikron Elektronik GmbH and Co KG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semikron GmbH and Co KG, Semikron Elektronik GmbH and Co KG filed Critical Semikron GmbH and Co KG
Publication of EP1501125A2 publication Critical patent/EP1501125A2/de
Publication of EP1501125A3 publication Critical patent/EP1501125A3/de
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/0601—Structure
    • H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Combinations Of Printed Boards (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

Die Erfindung beschreibt ein Leistungshalbleitermodul (10) in skalierbarer Aufbautechnik mit einer Grundplatte (20) oder zur direkten Montage auf einem Kühlkörper bestehend aus einem rahmenartigen Gehäuse (30), einem Deckel, nach außen führenden Anschlusselementen für Lastkontakte (40,42,44) und Hilfskontakte und mit mindestens zwei innerhalb des Gehäuses (30) angeordneten elektrisch isolierenden Substraten (50). Die Substrate bestehen aus je einem Isolierstoffkörper (52) und einer auf dessen der Grundplatte (20) oder dem Kühlkörper abgewandten ersten Hauptfläche befindlichen Mehrzahl von gegeneinander elektrisch isolierten metallischen Verbindungsbahnen (54), sowie darauf befindlichen und mit diesen Verbindungsbahnen schaltungsgerecht verbundenen Leistungshalbleiterbauelementen (56). Alle Substrate (50) sind vollständig identisch ausgestaltet. Alle Substrate (50) sind miteinander elektrisch leitend verbunden und auf allen Substraten (50) ist die gleiche Art und Anzahl von Leistungshalbleiterbauelementen (56) angeordnet.
EP04014432A 2003-07-23 2004-06-19 Leistungshalbleitermodul mit skalierbarer Aufbautechnik Withdrawn EP1501125A3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10333328 2003-07-23
DE10333328A DE10333328B3 (de) 2003-07-23 2003-07-23 Leistungshalbleitermodul in skalierbarer Aufbautechnik

Publications (2)

Publication Number Publication Date
EP1501125A2 EP1501125A2 (de) 2005-01-26
EP1501125A3 true EP1501125A3 (de) 2006-12-06

Family

ID=33483016

Family Applications (1)

Application Number Title Priority Date Filing Date
EP04014432A Withdrawn EP1501125A3 (de) 2003-07-23 2004-06-19 Leistungshalbleitermodul mit skalierbarer Aufbautechnik

Country Status (4)

Country Link
US (1) US7164201B2 (de)
EP (1) EP1501125A3 (de)
JP (1) JP2005045237A (de)
DE (1) DE10333328B3 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8279640B2 (en) 2008-09-24 2012-10-02 Teco-Westinghouse Motor Company Modular multi-pulse transformer rectifier for use in symmetric multi-level power converter
US7830681B2 (en) 2008-09-24 2010-11-09 Teco-Westinghouse Motor Company Modular multi-pulse transformer rectifier for use in asymmetric multi-level power converter
JP2010129867A (ja) * 2008-11-28 2010-06-10 Mitsubishi Electric Corp 電力用半導体装置
US7940537B2 (en) 2008-12-31 2011-05-10 Teco-Westinghouse Motor Company Partial regeneration in a multi-level power inverter
US8223515B2 (en) * 2009-02-26 2012-07-17 TECO—Westinghouse Motor Company Pre-charging an inverter using an auxiliary winding
US8130501B2 (en) 2009-06-30 2012-03-06 Teco-Westinghouse Motor Company Pluggable power cell for an inverter
US8575479B2 (en) 2009-06-30 2013-11-05 TECO—Westinghouse Motor Company Providing a transformer for an inverter
US8254076B2 (en) 2009-06-30 2012-08-28 Teco-Westinghouse Motor Company Providing modular power conversion
US8711530B2 (en) * 2009-06-30 2014-04-29 Teco-Westinghouse Motor Company Pluggable power cell for an inverter
US8976526B2 (en) 2009-06-30 2015-03-10 Teco-Westinghouse Motor Company Providing a cooling system for a medium voltage drive system
US8601190B2 (en) 2011-06-24 2013-12-03 Teco-Westinghouse Motor Company Providing multiple communication protocols for a control system having a master controller and a slave controller
US9363930B2 (en) 2013-03-11 2016-06-07 Teco-Westinghouse Motor Company Passive two phase cooling solution for low, medium and high voltage drive systems
US9153374B2 (en) 2013-06-28 2015-10-06 Teco-Westinghouse Motor Company Cooling arrangements for drive systems
US12066780B2 (en) 2022-05-23 2024-08-20 Ricoh Company, Ltd. Fixing device including nip formation plate having a plurality of protruding portions and image forming apparatus incorporating same

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459356A (en) * 1992-08-26 1995-10-17 Eupec Europeische Gesellsch F. Leistungshalbleiter Mbh & Co., Kg. Power semiconductor module having a plurality of semiconductor arrangements
DE19630902A1 (de) * 1996-08-01 1998-02-05 Ixys Semiconductor Gmbh Einrichtung zur Temperaturüberwachung in einer leistungselektronischen Anordnung
WO2002054489A2 (en) * 2000-12-29 2002-07-11 Advanced Micro Devices, Inc. Temperature measurement system and method

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3269745B2 (ja) * 1995-01-17 2002-04-02 株式会社日立製作所 モジュール型半導体装置
JPH1197598A (ja) * 1997-09-19 1999-04-09 Toshiba Corp 半導体装置
DE10024516B4 (de) * 2000-05-18 2006-03-09 eupec Europäische Gesellschaft für Leistungshalbleiter mbH & Co. KG Leistungshalbleitermodul
JP4089143B2 (ja) * 2000-08-30 2008-05-28 三菱電機株式会社 電力用半導体装置
JP4127641B2 (ja) * 2001-10-23 2008-07-30 三菱電機株式会社 半導体装置
DE10316355C5 (de) * 2003-04-10 2008-03-06 Semikron Elektronik Gmbh & Co. Kg Leistungshalbeitermodul mit flexibler äusserer Anschlussbelegung

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5459356A (en) * 1992-08-26 1995-10-17 Eupec Europeische Gesellsch F. Leistungshalbleiter Mbh & Co., Kg. Power semiconductor module having a plurality of semiconductor arrangements
DE19630902A1 (de) * 1996-08-01 1998-02-05 Ixys Semiconductor Gmbh Einrichtung zur Temperaturüberwachung in einer leistungselektronischen Anordnung
WO2002054489A2 (en) * 2000-12-29 2002-07-11 Advanced Micro Devices, Inc. Temperature measurement system and method

Also Published As

Publication number Publication date
EP1501125A2 (de) 2005-01-26
DE10333328B3 (de) 2005-01-27
US7164201B2 (en) 2007-01-16
JP2005045237A (ja) 2005-02-17
US20050035439A1 (en) 2005-02-17

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