EP1390973A1 - Procede se rapportant a une diode a barriere de schottky, diode et utilisation correspondantes - Google Patents

Procede se rapportant a une diode a barriere de schottky, diode et utilisation correspondantes

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Publication number
EP1390973A1
EP1390973A1 EP02736346A EP02736346A EP1390973A1 EP 1390973 A1 EP1390973 A1 EP 1390973A1 EP 02736346 A EP02736346 A EP 02736346A EP 02736346 A EP02736346 A EP 02736346A EP 1390973 A1 EP1390973 A1 EP 1390973A1
Authority
EP
European Patent Office
Prior art keywords
diode
drift layer
grid portion
resistance
doping concentration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
EP02736346A
Other languages
German (de)
English (en)
Inventor
Fanny Dahlqvist
Heinz Lendenmann
Willy Hermansson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Wolfspeed Inc
Original Assignee
ABB Research Ltd Switzerland
ABB Research Ltd Sweden
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ABB Research Ltd Switzerland, ABB Research Ltd Sweden filed Critical ABB Research Ltd Switzerland
Publication of EP1390973A1 publication Critical patent/EP1390973A1/fr
Ceased legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66053Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/6606Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide

Definitions

  • the present invention relates to a method for controlling the temperature dependence of a junction barrier Schottky diode of a semiconductor material having an energy gap between the valence band and the conduction band exceeding 2 eV. No such method is known today, and the formulation of the goal to obtain such a method constitutes a part of the present invention.
  • junction barrier Schottky diode is already known through US patent 6 104 043. That diode is made of SiC, which belongs to the wide band gap materials to which the present invention is directed.
  • the present invention is directed to junction barrier Schottky diodes of all materials having a said energy gap exceeding 2 eV, such as SiC, diamond, AIN etc, but it is particularly directed to such diodes of SiC, so that the present inven- tion will hereinafter be discussed for that material so as to illuminate, but not in any way restrict, the invention and the problems to be solved thereby.
  • SiC has some excellent physical properties, among which a high breakdown field being approximately ten times higher than for Si may be mentioned. These properties make SiC well suited as a material for power devices operating under conditions where high voltages may occur in the blocking state of the device. Due to the large band gap of SiC a Schottky diode made of this ma- terial has particular advantages with respect to on-state losses compared to a pin-diode made of SiC, since the forward voltage drop of a pn-junction is very large for SiC as compared to for example Si. This is valid for blocking voltages below a predetermined level, above which pin-diodes of SiC have a lower on- state voltage.
  • a pn- junction-behaviour will result in the blocking state of the device thanks to the pinching off of the Schottky region resulting in low leakage currents. Furthermore, such a diode and systems made with these diodes of SiC will have very low switching losses at higher frequencies thanks to the low reverse recovery charge of SiC in comparison to Si and that a Schottky diode has no minority charge carriers which have to recombine as in a pin-diode.
  • the diode has a positive temperature coefficient, i.e. the on-state voltage thereacross increases with the temperature, since the current through the diode may otherwise run away and destroy the diode and possibly other equipment associated therewith. This is in particular the case when connecting a number of such diodes in parallel.
  • diodes of wide band gap materials, such as SiC require a much thinner drift layer due to the high dielectric strength of SiC, so that the contribution of the resistive voltage drop of the drift layer to the total on-state voltage will be relatively smaller than for a device of Si.
  • the object of the present invention is to find a solution to the problems mentioned above.
  • junction barrier Schottky diode results in totally new possibilities to control the temperature dependence of a Schottky diode without influencing the switching losses or even the static losses thereof considera- bly.
  • the present invention provides a method of the type defined in the introduction, in which the following steps are carried out when producing the diode:
  • a substrate layer being highly doped according to a first conductivity type, n or p, and a drift layer being low doped according to said first conduc- tivity type,
  • step 2) is carried out for adjusting the on-state resistance of the grid portion of the diode for obtaining a temperature dependence of the operation of the diode adapted to the intended use thereof.
  • the invention resides in the understanding that it is possible to control the temperature dependence of a junction barrier Schottky diode by adjusting the on-state resistance of the grid portion of the diode when producing the diode. It has been found that the resistance of the grid portion of a junction barrier Schottky diode of a wide band gap material may be adjusted in such a degree when producing the diode that the total resistance of the diode may be considerably changed, so that said cross-over point between a negative and a positive temperature coefficient may be moved drastically. Furthermore, it will be possible to change the value of the temperature coefficient in this way.
  • said cross- over point of the temperature coefficient of the diode may be lowered considerably without making the drift layer thicker.
  • the temperature behaviour may be optimized independently of the drift layer.
  • This method may also be used to control the capacitive behaviour of the diode for minimizing unwanted oscillations in a circuit in which the diode may be built in. "Temperature dependence of the operation" as used here is accordingly intended to also cover that case.
  • the method is carried out for producing a diode to be connected in a package in parallel with other such diodes for sharing an on- state current through said package, and step 2) is carried out for adjusting the resistance of the grid portion of the diode for obtaining that the temperature coefficient of the diode will be positive or nearly positive at the intended current density and volt- age blocking capability of the diode.
  • Paralleling of many chips of such diodes is important in many applications, such as in power converters, since the size of each chip is still very small, for achieving high currents in the range of for example 100 A.
  • a positive temperature coefficient for the cur- rent density in question is often a condition for such paralleling, and this may be achieved also for low current densities for diodes with low voltage blocking capability in this way.
  • Nearly positive means that it may be possible to in this way obtain a temperature coefficient being less negative and by that use for example 250 V diodes of SiC for paralleling under certain conditions.
  • the resistance of the grid portion of the diode is in step 1 ) adjusted by adjusting the doping concentration of drift layer regions later in step 2) becoming a part of said grid portion.
  • the resistance of the grid portion may in this way be increased by decreasing the doping concentration of said drift layer regions and conversely.
  • Another positive effect of this lower doping concentration in the grid portion is a higher yield of the diodes, since other negative effects in the surface region of the diode are reduced by that.
  • the relation between the lateral cross section area of said drift layer regions of the grid portion with respect to the total lateral cross section area of the diode is in step 2) adjusted for adjusting the resistance of the grid portion. It has been found that this relation is another parameter crucial for the resistance of the grid portion and which may be changed without substantially influencing the switching losses of the diode.
  • the doping concentration of the drift layer is increased with respect to the maximum doping concentration allowed for a diode without any grid portion for lowering the resistance of the drift layer and the on-state losses of the diode at a given voltage blocking capability of the diode.
  • This embodiment is particularly well suited for blocking voltages as of which the unipolar drift resistance is the dominating part of the on-state resistance of the diode, which for SiC means a blocking voltage of 900 V and higher. It has been found that the different blocking mechanisms in the junction barrier Schottky diode compared to a normal Schottky diode allow a higher desired critical electric field in the junction barrier Schottky diode.
  • the resistance of the drift layer may be lowered, since for a given blocking volt- age the doping concentration of the drift layer may be increased and thereby the drift layer may be made thinner. This results in a lower total forward voltage of the junction barrier Schottky diode compared to a normal Schottky diode and will influence the temperature dependence of the diode.
  • said material is SiC. This means that it will be possible to benefit from all the advantageous properties of SiC in a junction barrier Schottky diode.
  • a diode having the drift layer doped by donors is produced. This seems to be the most preferred doping type for the drift layer, although the invention is not restricted thereto, but it also comprises the use of acceptors as dopants for the drift layer and thereby hole conduction.
  • the invention also relates to a junction barrier Schottky diode produced by carrying out a method according to the present invention.
  • the invention relates to a use of a junction barrier Schottky diode produced by carrying out a method according to the invention in a package in parallel with other such diodes for sharing a current through this package, which may for blocking voltages of 1200-1800 V be possible also for current densities being as low as 150 A/cm 2 in the on-state of the diode. It will also be interesting to apply the method according to the invention on larger SiC chips with a cross section exceeding 10 mm 2 .
  • Fig 1 is a schematic cross-section view of a conventional Schottky diode
  • Fig 2 is a view corresponding to Fig 1 of a Junction Barrier Schottky diode (JBS) according to a first preferred embodiment of the invention
  • Fig 3 is a graph illustrating the current density at the cross-over point of the temperature coefficient from negative to positive of different semiconductor devices versus the blocking voltage for which they are dimensioned
  • Fig 4 illustrates very schematically a preferred use of a low blocking voltage junction barrier Schottky diode according to the present invention
  • Fig 5 is a view corresponding to Fig 2 of a junction barrier Schottky diode according to a second preferred embodiment of the invention.
  • Fig 6 is a view corresponding to Fig 2 of a junction barrier Schottky diode according to a third preferred embodiment of the invention.
  • Figs 7a-7d are schematic views from above illustrating some possible designs of a junction barrier Schottky diode according to the present invention.
  • a conventional Schottky diode is firstly shown in Fig 1 .
  • This Schottky diode of SiC has a highly doped n-type substrate layer 1 and a low doped n-type drift layer 2 on top thereof.
  • a metal layer 3 forming a Schottky contact to the drift layer 2 is applied on top of the latter.
  • this Schottky diode is made of SiC and for comparatively low blocking voltages, for instance below 2000 V, the drift layer 2 may be made very thin resulting in very low on- state losses, but also in a negative temperature coefficient for the current densities normally of interest.
  • the cross-over point at which the temperature coefficient changes from negative to positive may be lowered by making the drift layer thicker, which will then, as already stated above, substantially increase the on- state losses of the diode.
  • a junction barrier Schottky diode as illustrated in Fig 2 opens new possibilities to move said cross-over point of the temperature coefficient without substantially influencing the switching losses of the diode and the on-state losses thereof will neither be changed that much.
  • a diode of this type known from for instance US patent 6 104 043, will be described.
  • the constitution of this diode will be clear from the following description of a method used for its production. This method also comprises masking and demasking steps as well as annealing step after implantation, which however will not be further described here.
  • n-type substrate layer 1 and a low doped n-type drift layer 2 of SiC are epitaxially grown, preferably by Chemical Vapour Deposition, on top of each other.
  • Any suitable donor such as nitrogen and phosphor, may be used to obtain the doping of these layers.
  • Typical doping concentrations may be 10 15 -1 0 16 cm “3 and 10 18 -10 20 cm “3 for the drift layer and the substrate layer, respectively.
  • a p-type dopant such as boron or aluminium, is implanted into the drift layer in regions 4 laterally spaced to form doped p-type emitter layer regions in the drift layer at a vertical distance from the substrate layer 1.
  • the regions 4 are mostly highly doped, but low doped is a conceivable alternative.
  • a conventional acceleration energy for the implant such as 300 keV, which results in compara- tively shallow emitter layer regions having a depth of about 0.3 ⁇ m when Al is implanted and 0.6 ⁇ m for B, which is to be compared with the thickness of the drift layer 2, which is typically about 5-50 ⁇ m.
  • the doping concentration in the emitter layer regions may typically be 10 16 -10 20 cm "3 .
  • the spacing between adjacent emitter region layers is typically 4-12 ⁇ m for a diode made for blocking 250-2500 V.
  • a metal layer 5 is applied on top of the drift layer 2 to make a Schottky contact 6 thereto in drift layer regions 7 between adjacent emitter layer regions and on top of the emitter layer regions 4 to make an ohmic contact 8 thereto.
  • Two different metals may be used for obtaining the ohmic and the Schottky contacts. However, it is also possible to use the same metal for this, and it is even possible to let the contact 8 be a Schottky contact.
  • the ohmic contact and the Schottky contact form the anode of the diode, whereas a corresponding metal layer 9 forms the cathode of the diode and is applied under the substrate layer.
  • this diode In the forward conducting state of the diode it will due to the lower Schottky barrier (about 0,7-1 V) than the pn-barrier (about 2.2-2.5 V) function as a Schottky diode at lower current densities, so that the on-state losses will be lower than for a pn-diode. There will also at such lower current densities be no injection of minority charge carriers from the emitter layer regions into the drift layer which means that switching losses due to reverse recovery charge will be ne- glectible.
  • the diode will have a much lower leakage current at high voltages than a conventional Schottky diode.
  • the doping concentration of the drift layer regions 2 and 7 may be varied continuously so that the doping concentration is reduced when the distance to the surface is reduced. This facilitates spreading of the depleted region in the low doped region. The result will be a larger depleted region closest to the surface, making the shielding of the Schottky contact easier, since a depleted region extending between the p-islands is formed earlier, i.e. at a lower voltage.
  • junction barrier Schottky diode of this type appear from the US patent mentioned above.
  • the present inventors have found that it is possible to to a large extent control the temperature dependence of the operation of a Schottky diode of this type without substantially influencing the switching losses and the static losses of the diode.
  • diodes for lower blocking voltages i.e. which for wide band gap materials have a comparatively thin drift layer 2
  • Fig 3 illustrated at which current densities the cross-over point, i.e. where the temperature coefficient changes from negative to positive, is located for different diodes being designed for blocking different voltage in the blocking state thereof.
  • the line a is a real junction barrier Schottky diode
  • b is an ideal junction barrier Schottky diode
  • c is a real Schottky diode
  • d is an ideal Schottky diode.
  • a current density of 70-100 A/cm 2 is a maximum for taking care of cooling and encapsulation, and it appears that this means that diodes dimensioned for blocking at least 1500 V have to be used, even if there is no need of blocking voltages higher than for example 1000 V.
  • Fig 4 illustrates a use of a diode connected in parallel with other such diodes for sharing a current.
  • This type of use of a diode requires a positive temperature coefficient for ensuring that the current will be uniformly distributed among the diodes 12 while avoiding run away of the current through any of them.
  • Fig 5 illustrates how a method for controlling the temperature dependence of a junction barrier Schottky diode may be carried out when producing such a diode by adjusting the doping concentration of the drift layer regions 7 later in step 2) above becoming a part of the grid portion.
  • the drift layer 2 may for example in the case of SiC as the semiconductor material of the diode be epitaxially grown while introducing donors at a concentration of 10 1 ⁇ cm "3 until reaching the thickness (see line 1 1 ) where the grid portion is intended to start.
  • the doping concentration is as of here reduced to 5 x 10 15 cm "3 increasing the on-state resistance of the grid portion with respect to the case of the same doping concentration throughout the drift layer.
  • Fig 6 schematically illustrates another possibility to control the temperature dependence of a junction barrier Schottky diode when producing it, and this diode differs from the one according to Fig 5 by the fact that in step 2) the emitter layer regions are formed at larger lateral distances, so that the relation between the lateral cross section area of the drift layer regions 7 of the grid portion with respect to the total lateral cross section area of the diode will be increased resulting in a decrease of the resistance of the grid portion of the diode. More exactly, the relation is in Fig 5 1 /2, whereas it is increased to 2/3 for the embodi- ment according to Fig 6 resulting in an increase of the current density at which the temperature coefficient will change from negative to positive for a diode having a certain blocking capability.
  • Figs 7a-7d schematically illustrate some of a number of different options to design the grid portion of a junction barrier Schottky diode according to the present invention.
  • Fig 7a illustrates how the p-type emitter layer regions 4 have a square lateral cross- section and are surrounded by the n-type drift layer regions 7.
  • the emitter layer regions are instead formed by lateral bars 4.
  • Fig 7c shows how the grid portion may instead be formed by an- nular portions being alternatingly n-type and p-type doped.
  • Fig 7d it will also be possible to reverse the doping types of the embodiment according to Fig 7a, so that here the square portions are n-type doped and the sur- rounding part is p-type doped. It is then also well possible that the portions with square cross-section are also here emitter layer regions, so that this Schottky diode will have a drift layer being p-type doped.
  • the number of layers mentioned in the claims is a minimum number, and it is within the scope of the invention to arrange further layers in the diodes or divide any layer into several layers by selective doping of different regions thereof.
  • the drift layer may be composed by sub-layers of different dop- ing concentrations, such as particularly low doping concentration close to the emitter layer regions for facilitating the depletion of the drift layer there. It is for instance also possible to arrange a highly doped buffer layer between the substrate and the drift layer. This buffer layer will have the same conductivity doping type, n or p, as the drift layer.
  • the emitter layer regions may also be formed in bottom of trenches etched into the drift layer for increasing the vertical distance between the Schottky contacts and the junction barrier when the diode is reverse biased. It is also possible to obtain such vertical distance by using the regrowth technique and forming an ohmic contact to the emitter layer regions so buried.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

L'invention concerne un procédé permettant de réguler la sensibilité à la température d'une diode à barrière de Schottky d'un matériau semi-conducteur possédant un écart énergétique entre la bande de valence et la bande de conduction dépassant 2 eV, cette régulation étant obtenue lors de la production de la diode, par ajustement de la résistance à l'état passant de la portion de grille de la diode, ce qui permet d'obtenir une sensibilité à la température, de la diode en fonctionnement, adaptée à l'usage recherché de cette diode.
EP02736346A 2001-05-25 2002-05-24 Procede se rapportant a une diode a barriere de schottky, diode et utilisation correspondantes Ceased EP1390973A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SE0101848 2001-05-25
SE0101848A SE0101848D0 (sv) 2001-05-25 2001-05-25 A method concerning a junction barrier Schottky diode, such a diode and use thereof
PCT/SE2002/000994 WO2002099869A1 (fr) 2001-05-25 2002-05-24 Procede se rapportant a une diode a barriere de schottky, diode et utilisation correspondantes

Publications (1)

Publication Number Publication Date
EP1390973A1 true EP1390973A1 (fr) 2004-02-25

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EP (1) EP1390973A1 (fr)
JP (2) JP2004528728A (fr)
SE (1) SE0101848D0 (fr)
WO (1) WO2002099869A1 (fr)

Families Citing this family (18)

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SE0101848D0 (sv) * 2001-05-25 2001-05-25 Abb Research Ltd A method concerning a junction barrier Schottky diode, such a diode and use thereof
DE10235198B4 (de) * 2001-08-02 2011-08-11 Fuji Electric Systems Co., Ltd. Leistungs-Halbleitergleichrichter mit ringförmigen Gräben
JP2006352006A (ja) * 2005-06-20 2006-12-28 Sumitomo Electric Ind Ltd 整流素子およびその製造方法
DE102005046707B3 (de) * 2005-09-29 2007-05-03 Siced Electronics Development Gmbh & Co. Kg SiC-PN-Leistungsdiode
US7863656B2 (en) 2006-05-12 2011-01-04 Cree Sweden Ab Semiconductor device
JP4939839B2 (ja) * 2006-05-30 2012-05-30 株式会社東芝 半導体整流素子
US7728403B2 (en) * 2006-05-31 2010-06-01 Cree Sweden Ab Semiconductor device
CN101431020B (zh) * 2007-11-09 2010-09-08 上海华虹Nec电子有限公司 T型多晶硅栅电极的制备方法
EP2154726A3 (fr) * 2008-08-14 2010-05-26 Acreo AB Procédé de production d'une diode JBS
DE102011003961B4 (de) * 2011-02-11 2023-07-27 Robert Bosch Gmbh Trench-Schottkydiode
JP5881322B2 (ja) * 2011-04-06 2016-03-09 ローム株式会社 半導体装置
JP2011142355A (ja) * 2011-04-21 2011-07-21 Sumitomo Electric Ind Ltd 整流素子
JP5999678B2 (ja) * 2011-12-28 2016-09-28 ローム株式会社 半導体装置および半導体装置の製造方法
JP6203074B2 (ja) 2014-02-17 2017-09-27 株式会社東芝 半導体装置およびその製造方法
JP2017045901A (ja) * 2015-08-27 2017-03-02 トヨタ自動車株式会社 還流ダイオードと車載用電源装置
JP6767705B2 (ja) 2016-04-28 2020-10-14 パナソニックIpマネジメント株式会社 半導体素子
CN109148605B (zh) * 2017-06-19 2022-02-18 比亚迪半导体股份有限公司 快恢复二极管及制备方法、电子设备
JP6827433B2 (ja) 2018-03-02 2021-02-10 株式会社東芝 半導体装置

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JP2004528728A (ja) 2004-09-16
JP5554042B2 (ja) 2014-07-23
WO2002099869A1 (fr) 2002-12-12
JP2010050468A (ja) 2010-03-04

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