EP1299876B1 - Verfahren und vorrichtung zur steuerung einer elektronenquelle in matrixstruktur, mit regulierung durch die emittierte ladung - Google Patents

Verfahren und vorrichtung zur steuerung einer elektronenquelle in matrixstruktur, mit regulierung durch die emittierte ladung Download PDF

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Publication number
EP1299876B1
EP1299876B1 EP01954091A EP01954091A EP1299876B1 EP 1299876 B1 EP1299876 B1 EP 1299876B1 EP 01954091 A EP01954091 A EP 01954091A EP 01954091 A EP01954091 A EP 01954091A EP 1299876 B1 EP1299876 B1 EP 1299876B1
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EP
European Patent Office
Prior art keywords
column
emission
potential
voltage
columns
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Expired - Lifetime
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EP01954091A
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English (en)
French (fr)
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EP1299876A1 (de
Inventor
Pierre Nicolas
Denis Sarrasin
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Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
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Commissariat a lEnergie Atomique CEA
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0209—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant

Definitions

  • the present invention relates to a method and a device for controlling an electron source with a matrix structure.
  • hot cathodes for example, hot cathodes, photoemissive cathodes and field effect microtip cathodes are known (see document [1], which, like the other documents cited later, is mentioned at the end of the present description).
  • nano-field effect devices see [2]
  • planar electron sources of the graphite or diamond carbon type see document [3]
  • Such sources of electrons find applications mainly in the field of visualization with flat screens but also in other fields, for example physical instrumentation, lasers and sources of X-ray emission (see document [4]).
  • Examples of the invention which will be given in the following are limited to the field of the visualization, field which is the vastest (it includes the flat screens).
  • the present invention is not limited to this field and applies to any device using one or more electron sources (and including the case of a matrix 1 line x 1 column) this is the case for example a monopixel screen in pulsed operation.
  • the figure 1 schematically illustrates the operating principle of a display screen that uses a field emission electron source 2.
  • the screen of the figure 1 also comprises an anode 4 comprising an anode conductor 6.
  • the cathode which constitutes the source of electrons 2 is generally voltage controlled. Under the influence of this voltage, it emits a stream of electrons 8.
  • This screen comprises a cathode comprising a substrate 10, provided with cathode conductors 12 on which microtips 14 are formed, and grids 16 formed above the cathode conductors and provided with holes 18 facing the microtips.
  • the screen also comprises an anode comprising a substrate 20 and an anode conductor 22 which lies opposite the grids 16.
  • the electrons emitted by the electron source are accelerated and collected by the anode subjected to the high voltage V a . If a layer of phosphor material 28 is deposited on the anode conductor 6, then the kinetic energy of the electrons is converted into light.
  • a matrix structure screen using an electron source with a matrix structure 30 is schematically represented on the figure 4 .
  • Each pixel of the electron source 30 is defined by the intersection of a line electrode and a column electrode of that source.
  • Let L 1, L 2 ... L i ... L n row electrodes of the source and the electrodes of the source column are denoted C 1, C 2 ... C j ... C m.
  • the screen of the figure 4 includes a generator 34 scanning lines. This generator is provided with a source 36 of voltage V lns and a source 38 of voltage V ls .
  • V li denotes the control voltage of the line L i .
  • the screen also comprises means 40 for generating the control voltages of the columns. Note V cj the control voltage of the column C j .
  • a control circuit is assigned to each line and to each column of the screen and addressing is carried out one line at a time for a time t lig .
  • the lines are thus carried sequentially to a potential V ls called line selection potential while the columns are brought to a potential corresponding to the information to be displayed. Meanwhile t lig unselected rows are raised to a potential V lns as the voltages on the columns do not affect the display on these lines.
  • V ls a potential V ls called line selection potential
  • control methods are possible.
  • the control method using electric charges more simply known as the “charge control method” (see document [6]) is known.
  • charge control method a control method using a current, more simply called “current control method” (see document [7]).
  • a current control may seem to solve this problem because it is then necessary to inject a current and therefore a specific amount of electrons. Such a principle is indeed valid in static mode.
  • a capacitive load problem As soon as one wants to vary the current of the electron source rapidly, one is confronted with a capacitive load problem. Indeed, a column electrode is similar to a capacitor with respect to the lines that this column intersects and the current required for fast charging of this capacitor is greater than several orders of magnitude higher than the emission current.
  • the capacity of a column with respect to the C- neck lines is about 400 pF. If we want to "turn on” that is to say excite a pixel, we pass the current of this pixel from a value almost zero to a value of about 10 ⁇ A and, to do this, we increases the line-column voltage by approximately 40 V. If the commutation must be done in 1 ⁇ s (time which is to be compared to a line time of 60 ⁇ s), the capacitive current amounts to:
  • I C col .dV / dt i.e. about 16 mA.
  • the capacitive current is thus 1000 times greater than the emission current that we want to adjust. It is understood that such a method is not suitable for the rapid control of a source matrix structure.
  • the figure 5 schematically illustrates a display screen comprising a matrix-structured electron source using load control.
  • the known screen of the figure 5 does not differ from that of the figure 4 by means of application of the control voltages to the columns of the source of the screen.
  • the means 42 for applying a control voltage to a column for example the column C j , comprise a logic block 44, which receives as input a line sync signal E1, and a comparator 46, which receives as input a value setpoint A1 and which is connected to the logic block 44 as seen on the figure 5 .
  • the voltage application means 42 also comprise a tri-state output stage 48 which is also connected to the logic block 44 and receives voltages V c-on and Vc-off respectively from unrepresented voltage sources. .
  • the three-state output stage and the comparator are connected to the corresponding column of the electron source (C j in the example under consideration).
  • V lns V lns + I f Ins ⁇ little different from V ls - R lc - not - 1 .
  • this variation ⁇ V cj must be compared to the set value A1.
  • This variation of the voltage ⁇ V cj depends on the value of the capacity of the column, which brings technological variables of the screen (related to the dimensions of this screen) in the design parameters of the control circuit.
  • the comparator 46 is at the level of the output stage of the assembly forming the means for generating column control voltages. This means that the comparator must either withstand the voltage dynamics required for the control of the columns (approximately 40 V) or be able to isolate this output by an additional stage.
  • the present invention aims to overcome the various disadvantages above.
  • the value capable of enabling transmission is equal to the potential of the unaddressed line or lines.
  • the device according to the invention further comprises means for converting the amount of charge already transmitted into a voltage level.
  • the device which is the subject of the invention may furthermore comprise means for compensating residual leakage currents.
  • This device may also include inter-column capacitive coupling compensation means.
  • the present invention provides a control circuit that operates under these conditions.
  • control means 50 represent the control means of a column of the screen (C j ).
  • control means 50 comprise, as can be seen, a control logic 52, a comparator 54, a current integrator with V- neck control and an output stage 58.
  • the current supplied by the emitters is integrated while maintaining the stable column potential at the same time. value V c-on .
  • A2 see figure 6
  • A1 a voltage that is proportional to the load emitted.
  • control method used in this example of the invention is immediately apparent since, even if a leakage current remains, the latter only depends on the addressed pixel and not on the (n-1) other pixels. unaddressed from the same column.
  • the addressing method used in this example of the invention allows, for the same screen (in terms of resistance R lc ), a better image quality.
  • FIG. figure 7 An example of a control device of a column, according to the invention, which is shown on FIG. figure 7 .
  • This control device 60 comprises an output stage 62 of the push-pull type, a current integrator assembly 64 and a comparator 66.
  • the output stage 62 makes it possible to switch, on the column electrode (C j ), either the supply voltage V c-off corresponding to the extinction level of the pixel or the input of the integrator assembly 64 which imposes its virtual mass the level V c-on (putting it to the potential of unselected lines).
  • the output stage 62 comprises, in known manner, logic level translation means 68 and two MOSFET transistors 70 and 72, the transistor 70 being of the P type and the N type transistor 72, these means 68 and these transistors being arranged as we see it on the figure 7 .
  • the integrator assembly 64 comprises an amplifier 74 which is looped on a capacitor 76 of capacitance C int which is itself connected in parallel with a controlled switch SW1, the output A2 of this amplifier being connected to the input (-) of the comparator 66.
  • the controlled switch makes it possible to zero potential A2 at the beginning of each line.
  • the input (+) of the comparator is connected to a set voltage A1 corresponding to the quantity of charges to be transmitted.
  • this reference voltage can be provided by various means depending on the desired application of the invention.
  • a digital analog converter CDA is used which receives as input digital data DN of target voltage and the output of which provides the reference potential A1.
  • the output S2 of the comparator assembly constitutes the control of the push-pull output stage thus enabling the device to be looped.
  • the signal S1 (corresponding to the beginning of the time which is allocated to a line), according to a chronology which will be described later, controls the switch SW1. It can be seen that the control logic 52, which supplies S1, also controls a not shown line control circuit PL.
  • the figure 8 represents the time diagram of the different voltages within the device, during a line addressing cycle.
  • the cycle starts at time t 0 , with the start of signal S1 (see figure 8 part B) triggering the rise of S2 (see figure 8 part C) which, through the output stage, passes the column V cj to V c-on (virtual mass).
  • the signal S1 goes low to open the switch SW1, which starts the integration of current into C int .
  • the device described makes it possible to deliver to the pixel in question a load controlled by the setpoint supplied A1, and this without variation of the voltage applied to the column, during the emission time.
  • the line potential V Li is switched to the selection potential V ls , after the establishment of the potential of the column (V cj ), so as to reduce the capacity to charge only that of the pixel in question. Capacitive current in the column will therefore be minimized.
  • V Li increases before t on , the emission current is established before the beginning of the integration (and the corresponding charges are therefore not measured). If V Li rises during or after the beginning of the integration (t on ), the charges corresponding to the capacitive pixel current are measured and result in an initial voltage offset (offset) on A2. A slight difference in phase, between the rise of V Li and the falling edge of S1, can therefore be adjusted to adopt the best compromise according to the application.
  • this level can be managed directly by the control logic while keeping the signal S1 of the corresponding column low.
  • FIG. 9 Another embodiment of a control device of a column according to the invention is schematically represented on the figure 9 . This is a variant of the figure 7 .
  • the previous system ( figure 7 ) converts the amount of load already transmitted into a voltage level, which makes it possible to switch the control of the control stage of the column to the time t off when the quantity of charge (Q ref ) setpoint is reached.
  • the converter CCT comprises the amplifier 74 already used in the example of the figure 7 but associated, in the case of figure 9 at a resistor R mounted between the input (-) and the output of the amplifier 74.
  • the CCN circuit receives digital or analog data of appropriate means DNA.
  • a compensation current of sign opposite to I leak ls it is sufficient to connect a source of current to the measurement input of the integrator (see FIG. figures 6 and 7 ).
  • This may for example consist of a transistor mounted as a current generator or a resistor R comp controlled by an adjustable voltage generator GT, as can be seen on FIG. figure 10 .
  • two filter diodes DF1 and DF2 are used to filter the parasitic charges due to the inter-column capacitors.
  • the figure 12 provides another embodiment of a column control device with filtering, this time by transistors, parasitic loads due to inter-column capabilities.
  • This solution is of the synchronous type.
  • the output of the comparator is this time revalidated by logic to provide S2 at specific times.
  • the switching times of the V c-on columns at V c-off are now fixed. It is therefore possible synchronously to prevent the capacitive currents associated with this consumption from being integrated in the measurement of charges.
  • the adder has the reference ADD.
  • the switching signals of the columns j-1 and j + 1 respectively have the references S2 j-1 and S2 j + 1 .
  • Loaded control circuits for operating electron sources are known from the documents WO 96/05589 and US 6020864 . These circuits make it possible to apply voltages on the lines and columns of a matrix source in order to allow the emission of the electrons and to measure the quantity of charge emitted to compare it with a set value.
  • the measurement of the load is usually a resistance and causes a voltage variation of the order of 1V given the other quantities involved.
  • This measurement voltage comes disrupt the supply circuit: in the prior art, the variation of 1 volt compared to the applied kV causes a negligible error. In the invention, the error would become very large (one volt over a few tens of volts) and absolutely unacceptable.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Cold Cathode And The Manufacture (AREA)
  • Analysing Materials By The Use Of Radiation (AREA)

Claims (6)

  1. Verfahren zur Steuerung einer matrixförmig strukturierten Elektronenquelle, die wenigstens eine Adressierzeile und wenigstens eine Adressierspalte umfasst, deren Schnittstelle eine Emissionszone oder Emissionszonen, Pixel genannt, definiert und wo die Elektronen durch die Spalte geliefert werden, wobei dieses Verfahren ein sequenzielles Verfahren ist,
    dadurch gekennzeichnet, dass:
    - man während einer ersten Zeit die Elektronenemission auslöst, indem man an die selektierte Zeile und die Spalte oder Spalten Potentiale mit einem Wert anlegt, der diese Emission ermöglicht, man dann das Potential der Spalte oder Spalten während der gesamten Dauer der Emission aufrechterhält, während simultan die durch das oder die Pixel der Spalte beziehungsweise Spalten emittierte Ladungsquantität in der genannten Spalte oder den genannten Spalten gemessen wird, und,
    - während einer zweiten Zeit, wenn die in einer Spalte gemessene Ladungsquantität eine erforderliche Ladungsquantität erreicht, man das Potential dieser Spalte auf einen Wert schaltet, der die Blockierung der Elektronenemission gewährleistet.
  2. Verfahren nach Anspruch 1, bei dem der genannte Wert gleich dem Potential der nichtadressierten Zeile oder Zeilen ist.
  3. Vorrichtung zur Steuerung einer wenigstens eine Adressierzeile und wenigstens eine Adressierspalte umfassenden matrixförmig strukturierten Elektronenquelle, deren Schnitt eine Emissionszone oder Emissionszonen, Pixel genannt, definiert und wo die Elektronen durch die Spalte geliefert werden,
    wobei diese Vorrichtung dadurch gekennzeichnet ist, dass sie umfasst:
    - Einrichtungen zum Steuern der Adressierzeile oder -zeilen, fähig an die selektierte Zeile ein Selektionspotential anzulegen und außerhalb der Selektionszeit die Zeile oder Zeilen mit einem Potential zu speisen, das die Emission der entsprechenden Pixel blockiert,
    - Einrichtungen zum Steuern der Spalte oder Spalten, wobei diese Steuerungseinrichtungen für jede Zeile Einrichtungen umfassen, die ermöglichen, während einer Zeilenselektion an die genannte Spalte entweder eine die Emission gewährleistende erste Spannung oder eine die Blockierung gewährleistende zweite Spannung anzulegen,
    - Einrichtungen zum Vergleichen der gemessenen Ladungsquantität mit einer Referenzladungsquantität, mit Rückkopplung zu den Spaltensteuerungseinrichtungen.
  4. Vorrichtung nach Anspruch 3, außerdem Einrichtungen zur Umwandlung der schon emittierten Ladungsquantität in einen Spannungspegel umfassend.
  5. Vorrichtung nach Anspruch 3, außerdem Einrichtungen zur Kompensation von Restströmen bzw. restlichen Leckströmen umfassend.
  6. Vorrichtung nach Anspruch 3, außerdem Einrichtungen zur Kompensation von kapazitiven Kopplungen zwischen Spalten umfassend.
EP01954091A 2000-07-13 2001-07-12 Verfahren und vorrichtung zur steuerung einer elektronenquelle in matrixstruktur, mit regulierung durch die emittierte ladung Expired - Lifetime EP1299876B1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0009194 2000-07-13
FR0009194A FR2811799B1 (fr) 2000-07-13 2000-07-13 Procede et dispositif de commande d'une source d'electrons a structure matricielle, avec regulation par la charge emise
PCT/FR2001/002276 WO2002007139A1 (fr) 2000-07-13 2001-07-12 Procede et dispositif de commande d'une source d'electrons a structure matricielle, avec regulation par la charge emise

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EP1299876A1 EP1299876A1 (de) 2003-04-09
EP1299876B1 true EP1299876B1 (de) 2009-01-14

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US (1) US7280088B2 (de)
EP (1) EP1299876B1 (de)
JP (1) JP4874500B2 (de)
AT (1) ATE421134T1 (de)
DE (1) DE60137425D1 (de)
FR (1) FR2811799B1 (de)
WO (1) WO2002007139A1 (de)

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US10483077B2 (en) 2003-04-25 2019-11-19 Rapiscan Systems, Inc. X-ray sources having reduced electron scattering
GB0525593D0 (en) 2005-12-16 2006-01-25 Cxr Ltd X-ray tomography inspection systems
US8243876B2 (en) 2003-04-25 2012-08-14 Rapiscan Systems, Inc. X-ray scanners
JP4504655B2 (ja) * 2003-10-15 2010-07-14 日本放送協会 電子放射装置、駆動装置およびディスプレイ
DE102004003258A1 (de) * 2004-01-21 2005-08-18 GEKKO Gesellschaft für Printrealisierung und Farbstandardisierung mbH Druckerzeugnis und Verfahren zu seiner Herstellung
FR2881270B1 (fr) * 2005-01-27 2007-04-20 Commissariat Energie Atomique Dispositif microelectronique emetteur d'electrons a plusieurs faisceaux
US9046465B2 (en) 2011-02-24 2015-06-02 Rapiscan Systems, Inc. Optimization of the source firing pattern for X-ray scanning systems
GB0901338D0 (en) * 2009-01-28 2009-03-11 Cxr Ltd X-Ray tube electron sources
WO2017053958A1 (en) * 2015-09-25 2017-03-30 Tactual Labs Co. Tool to measure the latency of touchscreen devices

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FR2632436B1 (fr) * 1988-06-01 1991-02-15 Commissariat Energie Atomique Procede d'adressage d'un ecran matriciel fluorescent a micropointes
US5359256A (en) * 1992-07-30 1994-10-25 The United States Of America As Represented By The Secretary Of The Navy Regulatable field emitter device and method of production thereof
JP3251466B2 (ja) * 1994-06-13 2002-01-28 キヤノン株式会社 複数の冷陰極素子を備えた電子線発生装置、並びにその駆動方法、並びにそれを応用した画像形成装置
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JP2001209352A (ja) * 2000-01-24 2001-08-03 Nec Corp 電界電子放出型ディスプレィ装置およびその駆動方法

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US20040021623A1 (en) 2004-02-05
DE60137425D1 (de) 2009-03-05
EP1299876A1 (de) 2003-04-09
JP2004504639A (ja) 2004-02-12
WO2002007139A1 (fr) 2002-01-24
FR2811799B1 (fr) 2003-06-13
JP4874500B2 (ja) 2012-02-15
FR2811799A1 (fr) 2002-01-18
US7280088B2 (en) 2007-10-09
ATE421134T1 (de) 2009-01-15

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