EP1248175A2 - Régulateur de tension parallèle - Google Patents

Régulateur de tension parallèle Download PDF

Info

Publication number
EP1248175A2
EP1248175A2 EP02007177A EP02007177A EP1248175A2 EP 1248175 A2 EP1248175 A2 EP 1248175A2 EP 02007177 A EP02007177 A EP 02007177A EP 02007177 A EP02007177 A EP 02007177A EP 1248175 A2 EP1248175 A2 EP 1248175A2
Authority
EP
European Patent Office
Prior art keywords
current mirror
current
source
voltage
controlled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP02007177A
Other languages
German (de)
English (en)
Other versions
EP1248175A3 (fr
Inventor
Gebhard Melcher
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of EP1248175A2 publication Critical patent/EP1248175A2/fr
Publication of EP1248175A3 publication Critical patent/EP1248175A3/fr
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/265—Current mirrors using bipolar transistors only

Definitions

  • the invention relates to a parallel voltage regulator with a controllable load element that connects to the output terminals of the Parallel voltage regulator is connected, a reference voltage source to set the target output voltage and a with the controllable load element and the reference voltage source connected control device.
  • Parallel voltage regulators are usually used in the cases used, in which a longitudinal voltage drop, as in a Series voltage regulator occurs, is not desirable. Though the drop in longitudinal voltage at full modulation is the usual transistors used is relatively small, however the residual voltage drop always in certain applications still too big.
  • a controllable one becomes parallel to the load Load element arranged by the level of the output voltage by influencing the voltage drop at the internal resistance the source can be regulated.
  • the bigger the current due to the parallel load element the larger the Voltage drop across the internal resistance and the smaller consequently the voltage at the output terminals.
  • the controllable load element formed by a MOSFET by an operational amplifier is controlled.
  • the output voltage at a parallel regulator is equal to the input voltage led to an input of the operational amplifier while the other input is supplied with a reference voltage is. If the output voltage deviates from the reference voltage becomes the controllable load element, i.e. the MOSFET, readjusted until the voltage returns to the reference voltage equivalent.
  • Parallel controllers are often used, for example, for contactless ones Chip cards are used, the load consisting essentially of one Microcontroller exists.
  • the power source is through a Coil formed in which a generated by a read / write device Magnetic field induces a voltage, the height the transmitted power depends largely on how the contactless chip card is far from the read / write device is removed.
  • a series regulator unsuitable for contactless chip cards because of the voltage drop the range is already shortened at the control transistor.
  • very high voltages are induced when the contactless chip card in close proximity to the read / write device located. In this case, when using a Parallel voltage converter a relatively large current added via the controllable load element, the the resulting losses do not have a negative impact since enough power for the microcontroller in this case anyway is available.
  • the object of the present invention is therefore one Specify parallel voltage regulator, which is also for very rapid load changes is suitable and a low quiescent current requirement having.
  • the voltage regulator simple and therefore space-saving to set up.
  • This task is carried out by a parallel voltage regulator solved type mentioned, characterized in that is that the control device has a first current mirror and has a second current mirror, the reference voltage source lies in the control branch of the first current mirror, the controlled branch of the first current mirror on the one hand the output voltage and on the other hand with the control branch of the second current mirror is connected and the controllable load element through the controlled branch of the second current mirror is formed.
  • the inventive design of the parallel voltage regulator the controller is very fast, compared to one Operational amplifier is disadvantageous that the current amplification factor is relatively small. Hence the accuracy the regulated output voltage is relatively low, however, this is of no importance in the application described is because the allowable tolerances of the power supply of a microcontroller are relatively large. For that you can large load fluctuations that within a very short time of can climb a few milliamps into the ampere range, due to the great speed of the control loop in one sufficient accuracy can be adjusted.
  • Another advantage of the inventive design of the Parallel voltage regulator lies in the great inherent stability.
  • the control function has the is based on the fact that it is not a purely ohmic Load acts, but also capacities or parasitic capacities there is only one other pole. Because of the low-resistance node between the first and second current mirror this pole is very high frequency. instabilities could therefore only occur at very high frequencies are outside the range normally to be expected.
  • the invention resides in the freedom from loss of voltage according to the parallel regulator principle in connection with a low quiescent current, high maximum load current and high Rule bandwidth is possible.
  • a parallel voltage regulator according to the prior art is shown in FIG.
  • a M0SFET T1 forms a controllable load element.
  • the M0SFET T1 is controlled by an operational amplifier OP1.
  • the output voltage V OUT is present at its first input 1.
  • the other input 2 is supplied with a reference voltage V REF . If the output voltage deviates from the desired value specified by V REF , the MOSFET T1 is activated by the operational amplifier OP1 in such a way that the current I1 through the MOSFET T1 increases (with increasing V OUT ).
  • the total current I tot that is absorbed by the circuit now increases in accordance with the increase in I1.
  • an additional voltage drops across an internal resistance Ri of an external voltage source 3, by which the output voltage V OUT decreases.
  • the current I1 is regulated down by the MOSFET T1, so that the initial state is restored.
  • a parallel voltage regulator according to the invention is now shown in FIG.
  • a controllable load element MN2 which is likewise designed as a MOSFET, is in turn located parallel to a load ZL.
  • the total current I tot at the input of the voltage regulator 4 is composed essentially of the output current I L and the current I1 through the controllable load element MN2.
  • a first current mirror 5 is formed by two p-channel FETs. Its control transistor MP1 is connected to an external reference voltage source V REF .
  • the controlled transistor MP2 of the first current mirror 5 is connected on the source side to the output terminal located at V OUT and on the drain side to a second current mirror 6.
  • the second current mirror 6 is formed by two n-channel FETs MN1 and MN2, where MN2 is the controllable load element. While the current through the control transistor MP1 of the first current mirror 5 is determined by a first current source I B1 , a second current source I B2 , which is connected between a reference potential and the drain connection of the controlled transistor MP2 of the first current mirror 5, serves to transistors in keep active area. Without this measure, the bandwidth of the circuit would be considerably reduced, since the charges that are required to control the current would always have to be built up first.
  • the current I1 is calculated from the change in the gate-source voltage U GS .
  • the current through transistor MP2 is g m x ⁇ U GS , where g m is the transconductance of transistor MP2.
  • the current I1 is now calculated at this value multiplied by the reflection factor k2 of the second current mirror 6.
  • FIG. 2 shows only one possibility of realizing the invention Parallel voltage regulator.
  • transistor types can also be used, for example Bipolar transistors, such an arrangement in the figure 3 is shown.
  • Bipolar transistors have the advantage over field-effect transistors that the collector current I C is dependent on the base current I B in an exponential function.
  • the corresponding characteristic curve for MOSFETs is quadratic. This results in advantages in the control behavior for the bipolar transistor. With the technology used today, however, only FETs are usually available, which is why FETs are used for cost reasons, despite functional disadvantages. Bipolar transistors are only used in a few special cases. Except for the fact that pnp transistors are used instead of p-channel FETs and npn transistors are used instead of n-channel FETs, the circuit of FIG. 3 corresponds to the circuit arrangement of FIG. 2.
  • Figure 4 now shows the characteristic of the output voltage the input current. It should be noted that the Current is plotted logarithmically on the X axis. about four decades is a relatively good tension stability to observe, the deviation from the nominal voltage within the tolerance range of a microcontroller in Application mentioned at the beginning for contactless chip cards lies.
  • FIG. 5 shows the quotient of the output voltage V out and the input current I 0 plotted against the input current I 0 . This corresponds to the resistance of the controllable load element MN2 in parallel with the load Z L. With increasing current, the resistance decreases linearly over a large range, whereby the linearity is also maintained over four decades according to the output voltage.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Control Of Electrical Variables (AREA)
EP02007177A 2001-03-30 2002-03-28 Régulateur de tension parallèle Withdrawn EP1248175A3 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE2001115813 DE10115813B4 (de) 2001-03-30 2001-03-30 Parallelspannungsregler
DE10115813 2001-03-30

Publications (2)

Publication Number Publication Date
EP1248175A2 true EP1248175A2 (fr) 2002-10-09
EP1248175A3 EP1248175A3 (fr) 2004-07-07

Family

ID=7679702

Family Applications (1)

Application Number Title Priority Date Filing Date
EP02007177A Withdrawn EP1248175A3 (fr) 2001-03-30 2002-03-28 Régulateur de tension parallèle

Country Status (2)

Country Link
EP (1) EP1248175A3 (fr)
DE (1) DE10115813B4 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014161676A1 (fr) * 2013-04-03 2014-10-09 Siemens Aktiengesellschaft Transducteur de mesure pour l'instrumentation de processus et procédé de surveillance de l'état de son capteur
EP3113331A1 (fr) * 2015-07-03 2017-01-04 STmicroelectronics SA Carte sans contact téléalimentée

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3964182B2 (ja) * 2001-11-02 2007-08-22 株式会社ルネサステクノロジ 半導体装置
DE102005003686A1 (de) 2005-01-26 2006-08-03 Rohde & Schwarz Gmbh & Co. Kg Anordnung zum Glätten des einem Verbraucher zugeführten Verbraucherstromes

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2226664A (en) * 1988-11-26 1990-07-04 Motorola Inc Shunt voltage regulator
US5939933A (en) * 1998-02-13 1999-08-17 Adaptec, Inc. Intentionally mismatched mirror process inverse current source
US6078168A (en) * 1996-12-17 2000-06-20 Sgs-Thomson Microelectronics S.A. Parallel voltage regulator

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3494488B2 (ja) * 1994-11-25 2004-02-09 株式会社ルネサステクノロジ 半導体装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2226664A (en) * 1988-11-26 1990-07-04 Motorola Inc Shunt voltage regulator
US6078168A (en) * 1996-12-17 2000-06-20 Sgs-Thomson Microelectronics S.A. Parallel voltage regulator
US5939933A (en) * 1998-02-13 1999-08-17 Adaptec, Inc. Intentionally mismatched mirror process inverse current source

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014161676A1 (fr) * 2013-04-03 2014-10-09 Siemens Aktiengesellschaft Transducteur de mesure pour l'instrumentation de processus et procédé de surveillance de l'état de son capteur
CN105190251A (zh) * 2013-04-03 2015-12-23 西门子公司 用于过程仪表设施的测量变换器和用于监控其传感器状态的方法
US9435672B2 (en) 2013-04-03 2016-09-06 Siemens Aktiengesellschaft Measurement transducer for process instrumentation, and method for monitoring the state of its sensor
CN105190251B (zh) * 2013-04-03 2017-05-10 西门子公司 用于过程仪表设施的测量变换器和用于监控其传感器状态的方法
EP3113331A1 (fr) * 2015-07-03 2017-01-04 STmicroelectronics SA Carte sans contact téléalimentée
FR3038467A1 (fr) * 2015-07-03 2017-01-06 St Microelectronics Sa Carte sans contact telealimentee
CN106326964A (zh) * 2015-07-03 2017-01-11 意法半导体有限公司 远程供电的非接触式卡
US10432023B2 (en) 2015-07-03 2019-10-01 Stmicroelectronics Sa Remotely powered contactless card
CN106326964B (zh) * 2015-07-03 2020-03-17 意法半导体有限公司 远程供电的非接触式卡
US10978910B2 (en) 2015-07-03 2021-04-13 Stmicroelectronics Sa Remotely powered contactless card

Also Published As

Publication number Publication date
DE10115813B4 (de) 2004-02-26
EP1248175A3 (fr) 2004-07-07
DE10115813A1 (de) 2002-10-24

Similar Documents

Publication Publication Date Title
DE69802577T2 (de) Lastpol stabilizierter Spannungsregler
DE60225124T2 (de) Regelungseinrichtung mit kleiner Verlustspannung, mit großem Lastbereich und schneller innerer Regelschleife
DE10249162B4 (de) Spannungsregler
DE102005039114B4 (de) Spannungsregler mit einem geringen Spannungsabfall
EP0421516B1 (fr) Dispositif d'alimentation avec régulation de tension et limiteur de courant
EP0557850B1 (fr) Montage servant à limiter le courant de charge d'un MOSFET de puissance
DE102009032610A1 (de) System, das eine Versatzspannung umfasst, die eingestellt ist, um Variationen bei einem Transistor zu kompensieren
DE69428884T2 (de) Überlastschutzschaltkreis für MOS-Leistungstreiber
DE102009029322A1 (de) Anordnung und Verfahren zur Leistungswandlung
DE102004015621A1 (de) Schaltstromrichter
DE102017223082A1 (de) Spannungsregler und Verfahren zum Kompensieren der Effekte einer Ausgangsimpedanz
DE4444623A1 (de) Schaltungsanordnung zur Laststromregelung eines Leistungs-MOSFET
EP0973084B1 (fr) Circuit intégré avec un régulateur de tension
DE10115813B4 (de) Parallelspannungsregler
DE2250625B2 (de) Schaltungsanordnung zur Konstanthaltung eines an eine Last gelieferten Stromes
EP0862271A2 (fr) Circuit comparateur
DE69508063T2 (de) Konstantspannungsabfall-Spannungsregler
EP1473824A2 (fr) Unité de commande pour commander un transistor de contrôle d'un ventilateur
DE10219003B4 (de) Stromspiegel für eine integrierte Schaltung
EP0961403A2 (fr) Circuit amplificateur intégré compensé en température
DE69713266T2 (de) Oszillator mit einer startschaltung
DE102018116669A1 (de) Verfahren zum Betrieb eines stützkondensatorfreien Low-Drop-Spannungsreglers mit großem Spannungsbereich
DE3336841C2 (fr)
DE3246144C2 (de) Schaltungsanordnung zur Stromkonstanthaltung
DE102018217442A1 (de) Spannungsregler mit virtuellem Null-Ruhestrom

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR

AX Request for extension of the european patent

Extension state: AL LT LV MK RO SI

17P Request for examination filed

Effective date: 20041207

AKX Designation fees paid

Designated state(s): AT DE FR GB

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: INFINEON TECHNOLOGIES AG

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20100903