EP1228611B1 - Recepteur radio a deux etages de correction de decalage en continu, de synchronisation et d'estimation de canal - Google Patents

Recepteur radio a deux etages de correction de decalage en continu, de synchronisation et d'estimation de canal Download PDF

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Publication number
EP1228611B1
EP1228611B1 EP00975914A EP00975914A EP1228611B1 EP 1228611 B1 EP1228611 B1 EP 1228611B1 EP 00975914 A EP00975914 A EP 00975914A EP 00975914 A EP00975914 A EP 00975914A EP 1228611 B1 EP1228611 B1 EP 1228611B1
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Prior art keywords
estimate
estimated
signal
offset
sampled signal
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Expired - Lifetime
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EP00975914A
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German (de)
English (en)
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EP1228611A1 (fr
Inventor
Bengt Lindoff
Niklas Stenström
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Telefonaktiebolaget LM Ericsson AB
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Telefonaktiebolaget LM Ericsson AB
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/20—Modulator circuits; Transmitter circuits
    • H04L27/2032—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner
    • H04L27/2053—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases
    • H04L27/206—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases using a pair of orthogonal carriers, e.g. quadrature carriers
    • H04L27/2067—Modulator circuits; Transmitter circuits for discrete phase modulation, e.g. in which the phase of the carrier is modulated in a nominally instantaneous manner using more than one carrier, e.g. carriers with different phases using a pair of orthogonal carriers, e.g. quadrature carriers with more than two phase states
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
    • H04L25/062—Setting decision thresholds using feedforward techniques only
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202—Channel estimation
    • H04L25/0224—Channel estimation using sounding signals
    • H04L25/0228—Channel estimation using sounding signals with direct estimation from sounding signals

Definitions

  • This invention relates to a radio receiver, and in particular to a radio receiver for use in a digital Time Division Multiple Access (TDMA) communication system, such as the GSM cellular radio telephone system.
  • TDMA Time Division Multiple Access
  • information bits are mapped to waveforms that modulate a carrier signal.
  • the transmitted sequence of bits is retrieved by demodulation of the received signal.
  • a generally efficient design of receiver circuit is the direct conversion, or homodyne, radio receiver, in which the received carrier signal is directly downconverted to baseband, without use of any intermediate frequencies.
  • This architecture can be efficient in terms of cost, size and current consumption.
  • DC offset can arise in the baseband or radio parts of the transmitter, or, more commonly, in the baseband or radio parts of the receiver circuit. More specifically, the main causes of DC offset in the receiver are: transistor mismatch in the signal path; the local oscillator signal leaking into the received signal and self-downconverting to DC in the mixer; and a large near-channel interferer leaking into the local oscillator and self-downconverting to DC.
  • the DC offset signal can in fact be several dB larger than the magnitude of the information signal. It is thus apparent that the DC offset must be removed before the data can be satisfactorily recovered.
  • the purpose of synchronization is to find the position of the symbol in a received signal burst. This is made possible by transmitting a specific symbol pattern known as the training sequence within the burst.
  • the training sequence is known to the receiver. Then, the receiver can carry out a correlation between the received signal and the known training sequence, in order to find the synchronization position.
  • the training sequences used within the system are designed in such a way that the synchronization performance is optimised when the received burst is a filtered version of the transmitted symbols plus white noise.
  • a received radio signal is downconverted, low-pass filtered, and sampled in a radio receiver front-end circuit.
  • H [h(0) ,..., h(L)] is a complex valued vector representing the radio channel
  • U(t) [u(t),.., u(t-L)] is a complex valued representation of the transmitted symbol at time t, t-1,..., t-L.
  • the signal e(t) is assumed to be white noise.
  • the sampled signal y(t) is then supplied to a synchronization unit, that correlates the received burst with a training sequence, in order to find the synchronization position. Based on the found synchronization position, a channel estimation unit then estimates the coefficients H which define the radio channel. The estimated channel is then supplied to an equaliser that decodes the received data.
  • US-A-5 319 679 discloses a first stage DC estimation and a further refined procedure for obtaining an estimation to be removed from the next received frame.
  • GB-A-2 328 353 deals with DC offset correction in two phases wherein the coarse DC offset cancellation is done in the analog signal and a fine DC offset cancellation removes the residual DC offset before digital frequency shifting.
  • the present invention relates to a radio receiver and a method according to claim 1 and 9 that provide acceptable performance when the received signal includes a DC offset.
  • the DC offset component is estimated in two stages.
  • a coarse DC estimation is performed, and the estimate is removed from the received sequence. Then, a coarse synchronization is performed in order to estimate the synchronization position within the burst. Subsequently, a coarse channel estimation and a finer DC estimation are performed simultaneously, and the refined DC estimate is removed. Finally, a refined synchronization and channel estimation are performed, and the refined estimate of the channel is fed to an equaliser, which acts on the received signal, after removal of the refined estimate of the DC component.
  • FIG. 1 is a block diagram of a radio receiver in accordance with the invention.
  • a radio signal received by an antenna 2 is downconverted, low-pass filtered and sampled in a direct conversion radio receiver front-end circuit 4.
  • H [h(0), ..., h(L)] is a complex valued vector representing the radio channel
  • U(t) [u(t),..,u(t-L)] is a complex valued representation of the transmitted symbol at time t, t-1,..., t-L.
  • the signal e(t) is assumed to be white noise.
  • DC represents the unknown DC component generated either by the radio transmitter or the radio receiver.
  • R DC is the residual DC component. Note that R DC is symbol dependant and will vary from burst to burst. Using extended averaging, ideally over an infinite number of bursts, would provide a better estimate of the DC component. This is however not possible since the DC component varies from one burst to the other.
  • the signal ⁇ (t) is then fed to a first synchronization unit 12 that correlates the received burst with a training sequence (TS) in order to find a coarse synchronization position.
  • the calculated coarse synchronization position is then fed to a first channel estimation unit 14 that estimates the radio channel and the residual DC offset, i.e. the coefficients H and R DC simultaneously. This can be achieved using standard Least-Squares estimation techniques, by extending the channel model to include a DC tap.
  • the estimated residual DC component R ⁇ DC is then output from the channel estimation unit and subtracted from ⁇ (t) , in a second adder 16, giving a new signal ⁇ (t) .
  • the signal ⁇ (t) is then fed to a second synchronization unit 18 that correlates the received burst with the training sequence (TS) in order to find a better synchronization position.
  • the synchronization position is then fed to a second channel estimation unit 20, that estimates the radio channel, i.e. the coefficients H, in the same way as described before.
  • the estimated channel ⁇ 2 together with the signal ⁇ (t) is then fed to an equalizer 22 for further processing.
  • FIG. 2 shows an alternative embodiment of the invention.
  • an estimate of the Signal to Noise Ratio ( SN ⁇ R ) are fed from the first channel estimation unit 14 to a control unit 28 that decides whether or not the second synchronization and channel estimation are to be carried out. If the SNR is above a threshold, the second synchronization and channel estimation are performed. Otherwise, they are not. If so, the second synchronization and channel estimation are performed as described above. If not, the signal ⁇ (t) and the channel estimate ⁇ 1 are fed to the equalizer 22 that decodes the data.
  • FIG. 3 shows a further alternative embodiment of the invention.
  • phase offset i.e. a phase shift between transmitted symbols
  • This phase offset is introduced in order to facilitate implementation of the transmitter architecture.
  • the new cellular system EDGE Enhanced Data rates for GSM Evolution
  • phase shift phase offset
  • the received signal has to be de-rotated.
  • a de-rotation of a signal with a DC component gives a signal with a rotating DC component.
  • Figure 3 shows a suitable receiver for this situation. Again, components of the circuit of Figure 3 which correspond to those of Figure 1 are given the same reference numerals.
  • the first coarse DC estimation and DC subtraction are performed as described above.
  • the signal ⁇ 1 (t) is then de-rotated in a de-rotator 32 with a phase shift (- ⁇ ) corresponding to the offset ( ⁇ ) introduced in the transmitter.
  • the output ⁇ (t) from the de-rotator 32 is then fed to the first synchronization unit 12 that estimates a synchronization position.
  • This position is then fed to the channel estimation unit 14 that estimates the channel filter taps and the residual DC component, taking into account the rotating behaviour of the DC component. This can again be done by using standard Least-Squares estimation techniques.
  • the estimate of the residual DC offset is output to a rotation unit 34 that applies an appropriate rotation of the residual DC component, and it is subtracted from the signal ⁇ (t) , giving a signal ⁇ (t) .
  • the further processing of the signal ⁇ (t) is carried out as described above.
  • control unit that decides whether the second synchronization and channel estimation are to be carried out or not, as described with reference to Figure 2.
  • Figure 4 shows a further alternative embodiment of the invention.
  • the signal ⁇ (t) is calculated as before using averaging of the received samples over the burst.
  • Samples are then differentiated in a differentiator 42, i.e., ⁇ ( t ) - ⁇ ( t- 1) is calculated, and passed on to the synchronization unit 12 which estimates a first synchronization position.
  • the differentiation is used in order to reduce the impact of the DC step when doing the first synchronization.
  • the synchronization position is then fed to the channel estimation unit 44 together with the undifferentiated samples ⁇ .
  • the channel estimation unit now estimates the channel filter taps and the residual DC component, also taking the DC-step into account.
  • radio receivers which provide improved synchronization in the presence of a DC offset component.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Radio Relay Systems (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)

Abstract

L'invention concerne un récepteur à conversion directe dans lequel un décalage en continu est estimé en deux étages. Une estimation grossière de courant continu est effectuée, et l'estimation est éliminée de la séquence reçue. Une synchronisation grossière est ensuite effectuée afin d'estimer la position de synchronisation dans la rafale. Une estimation grossière de canal et une estimation affinée de courant continu sont ensuite effectuées simultanément, et l'estimation affinée de courant continu est éliminée. Des estimations affinées de synchronisation et de canal sont alors effectuées, et l'estimation affinée du canal est fournie à un égaliseur qui agit sur le signal reçu, après élimination de l'estimation affinée du composant de courant continu.

Claims (16)

  1. Récepteur radio, comprenant :
    un circuit d'extrémité avant (4) pour échantillonner un signal reçu de façon à produire un signal reçu échantillonné contenant un décalage en courant continu ;
    un premier circuit d'estimation de décalage (8), pour produire une première estimation du décalage en courant continu par rapport au signal reçu échantillonné ;
    un premier soustracteur (10), pour soustraire la première estimation du décalage en courant continu du signal reçu échantillonné afin de produire un premier signal échantillonné estimé ;
    un premier circuit de détection de synchronisation (12), pour estimer une position de synchronisation du premier signal échantillonné estimé;
    caractérisé par:
    un premier estimateur de canal (14), pour produire une première estimation de canal en fonction de la position de synchronisation estimée ;
    un deuxième circuit d'estimation de décalage (14), pour produire une deuxième estimation du décalage en courant continu par rapport au premier signal échantillonné estimé, après estimation de la position de synchronisation ; et
    un deuxième soustracteur (16), pour produire un deuxième signal échantillonné estimé à l'aide du premier signal échantillonné estimé et de la deuxième estimation du décalage en courant continu.
  2. Récepteur radio selon la revendication 1, dans lequel le premier signal échantillonné estimé contient un décalage en courant continu résiduel, le deuxième circuit d'estimation de décalage étant adapté pour produire une estimation du décalage en courant continu résiduel, et le deuxième soustracteur étant adapté pour produire le deuxième signal échantillonné estimé en soustrayant l'estimation du décalage en courant continu résiduel du premier signal échantillonné estimé.
  3. Récepteur radio selon la revendication 1, comprenant de plus :
    un deuxième circuit de détection de synchronisation (18), pour estimer une position de synchronisation du deuxième signal échantillonné estimé ;
    un deuxième estimateur de canal (20), pour produire une deuxième estimation de canal en fonction de la deuxième position de synchronisation estimée ; et
    un égaliseur (22), pour traiter le deuxième signal échantillonné estimé en fonction de la deuxième estimation de canal.
  4. Récepteur radio selon la revendication 3, comprenant de plus :
    une unité de commande (28), pour déterminer si oui ou non il faut appliquer des signaux au deuxième circuit de détection de synchronisation et au deuxième estimateur de canal en fonction d'une estimation de la qualité du signal.
  5. Récepteur radio selon la revendication 4, dans lequel le premier estimateur de canal est adapté pour estimer la qualité du signal, et l'unité de commande est adaptée pour déterminer que des signaux sont appliqués au deuxième circuit de détection de synchronisation et au deuxième émetteur de canal uniquement lorsque la qualité du signal estimé dépasse un seuil.
  6. Récepteur radio selon la revendication 4, dans lequel, si l'unité de commande détermine qu'il ne faut pas appliquer de signaux au deuxième circuit de détection de synchronisation et au deuxième estimateur de canal, l'égaliseur est adapté pour utiliser la première estimation de canal pour traiter le deuxième signal échantillonné estimé.
  7. Récepteur radio selon la revendication 1, comprenant de plus:
    un dérotateur (32), pour appliquer une rotation négative au premier signal échantillonné estimé ; et
    un rotateur (34), pour appliquer une rotation à la deuxième estimation du décalage en courant continu.
  8. Récepteur radio selon la revendication 1, comprenant de plus :
    un différentiateur (42), pour calculer une valeur différentielle du premier signal échantillonné estimé, avant l'application de celui-ci au premier circuit de synchronisation, et
    un estimateur de pas (44), pour estimer une valeur d'un pas de courant continu dans le signal reçu,
    dans lequel le deuxième soustracteur est conçu pour soustraire l'estimation de la valeur du pas de courant continu du premier signal échantillonné estimé.
  9. Procédé de traitement d'un signal reçu, comprenant:
    l'échantillonnage du signal reçu de façon à produire un signal reçu échantillonné contenant un décalage en courant continu ;
    la production d'une première estimation du décalage en courant continu par rapport au signal reçu échantillonné ;
    la soustraction de la première estimation du décalage en courant continu du signal reçu échantillonné de façon à produire un premier signal échantillonné estimé ;
    l'estimation d'une position de synchronisation du premier signal échantillonné estimé ;
    caractérisé par :
    la production d'une première estimation de canal en fonction de la position de synchronisation estimée ;
    la production d'une deuxième estimation du décalage en courant continu par rapport au premier signal échantillonné estimé après l'estimation de la position de synchronisation ; et
    la production d'un deuxième signal échantillonné estimé à l'aide du premier signal échantillonné estimé et de la deuxième estimation du décalage en courant continu.
  10. Procédé selon la revendication 9, dans lequel le premier signal échantillonné estimé contient un décalage en courant continu résiduel, comprend la production d'une estimation du décalage en courant continu résiduel, et la production du deuxième signal échantillonné estimé par soustraction de l'estimation du décalage en courant continu résiduel du premier signal échantillonné estimé.
  11. Procédé selon la revendication 9, comprenant de plus :
    l'estimation d'une position de synchronisation du deuxième signal échantillonné estimé ;
    la production d'une deuxième estimation de canal en fonction de la deuxième position de synchronisation estimée ; et
    le traitement du deuxième signal échantillonné estimé dans un égaliseur en fonction de la deuxième estimation de canal.
  12. Procédé selon la revendication 11, comprenant de plus :
    la détermination du fait que oui ou non il faut estimer la position de synchronisation du deuxième signal échantillonné estimé et produire la deuxième estimation de canal, en fonction d'une estimation de la qualité du signal.
  13. Procédé selon la revendication 12, comprenant l'estimation de la qualité du signal, et la détermination du fait que la position de synchronisation du deuxième signal échantillonné estimé doit être estimée, et que la deuxième estimation de canal doit être produite, uniquement lorsque la qualité du signal estimé dépasse un seuil.
  14. Procédé selon la revendication 12, comprenant, s'il est déterminé qu'il ne faut pas estimer la position de synchronisation du deuxième signal échantillonné estimé ou qu'il faut produire la deuxième estimation de canal :
    le traitement du deuxième signal échantillonné estimé dans un égaliseur en fonction de la première estimation de canal.
  15. Procédé selon la revendication 9, comprenant de plus :
    l'application d'une rotation négative au premier signal échantillonné estimé ; et
    l'application d'une rotation à la deuxième estimation du décalage en courant continu.
  16. Procédé selon la revendication 9, comprenant de plus :
    le calcul d'une valeur différentielle du premier signal échantillonné estimé, avant l'application de celui-ci au premier circuit de synchronisation,
    l'estimation d'une valeur d'un pas de courant continu dans le signal reçu, et
    la soustraction de l'estimation de la valeur du pas de courant continu du premier signal échantillonné estimé.
EP00975914A 1999-10-29 2000-10-25 Recepteur radio a deux etages de correction de decalage en continu, de synchronisation et d'estimation de canal Expired - Lifetime EP1228611B1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
GB9925631A GB2355900B (en) 1999-10-29 1999-10-29 Radio receiver
GB9925631 1999-10-29
PCT/EP2000/010519 WO2001033792A1 (fr) 1999-10-29 2000-10-25 Recepteur radio a deux etages de correction de decalage en continu, de synchronisation et d'estimation de canal

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Publication Number Publication Date
EP1228611A1 EP1228611A1 (fr) 2002-08-07
EP1228611B1 true EP1228611B1 (fr) 2007-05-30

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Country Link
US (1) US6711393B1 (fr)
EP (1) EP1228611B1 (fr)
JP (1) JP4536985B2 (fr)
CN (1) CN1154310C (fr)
AR (1) AR030535A1 (fr)
AT (1) ATE363797T1 (fr)
AU (1) AU1387101A (fr)
CO (1) CO5300373A1 (fr)
DE (1) DE60035060T2 (fr)
ES (1) ES2284540T3 (fr)
GB (1) GB2355900B (fr)
MY (1) MY126985A (fr)
WO (1) WO2001033792A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101447958B (zh) * 2008-12-30 2011-05-11 清华大学 一种调制器性能的测量方法和装置

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6941121B2 (en) * 2001-05-18 2005-09-06 Rf Micro Devices, Inc. Method for calibrating a DC offset cancellation level for direct conversion receivers
US7349680B2 (en) * 2002-04-29 2008-03-25 Broadcom Corporation Method and system for using PSK sync word for fine tuning frequency adjustment
KR100984405B1 (ko) * 2002-11-20 2010-09-29 텔레호낙티에볼라게트 엘엠 에릭슨(피유비엘) 통신 채널을 통하여 수신된 통신 신호 내의 dc 오프셋을 결정하는 방법, 통신 채널을 통하여 수신된 통신 신호 내의 dc 오프셋을 보상하는 방법, 통신 채널을 통하여 수신된 통신 신호 내의 dc 오프셋을 결정하는 장치, 및 수신기
US7342979B2 (en) 2002-12-09 2008-03-11 Broadcom Corporation Incremental redundancy support in a cellular wireless terminal having IR processing module
EP1429487A3 (fr) 2002-12-09 2005-07-20 Broadcom Corporation Structure de mémoire pour redondance incrémentale dans un système EDGE et gestion de mémoire
US20060141972A1 (en) * 2003-02-20 2006-06-29 Nec Corporation Signal processing device and direct conversion reception device
US7342956B2 (en) 2003-06-16 2008-03-11 Broadcom Corporation System and method to extract uplink status flag bits in a cellular wireless network
US7406139B2 (en) 2003-06-16 2008-07-29 Broadcom Corporation System and method to identify a modulation format of a data frame within a cellular wireless network
US7068735B2 (en) 2003-06-16 2006-06-27 Broadcom Corp. System and method to perform DC compensation on a radio frequency burst in a cellular wireless network
US7352720B2 (en) 2003-06-16 2008-04-01 Broadcom Corporation System and method to determine a bit error probability of received communications within a cellular wireless network
US7107080B2 (en) 2003-06-16 2006-09-12 Broadcom Corporation System and method to conduct idle mode paging channel monitoring within a cellular wireless network
US7203461B2 (en) 2003-06-16 2007-04-10 Broadcom Corporation Adaptive channel quality estimation algorithm to support link adaptation
US7277688B2 (en) * 2003-06-17 2007-10-02 Broadcom Corporation DC offset correction for very low intermediate frequency receiver
US7289583B2 (en) * 2003-10-14 2007-10-30 Telefonktiebolagel Lm Ericsson (Publ) Method of and apparatus for single antenna interference rejection through relaxation
US7212593B2 (en) * 2003-10-14 2007-05-01 Telefonaktiebolaget Lm Ericsson (Publ) Method of and apparatus for noise whitening filtering
US7457379B2 (en) 2003-10-16 2008-11-25 Broadcom Corporation Adaptive multi-step combined DC offset compensation for EDGE 8-PSK
US7366475B2 (en) * 2004-06-04 2008-04-29 Telefonaktiebolaget Lm Ericsson (Publ) Signal strength measurements in cellular telecommunication systems
GB0419487D0 (en) * 2004-09-02 2004-10-06 Ttp Communications Ltd DC estimation in received signals
US7817757B2 (en) * 2006-05-30 2010-10-19 Fujitsu Limited System and method for independently adjusting multiple offset compensations applied to a signal
CN100492026C (zh) * 2006-12-04 2009-05-27 北京中星微电子有限公司 一种去直流电能计量电路和去直流电路
KR20130104289A (ko) * 2012-03-13 2013-09-25 삼성전자주식회사 오프셋 값을 추정하는 장치, 방법, 수신장치 및 수신장치에서 신호를 처리하는 방법

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2738279C3 (de) * 1977-08-25 1980-03-13 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren und Anordnung zum Ableiten eines Empfangstaktes
US5241702A (en) 1990-09-06 1993-08-31 Telefonaktiebolaget L M Ericsson D.c. offset compensation in a radio receiver
US5319679A (en) 1992-12-09 1994-06-07 Datum Systems Method and apparatus for recovering data from a radio signal
GB2274759B (en) * 1993-02-02 1996-11-13 Nokia Mobile Phones Ltd Correction of D.C offset in received and demodulated radio signals
US5724653A (en) * 1994-12-20 1998-03-03 Lucent Technologies Inc. Radio receiver with DC offset correction circuit
US5798724A (en) 1996-02-14 1998-08-25 Harris Corporation Interpolating digital to analog converter architecture for improved spurious signal suppression
JP3486058B2 (ja) * 1996-06-24 2004-01-13 株式会社東芝 Ｄｃオフセット除去機能を備えた受信機
US5838735A (en) * 1996-07-08 1998-11-17 Telefonaktiebolaget Lm Ericsson Method and apparatus for compensating for a varying d.c. offset in a sampled signal
JPH1041992A (ja) * 1996-07-24 1998-02-13 Nippon Telegr & Teleph Corp <Ntt> 準同期検波復調装置
DE69720414T2 (de) 1996-10-08 2004-01-08 Harris Corp., Melbourne Verfahren und einrichtung zum ausgleich von gleichspannungsverschiebungen und wiederherstellen der niederfrequenten komponenten eines basisbandsignals
JP2993443B2 (ja) 1996-10-31 1999-12-20 日本電気株式会社 通信装置
FI101919B1 (fi) 1996-11-21 1998-09-15 Nokia Telecommunications Oy Menetelmä impulssivasteen laskemiseksi ja vastaanotin
EP0895385A1 (fr) 1997-07-29 1999-02-03 Alcatel Réduction du décalage continu pour réception en mode rafale
GB2328353B (en) 1997-08-16 2002-10-02 Nec Technologies GSM mobile receiver
JP3095067B2 (ja) 1997-12-04 2000-10-03 日本電気株式会社 Ｄｃオフセットキャンセラーおよびこれを備えた受信機と通信システムとｄｃオフセットキャンセル方法
EP0948128B1 (fr) * 1998-04-03 2004-12-01 Motorola Semiconducteurs S.A. Annulation de décalage DC dans un récepteur à quadrature
KR100314353B1 (ko) * 1998-04-28 2001-12-28 전주범 직교분할대역수신시스템
EP0964557A1 (fr) * 1998-06-12 1999-12-15 Lucent Technologies Inc. Récepteur à compensation de tension continue de décalage
US6426972B1 (en) * 1998-06-19 2002-07-30 Nxtwave Communications Reduced complexity equalizer for multi mode signaling
US6263030B1 (en) * 1998-07-01 2001-07-17 Ericsson Inc. Equalizer with channel tracker switching
US6151328A (en) * 1998-12-31 2000-11-21 Lg Information & Communications Ltd. Apparatus and method for controlling power in code division multiple access system
US6504884B1 (en) * 1999-05-12 2003-01-07 Analog Devices, Inc. Method for correcting DC offsets in a receiver
US6463105B1 (en) * 1999-09-13 2002-10-08 Ericsson Inc. Methods and systems for estimation of the carrier to interference ratio for a wireless communication channel
US20020173286A1 (en) * 2001-04-06 2002-11-21 Bengt Lindoff Radiocommunication employing selected synchronization technique

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
None *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101447958B (zh) * 2008-12-30 2011-05-11 清华大学 一种调制器性能的测量方法和装置

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AU1387101A (en) 2001-05-14
ATE363797T1 (de) 2007-06-15
EP1228611A1 (fr) 2002-08-07
GB9925631D0 (en) 1999-12-29
US6711393B1 (en) 2004-03-23
MY126985A (en) 2006-11-30
DE60035060T2 (de) 2008-01-24
WO2001033792A1 (fr) 2001-05-10
DE60035060D1 (de) 2007-07-12
GB2355900B (en) 2004-03-17
CO5300373A1 (es) 2003-07-31
CN1154310C (zh) 2004-06-16
JP4536985B2 (ja) 2010-09-01
JP2003513542A (ja) 2003-04-08
AR030535A1 (es) 2003-08-27
ES2284540T3 (es) 2007-11-16
CN1385018A (zh) 2002-12-11
GB2355900A (en) 2001-05-02

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