Classifications

• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
  • H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
  • H04N25/46—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by combining or binning pixels
• • H—ELECTRICITY
  • H04—ELECTRIC COMMUNICATION TECHNIQUE
  • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
  • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
  • H04N25/70—SSIS architectures; Circuits associated therewith
  • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
  • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
  • H04N25/778—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising amplifiers shared between a plurality of pixels, i.e. at least one part of the amplifier must be on the sensor array itself

Definitions

• the present invention relates to image sensor cell array architecture generally and, in particular, to a multi-photodetector unit cell and control thereof.
• Image sensors have traditionally used either photodiodes, either alone or in combination with active transistor element, or charge couple device (CCD) technology.
• CCD charge couple device
• the CCDs have many advantages, such as small pixel size, high sensitivity, and the ability to generate high-fidelity images. They also have many disadvantages, such as special manufacturing process requirements, high power dissipation, inability to integrate on the same chip additional functionality such as driving the processing, and complicated control circuitry. Furthermore, CCDs are manufactured by just a few manufacturers, and are not broadly accessible by independent design houses.
• CMOS Complementary Metal Oxide Semiconductor
• APS active pixel sensor
• CMOS Complementary Metal Oxide Semiconductor
• One of the main goals to be accomplished in the APS design is a small pixel, comparable in size to the one accomplished with CCDs, with a high signal to noise ratio. This is difficult since the APS unit cell incorporates several active transistors.
• the signal-to-noise ratio requirement dictates the collection of as many photon-generated electrons as possible over the integration capacitor. This requires long integration time for weak photocurrents, and sizable capacity pixel-space-consuming capacitors.
• Amorphous silicon photoconductor, photodiode, or phototransistor This endeavor produces a reduced unit cell size and improved fill factor through photodetector vertical integration on top of the active readout circuit.. The quantum efficiency is close to 100%, and the dark current is lower in comparison to the dark current accomplished with the single-crystal material. However, due to material charge trapping and structure irregularities, the amorphous silicon based photodetectors suffer from high fixed pattern noise (FPN).
• FPN fixed pattern noise
• Backside-illuminated photodetectors In this technology, whether CCDs or APS-based, the sampling and readout is located on the front side, and the photodetector occupies the backside of the image sensor. The image sensor is illuminated from its backside. Therefore, the fill factor, and quantum efficiency of nearly 100%, can be accomplished.
• CMD Charge modulation devices
• Passive photodiode-detector image sensors These image sensors use photodiodes as the sensing elements. Passive photodiode-based pixel elements were investigated in the 1960s. These pixels are very simple; they incorporate a single diode and a single transistor. The passive pixel design allows the highest fill factor for a given pixel size, or the smallest pixel size for a given fill factor.
• Active-pixel photodiode-based image sensors Photodiode-based APS image sensors feature a high quantum efficiency for the red, the green and even for the blue-wavelength photons.
• the name "active pixel sensor” originates from its having at least one active transistor incorporated in every unit cell. The transistor performs an amplification or buffering function. There are many types of active circuits.
• the simple ones incorporate up to three transistors in the unit cell.
• the APS photodetectors are limited in their fill factor per fixed unit cell size, or are limited in the minimum cell size per fixed fill factor. It is a major objective to reduce the overall unit cell complexity, to accomplish high-resolution, a high fill factor and a high quantum efficiency. Interestingly enough, small pixels result in a reduced readout noise and speed improvement, due to a reduced column capacitance. Although designs with a minimal number of transistors and very small pixels have been reported (5.6 X 5.6 ⁇ m), these designs also feature a very small fill factor (15.8%).
• Active-pixel photogate-type image sensors The basic concept behind this circuit is to combine the sensing and charge storage functions.
• the front-side light-illuminated transistor collects charge proportional to light-intensity below the gate.
• the charge collected and stored below the photogate is transferred to the floating diffusion node.
• the floating diffusion is tied to the source follower circuit input.
• the source follower buffers the floating diffusion from the high capacitance array column.
• the photogate pixel design incorporates five transistors including the photogate sensing/charge-storage device.
• the low readout noise and lack of image lag demonstrated by the photogate structure have stirred a lot of interest and have resulted in significant research effort directed at the improvement of the photogate-based design.
• Relatively small pixels have been developed (10 X 10 ⁇ m using the 0.5 ⁇ m CMOS process technology). However, this approach demonstrates however low quantum efficiency for the blue light wavelength photons, which are absorbed by the polysilicon-plated photogate.
• the ability to modify the image sensor's resolution is defined as multi-resolution.
• the application of multi-resolution has been justified by the ability to trade high resolution for the increase of the video frame rate and the image processing.
• the multi-resolution approach makes it possible to trade the resolution for signal-to-noise ratio. This is especially crucial in low light conditions, when the electrical signal proportional to the light intensity may be quite weak. This results in a noisy, low-quality image. Sometimes it is preferable to get a lower resolution but less-noisy image.
• the second method as described by Zhimin Zhou et al "Frame-Transfer CMOS Active Pixel Sensor with Pixel Binning", IEEE Trans Elec Dev , Vol 44, No 16, Oct 1997, pp 1764 - 1768, enables the summation of the accumulated charge in several pixels
• the accumulated charge summation is performed first by sampling the charge accumulated during charge integration into a memory cell, and second, by summing up the transferred charge on vertical and horizontal charge integration amplifiers (CIAs) Since, the charge summation is linear, while the noise sums up as a square root of the noise energies, the pixel charge summation yields an improvement in the signal-to-noise ratio
• a multi-cell cluster that may include a plurality of light-detecting unit cells and a circuit Typically, each of the cells produces charge representative of the detected light
• the circuit may be shared by the plurality of unit cells, and used to read-out the charge in real-time
• the cluster may also include a switch associated with each unit cell, such that each switch connects its associated unit cell to the circuit
• the switch may also be controlled in a time-multiplexing manner
• Each unit cell may include either a photodetector, a photodiode, or a photogate
• the circuit may include a shared storage device, a shared reset circuit, or a readout circuit.
• the shared storage device may be for accumulating the charge in the focal plane
• a sensing array including a multiplicity of clusters, sampling lines and sensing lines.
• the clusters may include a plurality of unit cells and a circuit.
• the unit cells may detect light, and produce charge representative of that light.
• the circuit may be shared by the unit cells and may control the operation of the unit cells.
• the circuit may also accumulate the charge.
• Each sampling line may be connected to a row of clusters for sampling the accumulated charge in the row.
• Each sensing line may be connected to a column of clusters for sensing the sampled charge present in the columns.
• the sampling and the sensing lines may also carry programming signals for controlling the plurality of unit cells.
• a method for operating an image sensor includes the steps of integrating charge from one or more unit cells of a cluster and, during the step of integrating, summing charge from at least one of the unit cells in the focal plane.
• the method may also include reading out the summed charge.
• One or more of the unit cells may be preprogrammed unit cells, and the step of reading out may include reading out the summed charge in real time.
• the step of integrating may include the step of integrating in a time-multiplexing manner, or may include the step of integrating charge from each unit cell separately.
• the step of integrating may include the step of simultaneously integrating charge from two or more of the unit cells, or may include the step of simultaneously integrating charge from all of the unit cells in the cluster.
• the method may include the step of combining the readout into a single image.
• the method may further include the step of dynamically controlling selection of the number of unit cells for the step of charge integrating, and this step of dynamically controlling may include the step of selecting the number of unit cells depending on the light conditions. All of the steps may be performed in real-time. Also included in the method may be the step of improving the signal-to-noise ratio of the image sensor by increasing the number of cells in the step of charge integrating. This is done in order to linearly increase the amount of summed charge while the noise increases moderately as a square root function. The method may further include a step of improving the resolution of the image sensor by reading-out each cell separately, in a time-multiplexing manner.
• Fig. 1 illustrates an active pixel sensor (APS) image sensor architecture implemented on a monolithic piece of a semiconductor material, constructed and operative in accordance with a preferred embodiment of the present invention
• Fig 2 is a schematic illustration of a four-photodetector unit cell based upon a direct injection (Dl) circuit and is used with the architecture of Fig. 1 ;
• Fig 3 is a schematic illustration of a four-photodetector unit cell similar to that of Fig. 2 and operational with opposite polarity signals;
• Fig. 4 is a schematic illustration of an alternative four-photodetector unit cell based upon N-channel type photogate transistors;
• Fig. 5 is a timing diagram of individual control signal timing sequences when implemented with the architecture illustrated in Fig. 1 ;
• Fig. 6 is a timing diagram of control signal timing sequence for simultaneously sampled horizontal photodetector pairs
• Fig. 7 is a timing diagram of control signal timing sequence for simultaneously sampled vertical photodetector pairs.
• Fig. 8 is a timing diagram of control signal timing sequence for simultaneously sampled photodetector quadrants. DETAILED DESCRIPTION OF THE PRESENT INVENTION
• the present invention discloses a multi-resolution sensor, which utilizes time multiplexing to vary charge summation of a cluster of unit cells.
• the clusters are supported by shared simple circuitry, which implements the charge collection and time multiplexing, thus eliminating the need for complicated charge summation circuitry.
• the novel multi-resolution sensor enables implementation of smaller pixel size and improved pixel fill factor.
• the present method enables selection of a per-scene-illumination optimal compromise between the image sensor's resolution on the one hand and signal-to-noise and sensitivity on the other.
• FIG. 1 an illustration of an active pixel sensor (APS) 10 comprising an array 8, a line decoder 16, and a sense amplifiers/readout multiplexer 18.
• Array 8 comprises a multitude of multi-photodetector clusters 12.
• Each cluster 12 comprises n unit cells 14.
• Array 8 further comprises a multitude of column-sense lines, designated ColSense 1 to H, and a multitude of read-row lines, designated RdRw 1 to V. Each line carries associated signals, i.e. the read-row lines RdRw carry read-row signals RdRw. Charge integration, or exposure, of unit cells 14 is controlled by an associated integration signal Int carried by an integration line, designated Int.
• the clusters 12 are arranged in array 8 in H-columns by V-rows.
• the read-row line RdRw is shared between the unit cells 14 in adjacent rows, such as in rows i, and i+1 , and is therefore double-indexed.
• the column-sense line ColSense jJ+1 is shared between photodetector cells connected to columns j and j+1 , and is also double-indexed. This pairing of elements provides additional space saving benefits.
• Fig. 2 a schematic diagram of one possible embodiment for cluster 12 and useful in understanding the present invention.
• Each unit cell 14 comprises an associated photodetector 22 and an associated transistor 24 Typically the operations of cluster 12 are based on direct injection circuitry
• clusters 12 comprise four unit cells 14, generally designated 14A to 14D
• clusters 12 could comprise alternative pluralities of unit cells 14, such as 8 or 16 pixels, and still comply with the principles of the present invention
• unit cells 14A to 14D and their associated elements are designated A - D, accordingly
• the integration charge as accumulated by the group of unit cells 14 is summed up either individually or in any combination, thus offering the ability to select an optimal balance between resolution and signal-to-noise ratio / sensitivity Operation of cluster 12 is described hereinbelow
• Cluster 12 all of the four unit cells 14 are clustered to share a single reset/readout circuit 27
• Circuit 27 comprises a reset transistor 26, an integration capacitor 28, and a readout transistor 30 This reduces on average by a factor of four the number of readout transistors per single transistor 24, and contributes to a smaller pixel pitch, and/or a greater fill factor per unit cell 14, and/or a larger integration capacitor It is thus noted that clusters 12 provide the advantage of being relatively simple with space savings resulting from two measures shared charge-integration/readout circuitry and shared readout/sense lines
• Fig. 3 illustrates an alternative cluster 112 comprising unit cells 1 14. In contrast to Fig. 2, the unit cells 114 of Fig.
• Cluster 212 comprises four unit cells 214, reset transistor 26, buffer 108 and readout transistor 30. Each such unit cell 214 comprises an associated photogate sensors 102 and N-channel type transistors 104,
• the four photogates 102 share the single, reset, source follower buffer 108, and the readout transistor 30, which reduces the average number of transistors per photogate sensor 102.
• sensing of an image on the level of sensor 10 is as follows: A series of associated integration signals Int are applied to clusters
• cluster 12 the operations of cluster 12 are as described below. It is noted that the operations for clusters 112 and 212 (Fig.3 and 4, respectively) are similar and are included within the principles described below.
• the sequence of the Fig. 2 image sensing and readout cycle on the level of cluster 12 is as follows: The cycle starts by driving the reset signal Rst, thus causing the reset transistor 26 to conduct and capacitor 28 to flush any residue charge originating in the previous cycle.
• Photodetectors 22 being exposed to light, transmit associated photocurrents l ph , generally designated l P h-A o l ph -D.
• the associated integration signals Int-A to Int-D are applied to their associated transistors 24, opening the associated transistors 24, thus allowing flow of photocurrent l ph from the associated photodetectors 22.
• Transistor 24 acting as a common gate amplifier, isolates the associated photodetector 22 from capacitor 28, and provides photocurrent l ph unaffected by the voltage changes in the capacitor 28. Transistors 24 additionally transduce the photocurrent l ph from the photodetector 22 into the capacitor 28.
• the charge integration cycle is terminated when the integration signal Int signal goes high, cutting off the associated transistors 24 and restricting flow of photocurrent l PH .
• Read-row signal RdRw goes high, causing readout transistor 30 to conduct and read out the accumulated charge on integration capacitor 28. Conduction of readout transistor 30 enables the capacitor 28 to transfer the accumulated charge over the column sense line ColSense to a sense amplifier (not shown). The cycle is then repeated, starting with flushing of the capacitor 28.
• transistor 26 is optional, since the reset function can be alternatively performed through the readout transistor 30. It is further noted that for some readout circuits, the residue charge left on capacitor 28 may be negligible; however, preferably the residue charge is flushed prior to the next integration sub-cycle.
• the image sensing cycle comprises equal length sub-cycles.
• Each sub-cycle comprises reset, charge integration and readout for the associated unit cell 14. Therefore, there is one sub-cycle for unit cell 14A, one sub-cycle for unit cell 14B, and so on, for a total of 4 sub-cycles. It is noted that depending on the setting of cluster 12, it is possible to program the duration and the number of the sub-cycles. This programming capability allows varying the duration and content of the sub-cycles by varying the charge integration sampling of the unit cells 14. It is thus also possible to vary the number of sub-cycles per cycle.
• each of the four unit cells 14 can be individually sampled (individual sub-cycle) for a total of 4 sub-cycles per cycle.
• the four unit cells 14 can be sampled in pairs (dual sub-cycle) for a total of 2 sub-cycles per cycle,
• all four unit cells 14 can sampled simultaneously (simultaneous sub-cycle) for a total of 1 sub-cycle per cycle.
• Each sampling rate provides different levels of resolution and sensitivity.
• the highest resolution but lowest sensitivity is achieved with individual sub-cycles, and the lowest resolution and highest sensitivity is achieved with simultaneous sub-cycles. It is noted that if cluster 12 were to comprise more unit cells 14, such as 6 or 8 or 16, the number of sub-cycles and resultant imaging performances would vary accordingly.
• Fig. 2 the following is a model of exemplary operation of individual sub-cycles (separate sampling of each unit cell 14).
• the integration signals Int-B, Int-C, and Int-D signals are driven high, cutting off photocurrent flow from transistors 24B to 24D.
• integration signal Int-A is pulled to the V i as voltage or low level, allowing transistor 24A to conduct.
• Photocurrent Ip h - A flows from photodetector 22A through the associated transistor 24A, and is accumulated in capacitor 28. Integration signal Int-A signal then goes high, cutting off the transistor 24A. The accumulated charge on capacitor 28 is then read-out.
• the next sub-cycle is then executed, this time with integration signals Int-A, Int-C, and Int-D being driven high, and integration signal Int-B pulled to low, and so on for unit cells 14C and 14D, until all four unit cells 14 have completed their respective sub-cycle and the sampling and readout of the entire image sensor 10 is complete.
• each photogate 102 accumulates its charge on its own associated capacitor (not shown) Therefore, since all the photogates 102 may collect charge, the charge-integration time is not compromised as the result of time-multiplexed sampling/readout
• Cluster 212 is also capable of multiresolution, as described hereinbelow with reference to Figs 5 - 8, however, for cluster 212 the integration time is fixed The improvement in the signal-to-noise ratio is proportional to the number of simultaneously sampled photogates The resolution is reduced by the same factor Timing Diagrams
• Fig 5 a timing diagram depicting individual sub-cycles for each of the four-unit cells 14, and useful in understanding the operation of the embodiment depicted in Fig 2
• photocurrent l ph from transistor 22A is denoted as photocurrent l ph _ A
• photocurrent for general explanation purposes is denoted as photocurrent lph-
• Fig. 5 depicts four sub-cycles, labeled T A , T B , Tc and T D , respectively.
• T the associated unit-cell 14 runs through an entire cycle of reset, sampled and read out.
• photodetector 22A is reset, sampled and read out, and so on.
• Fig. 5 additionally depicts the timing of the reset signal Rst, the four integration signals Int-A to Int-D, a capacitor photocurrent lc, a capacitor voltage V c , and the four read-row signals RdRW A - D respectively.
• the cycle depicted in Fig. 5 starts at point 42 with sub-cycle T A .
• reset signal Rst is pulled to high, causing discharge of integration capacitor 28. It is noted that when reset signal Rst is high, all the other signals (Integration and ReadRow) are low.
• the reset signal Rst also drives capacitor 28 into a deep depletion state, as noted by drop of capacitor voltage V c .
• the Reset signal Rst then goes low, switching off transistor 26.
• Charge integration sub-period T jnt -A starts when the integration signal Int-A levels to voltage V i as , causing transistor 24A to operate as a common gate preamplifier, allowing photocurrent l ph-A from photodetector 22A to flow into the capacitor 28 for a charge integration sub-period T int -A. It is noted that concurrently, integration signals Int-B to Int-D remain high, restricting flow from photodetector 22B to 22D. Thus, since photocurrent l ph flows only from transistor 22A, during charge integration sub-period T l ⁇ t . A , the capacitor photocurrent l c is equal to photocurrent l P h-A- Additionally, assuming that the integration capacitor 28 is linear and does not vary with voltage, the capacitor's voltage V c rises linearly in time, as noted by slope 48.
• Steps as performed for sub-cycle T A are repeated for sub-cycle T B through T D , with the appropriate signals for the associated unit cells 14.
• the integration period T, nt and readout period T rd for all the photodetectors 22 in cluster 12 is identical, unless the image sensor enables individual tuning of the charge integration time for each unit cell 14.
• the resolution and signal-to-noise ratio as produced by the embodiment illustrated in Fig 5 is not equivalent to that depicted in Fig 6 Since the signal-to-noise ratio improves as a square root of the integration time while the integration time more than doubles (due to halved readout time for the same frame rate), and the photocurrent signal more than doubles in Fig 6 as compared to Fig 5, the dual signal-to-noise ratio improves by more than 2 times for the dual integration than for the individual signal-to-noise ratio
• Ip h - j is the individual current flowing from the j-th photodetector into capacitor, i n is the total, current noise originating from photodetector, i n - j is the j-th photodetector current noise, and
• K is the number of the simultaneously conducting photodetectors. It is noted that the above formula assumes that the photodetector originated noise is dominant, while other types of noise sources, such as the reset noise and 1/f noise originating from the switching transistor, are negligible. If the signal-to-noise ratio is defined as:
• V — x T (7) c C, ,nt
• T A is the sub-cycle of photodetector A
• T ⁇ nt-A is the integration period for photodetector A
• T rd-A is the readout time for photodetector A.
• equation (4) By evaluating equation (4), it is noted that when going from individual sub-cycles to dual sub-cycles, the signal-to-noise ratio improves as a square root of the integration time, and the photocurrent signal is doubled. If equation (4) and (12 ) are solved, and the signal-to-noise ratio for dual sub-cycles is solved for then:

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