EP1160642B1 - Circuit de limitation de courant - Google Patents

Circuit de limitation de courant Download PDF

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Publication number
EP1160642B1
EP1160642B1 EP01109666A EP01109666A EP1160642B1 EP 1160642 B1 EP1160642 B1 EP 1160642B1 EP 01109666 A EP01109666 A EP 01109666A EP 01109666 A EP01109666 A EP 01109666A EP 1160642 B1 EP1160642 B1 EP 1160642B1
Authority
EP
European Patent Office
Prior art keywords
current
fet
load
current mirror
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP01109666A
Other languages
German (de)
English (en)
Other versions
EP1160642A1 (fr
Inventor
Jürgen Dr.-Ing. Boldt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IDT Europe GmbH
Original Assignee
Zentrum Mikroelektronik Dresden GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zentrum Mikroelektronik Dresden GmbH filed Critical Zentrum Mikroelektronik Dresden GmbH
Publication of EP1160642A1 publication Critical patent/EP1160642A1/fr
Application granted granted Critical
Publication of EP1160642B1 publication Critical patent/EP1160642B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/262—Current mirrors using field-effect transistors only

Definitions

  • the load current path is performed as a series connection of a current source resistor, a load current control FET, and the load.
  • a differential amplifier is switched so that one input of the differential amplifier, a reference voltage, the other input evaluates the voltage potential, which has set over the current source resistance, and at the output, the amplified differential signal through the gate of the load current control FET controls the load current.
  • the current source resistance is dimensioned so that when applied maximum load current in the load current path of the load current control FET starts with the load current limit.
  • a reference current of a reference current source is reflected in the additional second current mirror.
  • the mirrored reference current flows across the second current path of the second current mirror and impresses the current in the current mirror control path of the first current mirror.
  • a first differential amplifier evaluates the connection-side potential conditions at the first and second current paths of the second current mirror and controls with its output to the common gates of the current mirror transistors of the first current mirror.
  • a second differential amplifier evaluates the connection-side potential relationships on the load current path and current mirror control path of the first current mirror and controls with its output a voltage control unit on the current mirror control path. Changing potentials on the load current path can thereby be detected as voltage swings on the current mirror control path. As a result of the triggered by the first differential amplifier control of the common gates of the current mirror transistors, these are so regulated that the output current / load current remains stable.
  • This complex solution for providing stable output currents is preferably provided for precision circuits, in which the increased effort is also useful.
  • the invention is based on the object, a load current limiting to be designed so that it provides the consumer as complete as possible operating voltage range available.
  • the object underlying the invention is achieved by the circuit arrangement such that the first input of the differential amplifier is connected to the drain terminal of the current mirror coupling FET and additionally with a current limiting resistor in series to ground. At the second input of the differential amplifier, a reference voltage source is connected.
  • the transistors of the current mirror eg on the arranged the same substrate of a circuit, have a common gate and are dimensioned in their geometry so that when driving both transistors in the same operating point, the ratio load current: mirrored load current as n: 1 behaves.
  • this representative voltage potential is evaluated at an input of the differential amplifier and, together with the voltage applied to the other input reference voltage at the output of the differential amplifier, an amplified differential signal is formed and used to drive the common gate of the current mirror FET.
  • load current control FET 1 and current mirror control FET 4 form a current mirror and are connected to the operating voltage 9. Due to the series connection of the load current control FET 1 to the load 2, a load current I L flows in this current path of the current mirror. The voltage potential across the load 2 is sampled via a connected input of the second differential amplifier 7.
  • the gate of the Current mirror coupling FET 5 drives and is connected by the connection of the other input of the second differential amplifier 7 to the source terminal of the current mirror coupling FET 5 as a voltage follower, also follows the potential at the drain terminal of the current mirror control FET 4th the voltage potential generated by the load current at the load. This ensures that the current mirror ratio is exactly 1: n.
  • the load current I g mirrored by the factor n generates a voltage drop across the current limiting resistor 6. This potential is applied to the input of the differential amplifier 3. There it is compared with the reference voltage of the switched at the other input of the differential amplifier reference voltage source 8.
  • the differential signal amplified at the output of the differential amplifier 3 controls the source-drain path to and the current limitation by driving the common gate terminals of current mirror control FET 4 and load current control FET 1 by increasing the potential uses.
  • the point of application of this current limiting can be done by balancing the current limiting resistor 6 or the reference voltage source 8.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)
  • Control Of Electrical Variables (AREA)
  • Emergency Protection Circuit Devices (AREA)

Claims (1)

  1. Agencement de circuit pour limiter le courant de courants de charge variables dans des circuits comprenant :
    - un niveau de courant qui comprend un FET de commande de niveau de courant (4) et un FET de commande de courant de charge (1), le branchement source du FET de commande de courant de charge (1) et le branchement source du FET de commande de niveau de courant (4) étant reliés à une source de tension de service (9),
    - une injection de courant pour un circuit de série comprenant le FET de commande de courant de charge (1) et un consommateur (2), le circuit de série étant branché entre l'injection de courant et la masse,
    - un amplificateur différentiel (3) commandant le niveau de courant, qui est doté d'une première et d'une seconde entrée et d'une sortie et la sortie étant reliée au portail du FET de commande de courant de charge (1) et au portail du FET de commande de niveau de courant (4),
    - un chemin de commande de niveau de courant attribué au niveau de courant, comprenant un FET de couplage de niveau de courant (5), dont le branchement source est relié au branchement drain du FET de commande de niveau de courant (4) et dont le branchement drain est relié à la première entrée de l'amplificateur différentiel (3), et
    - un second amplificateur différentiel (7) disposé avec une première et une seconde entrée et une sortie, la première entrée du second amplificateur différentiel (7) étant reliée au branchement source du FET de couplage de niveau de courant (5), la seconde entrée du second amplificateur différentiel (7) étant reliée au consommateur (2) et au branchement drain du FET de commande de courant de charge (1) et la sortie étant raccordée au portail du FET de couplage de niveau de courant (5),
    caractérisé en ce que la première entrée de l'amplificateur différentiel (3) est branchée en série vers la masse avec le branchement drain du FET de couplage de niveau de courant (5) et en supplément avec une résistance de limitation de courant (6), et une source de tension de référence (8) est raccordée à la seconde entrée de l'amplificateur différentiel (3).
EP01109666A 2000-05-31 2001-04-19 Circuit de limitation de courant Expired - Lifetime EP1160642B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10026793 2000-05-31
DE10026793A DE10026793A1 (de) 2000-05-31 2000-05-31 Strombegrenzungsschaltung

Publications (2)

Publication Number Publication Date
EP1160642A1 EP1160642A1 (fr) 2001-12-05
EP1160642B1 true EP1160642B1 (fr) 2011-05-25

Family

ID=7644102

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01109666A Expired - Lifetime EP1160642B1 (fr) 2000-05-31 2001-04-19 Circuit de limitation de courant

Country Status (3)

Country Link
EP (1) EP1160642B1 (fr)
AT (1) ATE511133T1 (fr)
DE (1) DE10026793A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020209371A1 (de) 2020-07-24 2022-01-27 Robert Bosch Gesellschaft mit beschränkter Haftung Stromregelung mit mindestens einem Feldeffekttransistor

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7679876B2 (en) * 2006-05-22 2010-03-16 Mediatek Singapore Pte Ltd. Current limiter system, circuit and method for limiting current
US8786359B2 (en) * 2007-12-12 2014-07-22 Sandisk Technologies Inc. Current mirror device and method

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0356570A1 (fr) * 1988-09-02 1990-03-07 Siemens Aktiengesellschaft Miroir de courant
US5519310A (en) * 1993-09-23 1996-05-21 At&T Global Information Solutions Company Voltage-to-current converter without series sensing resistor
US5847556A (en) * 1997-12-18 1998-12-08 Lucent Technologies Inc. Precision current source
US6064267A (en) * 1998-10-05 2000-05-16 Globespan, Inc. Current mirror utilizing amplifier to match operating voltages of input and output transconductance devices
EP0994402B1 (fr) * 1998-10-15 2003-04-23 Lucent Technologies Inc. Miroir de courant

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020209371A1 (de) 2020-07-24 2022-01-27 Robert Bosch Gesellschaft mit beschränkter Haftung Stromregelung mit mindestens einem Feldeffekttransistor

Also Published As

Publication number Publication date
DE10026793A1 (de) 2002-01-03
EP1160642A1 (fr) 2001-12-05
ATE511133T1 (de) 2011-06-15

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