EP1160642B1 - Current limiting circuit - Google Patents

Current limiting circuit Download PDF

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Publication number
EP1160642B1
EP1160642B1 EP01109666A EP01109666A EP1160642B1 EP 1160642 B1 EP1160642 B1 EP 1160642B1 EP 01109666 A EP01109666 A EP 01109666A EP 01109666 A EP01109666 A EP 01109666A EP 1160642 B1 EP1160642 B1 EP 1160642B1
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Prior art keywords
current
fet
load
current mirror
input
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EP01109666A
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German (de)
French (fr)
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EP1160642A1 (en
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Jürgen Dr.-Ing. Boldt
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IDT Europe GmbH
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Zentrum Mikroelektronik Dresden GmbH
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26Current mirrors
    • G05F3/262Current mirrors using field-effect transistors only

Definitions

  • the load current path is performed as a series connection of a current source resistor, a load current control FET, and the load.
  • a differential amplifier is switched so that one input of the differential amplifier, a reference voltage, the other input evaluates the voltage potential, which has set over the current source resistance, and at the output, the amplified differential signal through the gate of the load current control FET controls the load current.
  • the current source resistance is dimensioned so that when applied maximum load current in the load current path of the load current control FET starts with the load current limit.
  • a reference current of a reference current source is reflected in the additional second current mirror.
  • the mirrored reference current flows across the second current path of the second current mirror and impresses the current in the current mirror control path of the first current mirror.
  • a first differential amplifier evaluates the connection-side potential conditions at the first and second current paths of the second current mirror and controls with its output to the common gates of the current mirror transistors of the first current mirror.
  • a second differential amplifier evaluates the connection-side potential relationships on the load current path and current mirror control path of the first current mirror and controls with its output a voltage control unit on the current mirror control path. Changing potentials on the load current path can thereby be detected as voltage swings on the current mirror control path. As a result of the triggered by the first differential amplifier control of the common gates of the current mirror transistors, these are so regulated that the output current / load current remains stable.
  • This complex solution for providing stable output currents is preferably provided for precision circuits, in which the increased effort is also useful.
  • the invention is based on the object, a load current limiting to be designed so that it provides the consumer as complete as possible operating voltage range available.
  • the object underlying the invention is achieved by the circuit arrangement such that the first input of the differential amplifier is connected to the drain terminal of the current mirror coupling FET and additionally with a current limiting resistor in series to ground. At the second input of the differential amplifier, a reference voltage source is connected.
  • the transistors of the current mirror eg on the arranged the same substrate of a circuit, have a common gate and are dimensioned in their geometry so that when driving both transistors in the same operating point, the ratio load current: mirrored load current as n: 1 behaves.
  • this representative voltage potential is evaluated at an input of the differential amplifier and, together with the voltage applied to the other input reference voltage at the output of the differential amplifier, an amplified differential signal is formed and used to drive the common gate of the current mirror FET.
  • load current control FET 1 and current mirror control FET 4 form a current mirror and are connected to the operating voltage 9. Due to the series connection of the load current control FET 1 to the load 2, a load current I L flows in this current path of the current mirror. The voltage potential across the load 2 is sampled via a connected input of the second differential amplifier 7.
  • the gate of the Current mirror coupling FET 5 drives and is connected by the connection of the other input of the second differential amplifier 7 to the source terminal of the current mirror coupling FET 5 as a voltage follower, also follows the potential at the drain terminal of the current mirror control FET 4th the voltage potential generated by the load current at the load. This ensures that the current mirror ratio is exactly 1: n.
  • the load current I g mirrored by the factor n generates a voltage drop across the current limiting resistor 6. This potential is applied to the input of the differential amplifier 3. There it is compared with the reference voltage of the switched at the other input of the differential amplifier reference voltage source 8.
  • the differential signal amplified at the output of the differential amplifier 3 controls the source-drain path to and the current limitation by driving the common gate terminals of current mirror control FET 4 and load current control FET 1 by increasing the potential uses.
  • the point of application of this current limiting can be done by balancing the current limiting resistor 6 or the reference voltage source 8.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Control Of Electrical Variables (AREA)

Abstract

The circuit provides current limiting for varying load currents in circuits with a current supply for a series circuit including a load current control FET and a load. A differential amplifier (3) is provided. A reference voltage source is connected to the second input of the amplifier. The output is connected to the gate of the FET. A current mirror including a mirror control FET and the load current control FET (1) is arranged such that the sources of both FETs are connected to an operating voltage source (9). The mirror is in a control path comprising a current mirror coupling FET whose source is connected to the drain of the mirror control FET, and whose drain is connected to the first input of the amplifier (3). The drain of the coupling FET is connected in series with a current limiting resistor (6) to earth. The amplifier output is connected to the gate of the mirror control FET. A second differential amplifier (7) is provided. The first input is connected to the source of the coupling FET. The second input is connected to the load (2) and to the drain of the load FET (1). The output is connected to the gate of the coupling FET.

Description

Die Erfindung betrifft eine Schaltungsanordnung zur Strombegrenzung veränderlicher Lastströme in Schaltungen

  • mit einem Stromspiegel, der aus einem Stromspiegel-Steuer-FET und einem Laststrom-Steuer-FET besteht, wobei der Sourceanschluss des Laststrom-Steuer-FET und der Sourceanschluss des Stromspiegel-Steuer-FET mit einer Betriebsspannungsquelle verbunden ist,
  • mit einer Stromeinspeisung für eine Reihenschaltung bestehend aus dem Laststrom-Steuer-FET und einem Verbraucher, wobei die Reihenschaltung zwischen Stromeinspeisung und Masse geschaltet wird,
  • mit einem den Stromspiegel steuernden Differenzverstärker, der mit einem ersten und einem zweiten Eingang sowie einem Ausgang versehen ist und der Ausgang mit dem Gate des Laststrom-Steuer-FET und mit dem Gate des Stromspiegel-Steuer-FET verbunden ist,
  • mit einem dem Stromspiegel zugeordneten Stromspiegel-Steuerpfad, bestehend aus einem Stromspiegel-Koppel-FET, dessen Sourceanschluss mit dem Drainanschluss des Stromspiegel-Steuer-FET und dessen Drainanschluss mit dem ersten Eingang des Differenzverstärkers verbunden ist, und
  • mit einem zweiten Differenzverstärker mit einem ersten und zweiten Eingang und einem Ausgang angeordnet ist, wobei der erste Eingang des zweiten Differenzverstärkers mit dem Sourceanschluss des Stromspiegel-Koppel-FET, der zweite Eingang des zweiten Differenzverstärkers mit dem Verbraucher und dem Drainanschluss des Laststrom-Steuer-FET verbunden ist und der Ausgang an das Gate des Stromspiegel-Koppel-FET angeschlossen ist.
The invention relates to a circuit arrangement for limiting the current of variable load currents in circuits
  • a current mirror consisting of a current mirror control FET and a load current control FET, wherein the source terminal of the load current control FET and the source terminal of the current mirror control FET are connected to an operating voltage source,
  • with a power supply for a series circuit consisting of the load current control FET and a load, wherein the series connection between the power supply and ground is switched,
  • a differential current amplifier controlling the current mirror, provided with a first and a second input and an output and the output connected to the gate of the load current control FET and to the gate of the current mirror control FET,
  • a current mirror control path associated with the current mirror, consisting of a current mirror coupling FET whose source terminal is connected to the drain terminal of the current mirror control FET and whose drain terminal is connected to the first input of the differential amplifier, and
  • is arranged with a second differential amplifier having a first and second input and an output, wherein the first input of the second differential amplifier with the source terminal of the current mirror coupling FET, the second input of the second differential amplifier is connected to the load and the drain terminal of the load current control FET and the output is connected to the gate of the current mirror coupling FET.

Treten in Schaltungen Verbraucher mit hohen Lastströmen auf, variieren diese insbesondere in ihrer Größe sehr stark, ergeben sich wegen des nur endlich kleinen Innenwiderstandes der Betriebsspannungsquelle Schwankungen der Betriebsspannung, die sich auf alle angeschlossenen Schaltungsteile störend auswirken. Daher kommen zur Betriebsspannungsstabilisierung verschiedene technische Lösungen, insbesondere Strombegrenzungsschaltungen für die Begrenzung des Laststromes, zum Einsatz. Diese Strombegrenzungsschaltungen werden so dimensioniert, daß sie im Laststrompfad nur solch einen maximalen Laststrom für den Verbraucher zur Verfügung stellen, bei dem einerseits die Funktion des Verbrauchers nicht beeinträchtigt wird, anderseits die bei dieser Belastung der Betriebsspannungsquelle resultierende Betriebsspannungsänderung sich für alle Schaltungsteile nicht störend auswirkt.Join in circuits consumers with high load currents, these vary very particularly in size, arise because of the only finely small internal resistance of the operating voltage source fluctuations in operating voltage, which affect all connected circuit parts disturbing. Therefore come to operating voltage stabilization various technical solutions, in particular current limiting circuits for limiting the load current is used. These current limiting circuits are dimensioned so that they provide in the load current path only such a maximum load current for the consumer, in which on the one hand the function of the consumer is not affected, on the other hand, resulting in this load of the operating voltage source operating voltage change for all circuit parts does not interfere.

Es ist nunmehr bekannt, daß in derartigen Strombegrenzungsschaltungen der Laststrompfad als eine Reihenschaltung von einem Stromquellenwiderstand, einem Laststrom-Steuer-FET und des Verbrauchers ausgeführt wird. Zusätzlich wird ein Differenzverstärker so geschaltet, daß ein Eingang des Differenzverstärkers eine Referenzspannung, der andere Eingang das Spannungspotential, welches sich über dem Stromquellenwiderstand eingestellt hat, auswertet und am Ausgang das verstärkte Differenzsignal über das Gate des Laststrom-Steuer-FET den Laststrom regelt. Der Stromquellenwiderstand ist so dimensioniert, daß bei anliegendem maximalen Lastrom im Laststrompfad der Laststrom-Steuer-FET mit der Laststrombegrenzung einsetzt.It is now known that in such current limiting circuits, the load current path is performed as a series connection of a current source resistor, a load current control FET, and the load. In addition, a differential amplifier is switched so that one input of the differential amplifier, a reference voltage, the other input evaluates the voltage potential, which has set over the current source resistance, and at the output, the amplified differential signal through the gate of the load current control FET controls the load current. The current source resistance is dimensioned so that when applied maximum load current in the load current path of the load current control FET starts with the load current limit.

Als nachteilig erweisen sich solche Strombegrenzerschaltungen dahingehend, daß zur Stromeinspeisung in den Verbraucher, z.B. durch einen Stromquellenwiderstand, ein Spannungshub zwischen Betriebsspannungsquelle und Verbraucher vorgesehen werden muß, so daß für den Verbraucher nur ein erheblich verringerter Nutzbereich der Betriebsspannung zur Verfügung gestellt werden kann.Disadvantageous prove such current limiter circuits in that the power supply to the consumer, e.g. must be provided by a current source resistance, a voltage swing between the operating voltage source and the consumer, so that only a significantly reduced useful range of the operating voltage can be made available to the consumer.

Beim Stand der Technik ist aus der Patentschrift US 5847 556 eine Lösung zur Bereitstellung stabiler Ausgangsströme zu entnehmen. Dort ist ersichtlich, dass neben einem ersten Stromspiegel, der einen Laststrompfad und einen Stromspiegel-Steuerpfad aufweist ein zweiter Stromspiegel eingesetzt wird.In the prior art is from the patent US 5847 556 to take a solution to provide stable output currents. It can be seen that, in addition to a first current mirror having a load current path and a current mirror control path, a second current mirror is used.

Anstatt der Verwendung einer Referenzspannung wird hierbei ein Referenzstrom einer Referenzstromquelle in den zusätzlichen zweiten Stromspiegels eingespiegelt. Der gespiegelte Referenzstrom fließt über den zweiten Strompfad des zweiten Stromspiegels und prägt den Strom im Stromspiegel-Steuerpfad des ersten Stromspiegels.Instead of using a reference voltage, in this case a reference current of a reference current source is reflected in the additional second current mirror. The mirrored reference current flows across the second current path of the second current mirror and impresses the current in the current mirror control path of the first current mirror.

Ein erster Differenzverstärker wertet die anschlussseitigen Potenzialverhältnisse am ersten und zweiten Strompfad des zweiten Stromspiegels aus und steuert mit seinem Ausgang die gemeinsamen Gates der Stromspiegel-Transistoren des ersten Stromspiegels an.A first differential amplifier evaluates the connection-side potential conditions at the first and second current paths of the second current mirror and controls with its output to the common gates of the current mirror transistors of the first current mirror.

Ein zweiter Differenzverstärker wertet die anschlussseitigen Potenzialverhältnisse am Laststrompfad und Stromspiegel-Steuerpfad des ersten Stromspiegels aus und steuert mit seinem Ausgang eine Spannungs-Steuereinheit auf dem Stromspiegel-Steuerpfad. Sich ändernde Potentiale am Laststrompfad können dadurch am Stromspiegel-Steuerpfad als Spannungshübe erfasst werden. Infolge der dadurch vom ersten Differenzverstärker ausgelösten Ansteuerung der gemeinsamen Gates der Stromspiegel-Transistoren werden diese so ausgeregelt, dass der Ausgangsstrom/Laststrom stabil bleibt.A second differential amplifier evaluates the connection-side potential relationships on the load current path and current mirror control path of the first current mirror and controls with its output a voltage control unit on the current mirror control path. Changing potentials on the load current path can thereby be detected as voltage swings on the current mirror control path. As a result of the triggered by the first differential amplifier control of the common gates of the current mirror transistors, these are so regulated that the output current / load current remains stable.

Diese aufwändige Lösung zur Bereitstellung von stabilen Ausgangsströmen wird vorzugsweise für Präzisions-Schaltungen vorgesehen, bei denen der erhöhte Aufwand auch sinnvoll ist.This complex solution for providing stable output currents is preferably provided for precision circuits, in which the increased effort is also useful.

Der Erfindung liegt nunmehr die Aufgabe zugrunde, eine Laststrombegrenzung so auszuführen, daß diese dem Verbraucher den möglichst vollständigen Betriebsspannungsbereich zu Verfügung stellt.The invention is based on the object, a load current limiting to be designed so that it provides the consumer as complete as possible operating voltage range available.

Die der Erfindung zugrunde liegenden Aufgabe wird durch die Schaltungsanordnung derartig gelöst, daß der erste Eingang des Differenzverstärkers mit dem Drainanschluß des Stromspiegel-Koppel-FET und zusätzlich mit einem Strombegrenzungswiderstand in Reihe nach Masse geschaltet ist. An dem zweiten Eingang des Differenzverstärkers ist eine Referenzspannungsquelle angeschlossen.The object underlying the invention is achieved by the circuit arrangement such that the first input of the differential amplifier is connected to the drain terminal of the current mirror coupling FET and additionally with a current limiting resistor in series to ground. At the second input of the differential amplifier, a reference voltage source is connected.

Gemäß dem üblichen konstruktiven Aufbau von Stromspiegeln sind die Transistoren des Stromspiegels, Laststrom-Steuer-FET und Stromspiegel-Steuer-FET, z.B. auf dem gleichen Substrat eines Schaltkreises angeordnet, haben einen gemeinsamen Gateanschluß und sind in ihrer Geometrie so dimensioniert, daß bei Ansteuerung beider Transistoren im gleichem Arbeitspunkt sich das Verhältnis Laststrom : gespiegelter Laststrom wie n:1 verhält.According to the usual constructive structure of current mirrors are the transistors of the current mirror, load current control FET and current mirror control FET, eg on the arranged the same substrate of a circuit, have a common gate and are dimensioned in their geometry so that when driving both transistors in the same operating point, the ratio load current: mirrored load current as n: 1 behaves.

Erfindungsgemäß wird das über dem Verbraucher sich einstellende Spannungspotential nicht unmittelbar vom Differenzverstärker ausgewertet, sondern dieses wird mittels zusätzlich ausgeführtem Spannungsfolger-Operationsverstärker abgetastet und ausgangsseitig über das Gate eines Stromspiegel-Koppel-FET so eingekoppelt, daß die Laststromgröße des Laststrompfades im Stromspiegel-Steuerpfad über einen Strombegrenzungswiderstand potentialmäßig repräsentiert wird. Hierbei wird dieses repräsentative Spannungspotential an einem Eingang des Differenzverstärkers ausgewertet und es wird gemeinsam mit der am anderen Eingang anliegenden Referenzspannung am Ausgang des Differenzverstärkers ein verstärktes Differenzsignal gebildet und zur Ansteuerung des gemeinsamen Gates der Stromspiegel-FET verwendet. Diese Ansteuerung der Stromspiegel-FET erfolgt in einem solchen Arbeitspunkt, der bei Erreichen des vorgesehenen maximalen Laststromes die Source-Drainspannung der Stromspiegel-FET noch als Restspannung hinreichend klein realisiert damit diese für die Verbraucherfunktion vernachlässigbar ist. Diese vorteilhaften Schaltungseigenschaften der vorliegenden Lösung werden unter Anwendung des bekannten Einsatzes von Stromspiegeln bei der Bereitstellung von stabilen Lastströmen realisiert. Das wird aber bei vergleichsweise niedrigem Aufwand erreicht, da zur Lösung der erfinderischen Aufgabenstellung ein Einsatz eines zusätzlichen Stromspiegels bei der Realisierung der Schaltung vermieden wird.According to the invention over the consumer adjusting voltage potential is not directly evaluated by the differential amplifier, but this is scanned by additionally running voltage follower operational amplifier and output coupled via the gate of a current mirror coupling FET so that the load current size of the load current path in the current mirror control path via a Current limiting resistor is represented in terms of potential. In this case, this representative voltage potential is evaluated at an input of the differential amplifier and, together with the voltage applied to the other input reference voltage at the output of the differential amplifier, an amplified differential signal is formed and used to drive the common gate of the current mirror FET. This control of the current mirror FET is carried out in such an operating point, the source-drain voltage of the current mirror FET still realized sufficiently small residual voltage when reaching the intended maximum load current so that it is negligible for the load function. These advantageous circuit characteristics of the present solution are realized using the known use of current mirrors in the provision of stable load currents. But this is achieved at relatively low cost, since the solution of the inventive task, an application of an additional current mirror in the realization of the circuit is avoided.

Die Erfindung soll nachfolgend anhand eines Ausführungsbeispieles näher erläutert werden. Die zugehörige Zeichnung zeigt ein Blockschaltbild der erfindungsgemäßen Schaltungsanordnung. Wie in der Zeichnung ersichtlich, bilden Laststrom-Steuer-FET 1 und Stromspiegel-Steuer-FET 4 einen Stromspiegel und sind an die Betriebsspannung 9 angeschlossen. Durch die Reihenschaltung des Laststrom-Steuer-FET 1 mit dem Verbraucher 2 fließt in diesem Strompfad des Stromspiegels ein Laststrom IL. Das über dem Verbraucher 2 sich einstellende Spannungspotential wird über einen angeschlossenen Eingang des zweiten Differenzverstärkers 7 abgetastet. Da der Differenzverstärker 7 ausgangsseitig das Gate des Stromspiegel-Koppel-FET 5 ansteuert und durch die Verbindung des anderen Eingangs des zweiten Differenzverstärkers 7 mit dem Source-Anschluß des Stromspiegel-Koppel-FET 5 als Spannungsfolger geschaltet ist, folgt auch das Potential am Drain-Anschluß des Stromspiegel-Steuer-FET 4 dem durch den Laststrom am Verbraucher erzeugten Spannungspotential. Dadurch ist gewährleistet, daß das Stromspiegelverhältnis exakt 1:n beträgt. Der um den Faktor n gespiegelte Laststrom Ig erzeugt über dem Strombegrenzungswiderstand 6 einen Spannungsabfall. Dieses Potential liegt am Eingang des Differenzverstärkers 3 an. Dort wird es mit der Referenzspannung der an dem anderen Eingang des Differenzverstärkers geschalteten Referenzspannungsquelle 8 verglichen. Übersteigt dieses Potential die Referenzspannung der Referenzspannungsquelle so steuert das am Ausgang des Differenzverstärkers 3 verstärkte Differenzsignal durch die Ansteuerung der gemeinsamen Gate-Anschlüsse von Stromspiegel-Steuer-FET 4 und Laststrom-Steuer-FET 1 durch Potentialanstieg deren Source-Drain Strecke zu und die Strombegrenzung setzt ein. Der Einsatzpunkt dieser Strombegrenzung kann durch Abgleich des Strombegrenzungswiderstandes 6 oder der Referenzspannungsquelle 8 erfolgen.The invention will be explained in more detail with reference to an embodiment. The accompanying drawing shows a block diagram of the circuit arrangement according to the invention. As can be seen in the drawing, load current control FET 1 and current mirror control FET 4 form a current mirror and are connected to the operating voltage 9. Due to the series connection of the load current control FET 1 to the load 2, a load current I L flows in this current path of the current mirror. The voltage potential across the load 2 is sampled via a connected input of the second differential amplifier 7. Since the differential amplifier 7 output side, the gate of the Current mirror coupling FET 5 drives and is connected by the connection of the other input of the second differential amplifier 7 to the source terminal of the current mirror coupling FET 5 as a voltage follower, also follows the potential at the drain terminal of the current mirror control FET 4th the voltage potential generated by the load current at the load. This ensures that the current mirror ratio is exactly 1: n. The load current I g mirrored by the factor n generates a voltage drop across the current limiting resistor 6. This potential is applied to the input of the differential amplifier 3. There it is compared with the reference voltage of the switched at the other input of the differential amplifier reference voltage source 8. If this potential exceeds the reference voltage of the reference voltage source, the differential signal amplified at the output of the differential amplifier 3 controls the source-drain path to and the current limitation by driving the common gate terminals of current mirror control FET 4 and load current control FET 1 by increasing the potential uses. The point of application of this current limiting can be done by balancing the current limiting resistor 6 or the reference voltage source 8.

BezugszeichenlisteLIST OF REFERENCE NUMBERS

11
Laststrom-Steuer-FETLoad current control FET
22
Verbraucherconsumer
33
Differenzverstärkerdifferential amplifier
44
Stromspiegel-Steuer-FETCurrent mirror control FET
55
Stromspiegel-Koppel-FETCurrent mirror coupling FET
66
StrombegrenzungswiderstandCurrent limiting resistor
77
zweiter Differenzverstärkersecond differential amplifier
88th
ReferenzspannungsquelleReference voltage source
99
BetriebsspannungsquelleOperating voltage source
IL I L
Laststromload current
Ig I g
gespiegelter Laststrommirrored load current

Claims (1)

  1. Circuit arrangement for the current limiting of variable load currents in circuits,
    - comprising a current mirror consisting of a current mirror control FET (4) and a load current control FET (1), wherein the source terminal of the load current control FET (1) and the source terminal of the current mirror control FET (4) are connected to an operating voltage source (9),
    - comprising a current supply for a series circuit consisting of the load current control FET (1) and a load (2), wherein the series circuit is connected between current supply and earth,
    - comprising a differential amplifier (3) controlling the current mirror, said differential amplifier being provided with a first and a second input and also an output and the output being connected to the gate of the load current control FET (1) and to the gate of the current mirror control FET (4),
    - comprising a current mirror control path assigned to the current mirror, consisting of a current mirror coupling FET (5), the source terminal of which is connected to the drain terminal of the current mirror control FET (4) and the drain terminal of which is connected to the first input of the differential amplifier (3),
    - comprising a second differential amplifier (7) arranged with a first and second input and an output, wherein the first input of the second differential amplifier (7) is connected to the source terminal of the current mirror coupling FET (5), the second input of the second differential amplifier (7) is connected to the load (2) and to the drain terminal of the load current control FET (1), and the output is connected to the gate of the current mirror coupling FET (5),
    characterized in that the first input of the differential amplifier (3) is connected in series with the drain terminal of the current mirror coupling FET (5) and additionally with a current limiting resistor (6) to earth, and a reference voltage source (8) is connected to the second input of the differential amplifier (3).
EP01109666A 2000-05-31 2001-04-19 Current limiting circuit Expired - Lifetime EP1160642B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10026793A DE10026793A1 (en) 2000-05-31 2000-05-31 Current limiting circuit
DE10026793 2000-05-31

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EP1160642A1 EP1160642A1 (en) 2001-12-05
EP1160642B1 true EP1160642B1 (en) 2011-05-25

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AT (1) ATE511133T1 (en)
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EP0994402B1 (en) * 1998-10-15 2003-04-23 Lucent Technologies Inc. Current mirror

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102020209371A1 (en) 2020-07-24 2022-01-27 Robert Bosch Gesellschaft mit beschränkter Haftung Current control with at least one field effect transistor

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DE10026793A1 (en) 2002-01-03
EP1160642A1 (en) 2001-12-05
ATE511133T1 (en) 2011-06-15

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