EP1160642A1 - Circuit de limitation de courant - Google Patents

Circuit de limitation de courant Download PDF

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Publication number
EP1160642A1
EP1160642A1 EP01109666A EP01109666A EP1160642A1 EP 1160642 A1 EP1160642 A1 EP 1160642A1 EP 01109666 A EP01109666 A EP 01109666A EP 01109666 A EP01109666 A EP 01109666A EP 1160642 A1 EP1160642 A1 EP 1160642A1
Authority
EP
European Patent Office
Prior art keywords
current
fet
load
input
current mirror
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP01109666A
Other languages
German (de)
English (en)
Other versions
EP1160642B1 (fr
Inventor
Jürgen Dr.-Ing. Boldt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IDT Europe GmbH
Original Assignee
Zentrum Mikroelektronik Dresden GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zentrum Mikroelektronik Dresden GmbH filed Critical Zentrum Mikroelektronik Dresden GmbH
Publication of EP1160642A1 publication Critical patent/EP1160642A1/fr
Application granted granted Critical
Publication of EP1160642B1 publication Critical patent/EP1160642B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26Current mirrors
    • G05F3/262Current mirrors using field-effect transistors only

Definitions

  • the invention relates to a circuit arrangement for current limitation variable load currents in circuits with a Power supply for a series connection, consisting of one Load current control FET and a consumer, the series connection is switched between power supply and ground, with a differential amplifier that with a first and a second input and an output is provided, on which second input a reference voltage source is connected and the output is connected to the gate of the load current control FET is and an operating voltage source.
  • the load current path as a series connection of a current source resistor, a load current control FET and the consumer is running.
  • a differential amplifier switched so that an input of the differential amplifier a reference voltage, the other input that Voltage potential, which is above the current source resistance has set, evaluates and at the output the amplified Differential signal through the gate of the load current control FET Regulates load current.
  • the current source resistance is dimensioned that when there is a maximum load current in the load current path the load current control FET with the load current limit is used.
  • Such current limiter circuits prove to be disadvantageous in that for feeding electricity into the consumer, e.g. by a current source resistance, a voltage swing between Operating voltage source and consumer must be provided so that for the consumer only a significantly reduced Usable range of the operating voltage can be made available can.
  • the invention is based on the object of a load current limitation so that the consumer the operating voltage range as complete as possible poses.
  • the object underlying the invention is achieved by Circuit arrangement solved in such a way that the current feed via a newly introduced current mirror, one of which Current path, the load current path via the load current control FET carries the load current of the consumer, whose other Stro mpfad is executed as a current mirror control path and the over the current mirror control FET a mirrored load current wearing.
  • Current mirrors are the transistors of the current mirror, load current control FET and current mirror control FET, e.g. on the same substrate of a circuit, have a common gate connection and are dimensioned in their geometry so that when driving both transistors in the same Working point the ratio load current: mirrored Load current behaves as n: 1.
  • load current control FETs form and current mirror control FET a current mirror and are connected to the Operating voltage connected.
  • the Load current control FET By connecting the Load current control FET with the consumer flows in it Current path of the current mirror a load current. That about the consumer the voltage potential that arises is transmitted via a connected input of the operational amplifier sampled. Since the operational amplifier has the gate of the output side Current mirror coupling FET controls and by connecting the other input of the operational amplifier with the source connection of the current mirror coupling FET switched as a voltage follower the potential at the drain connection of the Current mirror control FET by the load current at the consumer generated voltage potential. This ensures that the current mirror ratio is exactly 1: n. The factor n mirrored load current generated across the current limiting resistor a voltage drop.
  • This potential is due to Input of the differential amplifier. There it will be with the Reference voltage at the other input of the differential amplifier switched reference voltage source compared. If this potential exceeds the reference voltage of the reference voltage source this is how it controls the output of the differential amplifier amplified difference signal by controlling the common gate connections of current mirror control FET and Load current control FET due to potential increase in its source drain The path closes and the current limitation begins. The point of use this current limitation can be adjusted by adjusting the current limiting resistor or the reference voltage source.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Amplifiers (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Control Of Electrical Variables (AREA)
EP01109666A 2000-05-31 2001-04-19 Circuit de limitation de courant Expired - Lifetime EP1160642B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10026793 2000-05-31
DE10026793A DE10026793A1 (de) 2000-05-31 2000-05-31 Strombegrenzungsschaltung

Publications (2)

Publication Number Publication Date
EP1160642A1 true EP1160642A1 (fr) 2001-12-05
EP1160642B1 EP1160642B1 (fr) 2011-05-25

Family

ID=7644102

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01109666A Expired - Lifetime EP1160642B1 (fr) 2000-05-31 2001-04-19 Circuit de limitation de courant

Country Status (3)

Country Link
EP (1) EP1160642B1 (fr)
AT (1) ATE511133T1 (fr)
DE (1) DE10026793A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009076304A1 (fr) * 2007-12-12 2009-06-18 Sandisk Corporation Dispositif miroir de courant, et procédé

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7679876B2 (en) * 2006-05-22 2010-03-16 Mediatek Singapore Pte Ltd. Current limiter system, circuit and method for limiting current
DE102020209371A1 (de) 2020-07-24 2022-01-27 Robert Bosch Gesellschaft mit beschränkter Haftung Stromregelung mit mindestens einem Feldeffekttransistor

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0356570A1 (fr) * 1988-09-02 1990-03-07 Siemens Aktiengesellschaft Miroir de courant
US5519310A (en) * 1993-09-23 1996-05-21 At&T Global Information Solutions Company Voltage-to-current converter without series sensing resistor
US5847556A (en) * 1997-12-18 1998-12-08 Lucent Technologies Inc. Precision current source
EP0994402A1 (fr) * 1998-10-15 2000-04-19 Lucent Technologies Inc. Miroir de courant
US6064267A (en) * 1998-10-05 2000-05-16 Globespan, Inc. Current mirror utilizing amplifier to match operating voltages of input and output transconductance devices

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0356570A1 (fr) * 1988-09-02 1990-03-07 Siemens Aktiengesellschaft Miroir de courant
US5519310A (en) * 1993-09-23 1996-05-21 At&T Global Information Solutions Company Voltage-to-current converter without series sensing resistor
US5847556A (en) * 1997-12-18 1998-12-08 Lucent Technologies Inc. Precision current source
US6064267A (en) * 1998-10-05 2000-05-16 Globespan, Inc. Current mirror utilizing amplifier to match operating voltages of input and output transconductance devices
EP0994402A1 (fr) * 1998-10-15 2000-04-19 Lucent Technologies Inc. Miroir de courant

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
SERRANO T ET AL: "THE ACTIVE-IMPUT REGULATED-CASCODE CURRENT MIRROR", IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: FUNDAMENTAL THEORY AND APPLICATIONS, IEEE INC. NEW YORK, US, vol. 41, no. 6, 1 June 1994 (1994-06-01), pages 464 - 467, XP000460535, ISSN: 1057-7122 *

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009076304A1 (fr) * 2007-12-12 2009-06-18 Sandisk Corporation Dispositif miroir de courant, et procédé
US8786359B2 (en) 2007-12-12 2014-07-22 Sandisk Technologies Inc. Current mirror device and method

Also Published As

Publication number Publication date
ATE511133T1 (de) 2011-06-15
EP1160642B1 (fr) 2011-05-25
DE10026793A1 (de) 2002-01-03

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