EP1148404B1 - Régulateur de tension à faible consommation électrique - Google Patents
Régulateur de tension à faible consommation électrique Download PDFInfo
- Publication number
- EP1148404B1 EP1148404B1 EP01108243A EP01108243A EP1148404B1 EP 1148404 B1 EP1148404 B1 EP 1148404B1 EP 01108243 A EP01108243 A EP 01108243A EP 01108243 A EP01108243 A EP 01108243A EP 1148404 B1 EP1148404 B1 EP 1148404B1
- Authority
- EP
- European Patent Office
- Prior art keywords
- amplifier
- voltage
- regulator
- transistor
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/565—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices sensing a condition of the system or its load in addition to means responsive to deviations in the output of the system, e.g. current, voltage, power factor
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/575—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit
Definitions
- the amplifier includes low-voltage current sources current when the amplifier is paused.
- FIG. 4 represents a regulator 20 according to the invention, powered here by a voltage Vbat supplied by a battery 21.
- the regulator 20 includes as that of Figure 1 a differential amplifier 22 whose output controls the gate of a transistor of regulation 23 of PMOS type. Drain D of transistor 23 is connected to the output of the regulator 20 and is connected to a Cst stabilization capability in parallel with a load Z, these various elements being arranged as described in the preamble.
- the output voltage Vout is brought back to the positive input of amplifier 2 by via a divider bridge comprising two resistors R1, R2.
- the resistance R1 can be zero in the case of a direct feedback of the voltage of output Vout on the input of the amplifier 22, the R2 resistance being in this case mathematically infinite.
- the reference voltage Vref applied to the input negative of the amplifier 2 is for example a voltage so-called band gap with good stability in temperature function, generated by means of diodes at PN junction and current mirrors.
- the voltage Vref is thus independent of the voltage Vbat, provided to be lower than the lowest value of the voltage Vbat.
- the amplifier 22 has a "normal" operating mode and a “sleep” mode and toggle from one to the other according to the value of a signal Vlc applied to an LCIN input provided for this purpose.
- Setting in standby of the amplifier 22 consists, according to the invention, in placing the amplifier in a state of low power consumption while now the grid voltage Vg to a potential ensuring the maintenance of the regulating transistor 23 in the passing state.
- the amplifier switches to standby mode when the signal Vlc goes to 1.
- the signal Vlc is delivered by a comparator 24 receiving on its positive input the output voltage Vout and on its negative input the supply voltage Vbat, the comparator 24 being powered by the voltage Vbat.
- the comparator 24 is a threshold comparator Vd1 and here puts its output at 1 (signal Vlc) when the voltage differential Vd seen on its inputs, equal to the difference between the voltage Vbat and the voltage Vout, becomes lower than the threshold Vd1.
- comparator 24 presents also preferably a switching hysteresis and resets its output to 0 when the differential voltage Vd goes up and becomes greater than a higher threshold Vd2 at Vd1.
- the thresholds Vd1, Vd2 are for example equal to 100 mV and 120mV, respectively.
- the amplifier 22 switches to sleep mode while maintaining the regulating transistor 23 in the on state, when the regulator 20 operates in follower mode due to a voltage drop Vbat power below the nominal value Voutnom of the output voltage.
- the differential voltage Vd reaches a minimum value Vdmin which corresponds to the fall of voltage at the terminals of the regulating transistor 23.
- This voltage drop Vdmin is in principle very low, by example 50 mV because the regulating transistor of a LDO type regulator typically presents a drain-source resistor VdsON in the very on-state low. From the instant t2, the voltage Vout begins to decrease and follows the voltage Vbat, the offset near the voltage Vdmin.
- the transition to follower mode is detected by the comparator 24 at a time t1 preceding t2 but very close to t2, when the voltage differential Vd reaches the threshold Vd1 mentioned more high, chosen very close to the minimum Vdmin. So, at the time t1, the signal Vlc goes to 1 (FIG 5C) and amplifier 2 is put on standby.
- the logical "1" of the signal Vlc is here the voltage Vbat, which feeds the comparator 24.
- the voltage Vbat then goes back to its nominal value, for example after recharging the battery 21 or regeneration natural of it when the current consumed decreases.
- the voltage Vbat exceeds the value Voutnom.
- the voltage differential Vd exceeds threshold Vd2 and the amplifier 22 switches to its normal operating mode, the voltage Vout returning to its nominal value Voutnom.
- the transistor 27 pulls the amplifier output at 0 (voltage Vg) to maintain the regulating transistor 23 in the on state.
- This embodiment 22c is therefore different from previous 22a, 22b by the fact that in standby mode the voltage of gate Vg is not grounded by the transistor NMOS 2 of the output stage of amplifier 2, which is off but by the additional transistor 27 meant for that purpose.
- the amplifier 22d shown in FIG. 9 comprises also the amplifier 2 and the transistor 26 assuring turning off the amplifier 2 when the Vlc signal is at 1.
- the low-pull transistor 27 (pull down) at the output of the amplifier 22c is replaced by a more advanced polarization stage 30 that keeps the output of the amplifier 2 at a voltage Vg greater than the mass when it is off.
- This voltage Vg is chosen so that the voltage gate-source Vgs of the regulating transistor 23 is maintained in the vicinity of the threshold voltage Vtp of the transistor 23.
- the polarization step 30 comprises for example a first PMOS transistor 31 receiving the voltage Vbat on its source, connected by its drain to the source of a second PMOS transistor 32 whose drain is connected to the output node of the amplifier 22d.
- Transistors 31, 32 are arranged in diodes, each having its gate connected to its drain.
- the bias stage 30 includes a resistor 33 high value in series with an NMOS transistor 34 driven by the signal Vlc.
- the signal Vlc is at 0 and the transistor 34 is also blocked.
- the amplifier 2 works as if the polarization stage 30 did not exist not.
- the voltage Vg tends to 0, the signal Vlc goes to 1 and the amplifier 2 is turned off.
- the two diode transistors 31, 32 become passersby and each impose a voltage Vtp to their terminals, so that the gate voltage Vg is in this case equal to [Vbat - (2Vtp)].
- the voltage Vgs of regulation transistor 23 is thus equal to 2Vtp in absolute value and is close to Vtp (at the Vtp value near, of the order of 0.7 V). Other methods are good heard conceivable to maintain the voltage Vg still closer to the threshold voltage Vtp.
- each of the amplifiers 22a to 22d may be provided for making other variants of production.
- the polarization stage 30 of the amplifier 22d can be incorporated into the amplifiers 22a, 22b. It is also within the reach of those skilled in the art of applying the principles and solutions exposed above to amplifier structures known other than that of the amplifier 2 chosen here for example.
- the examples which have just been described relate to a regulator having a PMOS type control transistor, it enters as part of this application and he is at the reach of the skilled person to transpose teaching of the present invention to regulators having a NMOS-type control transistor.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Description
- la figure 1 précédemment décrite est le schéma électrique d'un régulateur de tension classique,
- la figure 2 précédemment décrite est le schéma électrique d'un amplificateur présent dans le régulateur de la figure 1,
- les figures 3A à 3C représentent des signaux électriques et illustrent le fonctionnement du régulateur de tension lorsque la tension d'alimentation chute en dessous de la valeur nominale de la tension de sortie,
- la figure 4 est le schéma électrique d'un régulateur de tension selon l'invention,
- les figures 5A à 5C représentent des signaux électriques et illustrent le fonctionnement du régulateur selon l'invention en mode suiveur, et
- les figures 6 à 9 sont des schémas électriques de quatre variantes de réalisation d'un amplificateur selon l'invention présent dans le régulateur de la figure 4.
Claims (15)
- Régulateur de tension (20) comprenantun transistor MOS de régulation (23) ayant une première borne de conduction (S) recevant une tension d'alimentation (Vbat) et une seconde borne de conduction (D) reliée à la sortie du régulateur, etun amplificateur (22, 22a-22d) dont la sortie pilote la grille du transistor de régulation (23) en fonction de l'écart entre une tension de référence (Vref) et une tension de contre-réaction (Vfb),
- Régulateur selon la revendication 1, comprenant un comparateur (24) agencé pour comparer la tension d'alimentation (Vbat) et la tension de sortie (Vout) du régulateur, et délivrer à l'amplificateur (22) un signal de mise en veille (Vlc=1) lorsque l'écart (Vd) entre la tension d'alimentation et la tension de sortie du régulateur est inférieur au premier seuil (Vd1).
- Régulateur selon la revendication 2, caractérisé en ce que le comparateur (24) présente une hystérésis de commutation et annule le signal de mise en veille de l'amplificateur (Vlc=0) lorsque l'écart (Vd) entre la tension d'alimentation et la tension de sortie du régulateur est supérieur à un second seuil (Vd2) supérieur au premier seuil (Vd1).
- Régulateur selon l'une des revendications 1 à 3, dans lequel l'amplificateur (22a, 22b) comprend une résistance (Rg) reliant la sortie de l'amplificateur à la tension d'alimentation (Vbat), caractérisé en ce qu'un interrupteur (25) est agencé en série avec la résistance (Rg) et en ce que ledit interrupteur agencé en série avec la résistance est ouvert lorsque l'amplificateur est mis en veille et fermé dans le cas contraire.
- Régulateur selon l'une des revendications 1 à 4, dans lequel l'amplificateur (22b) comprend des sources de courant (6', 8') basculant en mode faible courant lorsque l'amplificateur est mis en veille.
- Régulateur selon l'une des revendications 1 à 5, dans lequel l'amplificateur comprend un interrupteur (27) piloté par un signal de mise en veille (Vlc) pour connecter la grille du transistor de régulation (23) à un potentiel électrique rendant le transistor passant lorsque l'amplificateur est mis en veille.
- Régulateur selon l'une des revendications 1 à 6, dans lequel l'amplificateur (22d) comprend un étage (30) de polarisation de la grille du transistor de régulation (23), agencé pour appliquer sur la grille du transistor de régulation, lorsque l'amplificateur est mis en veille, une tension (Vg) qui est déterminée de manière que la tension grille-source (Vgs) du transistor de régulation soit proche de la tension de seuil (Vtp) du transistor de régulation.
- Régulateur selon l'une des revendications 6 et 7, dans lequel l'alimentation électrique de l'amplificateur (22c, 22d) est supprimée en mode veille par un interrupteur (26).
- Téléphone mobile comprenant une batterie et des circuits radio alimentés par l'intermédiaire d'un régulateur (20) selon l'une des revendications 1 à 8.
- Procédé de gestion de l'énergie disponible dans une batterie (21) alimentant une charge (Z) par l'intermédiaire d'un régulateur de tension (20), le régulateur comprenant un transistor MOS de régulation (23) ayant une première borne de conduction (S) recevant une tension d'alimentation (Vbat) et une seconde borne de conduction (D) reliée à la sortie du régulateur, et un amplificateur (22) dont la sortie pilote la grille du transistor de régulation (23) en fonction de l'écart entre une tension de référence (Vref) et une tension de contre-réaction (Vfb), procédé caractérisé en ce qu'il comprend une étape consistant à surveiller l'écart (Vd) entre la tension d'alimentation (Vbat) et la tension de sortie (Vout) du régulateur, et une étape consistant à faire basculer l'amplificateur (22) dans un mode veille à faible consommation de courant lorsque l'écart (Vd) entre la tension d'alimentation (Vbat) et la tension de sortie (Vout) du régulateur est inférieur à un premier seuil (Vd1), tout en maintenant la grille du transistor de régulation (23) à un potentiel permettant de maintenir le transistor de régulation dans l'état passant.
- Procédé selon la revendication 10, caractérisé en ce que l'on réactive l'amplificateur (20) lorsque l'écart (Vd) entre la tension d'alimentation et la tension de sortie du régulateur est supérieur à un second seuil (Vd2) supérieur au premier seuil (Vd1).
- Procédé selon l'une des revendications 10 et 11, dans lequel on réduit la consommation de l'amplificateur (22, 22a, 22b) en mode veille en déconnectant (25, Vlc=1) le noeud de sortie de l'amplificateur de la tension d'alimentation (Vbat).
- Procédé selon l'une des revendications 10 à 12, dans lequel on réduit la consommation de l'amplificateur (22, 22b) en mode veille en diminuant le courant délivré par des sources de courant (6', 8') internes à l'amplificateur.
- Procédé selon l'une des revendications 10 et 11, dans lequel on supprime l'application de la tension d'alimentation à l'amplificateur en mode veille.
- Procédé selon l'une des revendications 10 à 14, dans lequel on applique sur la grille du transistor de régulation (23), lorsque l'amplificateur est mis en veille, une tension (Vg) qui est déterminée de manière que la tension grille-source (Vgs) du transistor de régulation soit proche de la tension de seuil (Vtp) du transistor de régulation.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0004675 | 2000-04-12 | ||
FR0004675A FR2807846A1 (fr) | 2000-04-12 | 2000-04-12 | Regulateur de tension a faible consommation electrique |
Publications (2)
Publication Number | Publication Date |
---|---|
EP1148404A1 EP1148404A1 (fr) | 2001-10-24 |
EP1148404B1 true EP1148404B1 (fr) | 2005-11-02 |
Family
ID=8849155
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP01108243A Expired - Lifetime EP1148404B1 (fr) | 2000-04-12 | 2001-03-31 | Régulateur de tension à faible consommation électrique |
Country Status (4)
Country | Link |
---|---|
US (1) | US6501253B2 (fr) |
EP (1) | EP1148404B1 (fr) |
DE (1) | DE60114500D1 (fr) |
FR (1) | FR2807846A1 (fr) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2830091B1 (fr) * | 2001-09-25 | 2004-09-10 | St Microelectronics Sa | Regulateur de tension incorporant une resistance de stabilisation et un circuit de limitation du courant de sortie |
US6979984B2 (en) * | 2003-04-14 | 2005-12-27 | Semiconductor Components Industries, L.L.C. | Method of forming a low quiescent current voltage regulator and structure therefor |
US7085943B2 (en) * | 2003-09-26 | 2006-08-01 | Freescale Semiconductor, Inc. | Method and circuitry for controlling supply voltage in a data processing system |
US7446514B1 (en) * | 2004-10-22 | 2008-11-04 | Marvell International Ltd. | Linear regulator for use with electronic circuits |
JP4651428B2 (ja) * | 2005-03-28 | 2011-03-16 | ローム株式会社 | スイッチングレギュレータ及びこれを備えた電子機器 |
US7450354B2 (en) * | 2005-09-08 | 2008-11-11 | Aimtron Technology Corp. | Linear voltage regulator with improved responses to source transients |
US8049551B2 (en) * | 2008-06-17 | 2011-11-01 | Monolithic Power Systems, Inc. | Charge pump for switched capacitor circuits with slew-rate control of in-rush current |
JP5489502B2 (ja) * | 2009-03-19 | 2014-05-14 | キヤノン株式会社 | 電源装置 |
US9134741B2 (en) * | 2009-06-13 | 2015-09-15 | Triune Ip, Llc | Dynamic biasing for regulator circuits |
JP5501696B2 (ja) * | 2009-08-19 | 2014-05-28 | オリンパス株式会社 | 実装装置および実装方法 |
US8022770B1 (en) * | 2010-05-27 | 2011-09-20 | Skyworks Solutions, Inc. | System and method for preventing power amplifier supply voltage saturation |
US8384465B2 (en) | 2010-06-15 | 2013-02-26 | Aeroflex Colorado Springs Inc. | Amplitude-stabilized even order pre-distortion circuit |
US20110309808A1 (en) | 2010-06-16 | 2011-12-22 | Aeroflex Colorado Springs Inc. | Bias-starving circuit with precision monitoring loop for voltage regulators with enhanced stability |
TWI420275B (zh) * | 2010-07-13 | 2013-12-21 | Sitronix Technology Corp | Switching capacitor voltage regulator |
US20120194150A1 (en) * | 2011-02-01 | 2012-08-02 | Samsung Electro-Mechanics Company | Systems and methods for low-battery operation control in portable communication devices |
CN102298408A (zh) * | 2011-04-22 | 2011-12-28 | 上海宏力半导体制造有限公司 | 稳压电路 |
TWM422090U (en) * | 2011-08-29 | 2012-02-01 | Richtek Technology Corp | Linear regulator and control circuit thereof |
CN102545855B (zh) * | 2012-01-17 | 2017-04-05 | 南京航空航天大学 | 基于闭环控制的功率开关管驱动方法及系统 |
JP2013186721A (ja) * | 2012-03-08 | 2013-09-19 | Toyota Motor Corp | 電源回路とそれを用いた電子制御装置 |
FR2988869A1 (fr) * | 2012-04-03 | 2013-10-04 | St Microelectronics Rousset | Regulateur a faible chute de tension a etage de sortie ameliore |
JP6008678B2 (ja) * | 2012-09-28 | 2016-10-19 | エスアイアイ・セミコンダクタ株式会社 | ボルテージレギュレータ |
US9201436B2 (en) * | 2013-07-22 | 2015-12-01 | Entropic Communications, Llc | Adaptive LDO regulator system and method |
EP2846213B1 (fr) * | 2013-09-05 | 2023-05-03 | Renesas Design Germany GmbH | Procédé et appareil permettant de limiter le courant d'appel pour le démarrage d'un régulateur à faible chute de tension |
US9177617B2 (en) * | 2013-10-08 | 2015-11-03 | Cypress Semiconductor Corporation | Methods circuits apparatuses and systems for providing current to a non-volatile memory array and non-volatile memory devices produced accordingly |
EP3051378B1 (fr) * | 2015-01-28 | 2021-05-12 | ams AG | Circuit régulateur à faible chute de tension et procédé pour commander une tension d'un tel circuit |
CN105549673B (zh) * | 2015-12-25 | 2017-01-25 | 上海华虹宏力半导体制造有限公司 | 双模切换式ldo电路 |
US10761549B2 (en) * | 2017-01-12 | 2020-09-01 | Microsemi Corporation | Voltage sensing mechanism to minimize short-to-ground current for low drop-out and bypass mode regulators |
DE102017201705B4 (de) * | 2017-02-02 | 2019-03-14 | Dialog Semiconductor (Uk) Limited | Spannungsregler mit Ausgangskondensatormessung |
CN109871059B (zh) * | 2019-02-25 | 2020-07-14 | 华中科技大学 | 一种超低电压ldo电路 |
CN110011536A (zh) * | 2019-05-06 | 2019-07-12 | 核芯互联(北京)科技有限公司 | 一种新型电源电路 |
US11625056B2 (en) * | 2021-03-12 | 2023-04-11 | Steradian Semiconductors Private Limited | Low noise voltage regulator |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4319179A (en) * | 1980-08-25 | 1982-03-09 | Motorola, Inc. | Voltage regulator circuitry having low quiescent current drain and high line voltage withstanding capability |
IT1245421B (it) * | 1991-02-27 | 1994-09-20 | Sgs Thomson Microelectronics | Regolatore di tensione a bassa caduta |
US5355077A (en) * | 1992-04-27 | 1994-10-11 | Dell U.S.A., L.P. | High efficiency regulator with shoot-through current limiting |
FI96153C (fi) * | 1994-04-18 | 1996-05-10 | Nokia Mobile Phones Ltd | Menetelmä jänniteregulaattorilla varustetun elektronisen laitteen tehonkulutuksen pienentämiseksi, ja jänniteregulaattorilla varustettu elektroninen laite, joka säästää sähkötehoa |
US6046577A (en) * | 1997-01-02 | 2000-04-04 | Texas Instruments Incorporated | Low-dropout voltage regulator incorporating a current efficient transient response boost circuit |
FR2807847B1 (fr) * | 2000-04-12 | 2002-11-22 | St Microelectronics Sa | Regulateur lineaire a faible surtension en regime transitoire |
US6246221B1 (en) * | 2000-09-20 | 2001-06-12 | Texas Instruments Incorporated | PMOS low drop-out voltage regulator using non-inverting variable gain stage |
-
2000
- 2000-04-12 FR FR0004675A patent/FR2807846A1/fr active Pending
-
2001
- 2001-03-31 DE DE60114500T patent/DE60114500D1/de not_active Expired - Lifetime
- 2001-03-31 EP EP01108243A patent/EP1148404B1/fr not_active Expired - Lifetime
- 2001-04-04 US US09/826,299 patent/US6501253B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6501253B2 (en) | 2002-12-31 |
DE60114500D1 (de) | 2005-12-08 |
US20010030530A1 (en) | 2001-10-18 |
EP1148404A1 (fr) | 2001-10-24 |
FR2807846A1 (fr) | 2001-10-19 |
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