EP1032979A2 - Arrangement and method relating to radio communication - Google Patents

Arrangement and method relating to radio communication

Info

Publication number
EP1032979A2
EP1032979A2 EP98951878A EP98951878A EP1032979A2 EP 1032979 A2 EP1032979 A2 EP 1032979A2 EP 98951878 A EP98951878 A EP 98951878A EP 98951878 A EP98951878 A EP 98951878A EP 1032979 A2 EP1032979 A2 EP 1032979A2
Authority
EP
European Patent Office
Prior art keywords
signal
arrangement
filter
filtering
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP98951878A
Other languages
German (de)
English (en)
French (fr)
Inventor
Hakan Grenabo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Publication of EP1032979A2 publication Critical patent/EP1032979A2/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B15/00Suppression or limitation of noise or interference
    • H04B15/02Reducing interference from electric apparatus by means located at or near the interfering apparatus
    • H04B15/04Reducing interference from electric apparatus by means located at or near the interfering apparatus the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B2215/00Reducing interference at the transmission system level
    • H04B2215/064Reduction of clock or synthesizer reference frequency harmonics

Definitions

  • the present invention relates to an arrangement and a method of suppressing clock overtones in a receiving arrangement of a radio communcation system.
  • the invention also relates to a receiving arrangement in a radio communication system receiving signals within at least one frequency band and in which clock overtones may be produced.
  • CONFIRMATION COPY frequency range but if a broadband receiving arrangement is needed, or, if the same digital blocks are to be reused in different arrangements intended for different frequencies, frequency planning will simply not function.
  • Today the same standard is often applied in different frequency bands and it is an advantage to be able to reuse the digital part of a construction whereas the radio frequent part is exchanged.
  • Frequency planning will also not function since it is very difficult to find a set of oscillator frequencies for which no overtone or combination of overtones fall within the bandwidth (s) of the receiver, particularly if two frequency bands are used such as for example 800 and 1500 MHz.
  • An arrangement for suppressing clock overtones is also needed allowing reuse of the digital part of the arrangement in different parts intended for different frequencies.
  • an arrangement which enables suppression of clock overtones when the signal strength varies rapidly or when the amplitude varies rapidly and to a high extent.
  • an arrangement which enables the handling of the fast variations in signal strength that are produced in the input signal in a TDMA (time division multiple access) system.
  • TDMA time division multiple access
  • a number of users share one and the same frequency, i.e. a number of users are assigned one time slot each.
  • a receiving arrangement in a radio communication system is also needed through which the above mentioned objects are achieved as well a method of suppressing clock overtones in a receiving arrangement of a radio communication system through which the above mentioned objects are fulfilled.
  • an arrangement which comprises a number of phase locking means for locking the oscillators which might produce a disturbing frequency in relation to each other or in relation to a reference clock so that all clock overtone frequencies are co-located and well defined within the frequency band.
  • the arrangement also includes a filtering arrangement for filtering out said .clock overtones so as to produce an output signal substantially free from clock overtones.
  • the filter arrangement comprises a narrow band digital filter. If the variation in amplitude of the signal is slow, the filtering arrangement advantageously comprises a high pass filter or a band reject filter which is applicable for example in an FDMA
  • the filtering arrangement comprises a number of filtering means, each of which comprises a low pass filter or a bandpass filter for filtering of the input signal and signal adding means for subtracting the (low pass) filtered signal from the input signal.
  • input signal is here meant the signal input to the filtering arrangement which is output from the phase locking means .
  • the filtering means particularly include comparing means for comparing the absolute value of the input signal amplitude with a given threshold value and the filter is inactivated if the signal amplitude exceeds the given threshold value.
  • the (low pass) filter is advantageously advanced stepwise if the amplitude of the received signal is below the threshold value.
  • the (low pass) filter is a digital filter.
  • the comparing means operates using hystheresis. In that way is avoided that, in a transition area, the signal modulation makes the filter repeatedly alternate between an integrating and a holding mode of operation.
  • a low pass filter in combination with signal adding means is advantageously used if the amplitude of the input signal varies much and/or rapidly.
  • the radio communication system comprises a TDMA access system in which a number of users share the same frequency, each user being assigned a different time slot.
  • filter means high pass filters or band reject filters
  • time controlling means assigning one filter for the signal in each respective time slot and for selecting an output signal from one of the filters, i.e. selecting one of the filters as the active one to produce an output signal .
  • the phase locking means comprises a number of phase locked loops (PLLs) .
  • PLLs phase locked loops
  • the disturbing signal has been transformed or converted to zero frequency by a preceding radio receiver in combination with the digital signal processing. After the disturbing signal has been suppressed, the useful signal can be converted to the desired frequency.
  • the frequencies in the system are so chosen that the second frequency conversion, i.e. the conversion of the useful frequency to a desired frequency, is not needed.
  • the arrangement is implemented as a digital application specific integrated circuit (ASIC) .
  • ASIC application specific integrated circuit
  • a receiving arrangement for receiving signals within at least one frequency band comprises a number of oscillators, digital clocking means and mixing means for selecting a channel and converting down a , received signal to base band or to an intermediate frequency.
  • the receiving arrangement comprises a number of phase locking means, particuarly phase locked loops (PLL) for locking the oscillating means and the digital clocking means in relation to each other so that all generated disturbing frequencies are co-located and well defined within the frequency band(s) .
  • PLL phase locked loops
  • a filtering arrangement particularly a narrow filter, is used for filtering out the disturbing frequencies.
  • the receiving arrangement is used in a TDMA system in which a number of users share one and the same frequency in that one time slot is assigned for each user. This may produce a considerable variation in signal amplitude from one time slot to another, and to handle this particular situation, or more generally a situation in which the signal amplitude varies rapidly or to a high extent
  • the filtering arrangement includes a bandpass filter, or particularly a low-pass filter (if the signal has been converted to zero frequency) for filtering of the received signal which is input to the filtering arrangement after the frequencies have been locked in relation to each other.
  • the filtering arrangement also includes signal adding means for subtracting the filtered signal from the input signal.
  • the filtering means includes comparing means for comparing the absolute value of the input signal amplitude with a given threshold value and the filtering means is activated if the signal amplitude exceeds the given threshold value. If the amplitude of the received signal is below the threshold value, the bandpass filter (or the low-pass filter) is advanced stepwise.
  • comparing means for comparing the absolute value of the input signal amplitude with a given threshold value and the filtering means is activated if the signal amplitude exceeds the given threshold value. If the amplitude of the received signal is below the threshold value, the bandpass filter (or the low-pass filter) is advanced stepwise.
  • controlling means being provided using a time base for time control and for selecting one of the filter means to be the active one through a clock enable signal and using the signal from the active filter as output data.
  • a method of suppressing clock overtones generated or produced in a receiving arrangement of a radio communication system includes the steps of: locking all oscillating means and digital clocks that might produce a disturbing frequency to each other or to a predetermined reference clock so that the frequencies are co-located and well defined within the frequency band and using a filter arrangement to filter out the co-located and well defined disturbing frequencies.
  • the method is applied on a signal which varies rapidly, or to a high extent, in amplitude such as for example in a TDMA access system.
  • the absolute value of a received and a selected signal is then taken.
  • the received signal i.e.
  • the absolute value of its amplitude is in comparing means compared with a given threshold value, and, if the signal amplitude is lower than the given threshold value, a bandpass or a low-pass filter is advanced stepwise, otherwise the value is maintained.
  • the signal is then passed through the filter and the filtered signal is subtracted from the input, or the received, signal to provide an output signal thus being the difference between the input signal and the filtered signal.
  • a number of filter means can be provided each e.g. for the signal in a particular time slot, in which case the filters comprise band reject filters (high pass filters) .
  • FIG 1 shows a simplified filtering arrangement according to a first embodiment of the invention in which the amplitude of the input signal varies slowly
  • FIG 2a shows an input signal having a fast variation in signal strength
  • FIG 2b shows the output signal for an input signal as in Fig 2a if an arrangement according to the embodiment of Fig 1 is used
  • FIG 3 shows an alternative embodiment of a filtering arrangement according to the invention for an input signal having a fast variation in signal strength
  • FIG 4 shows an embodiment similar to that of Fig 3 in which automatic gain control is implemented
  • FIG 5 shows an example on a phase locked loop (PLL)
  • FIG 6 shows a phase locking arrangement according to the invention which comprises two phase locked loops
  • FIG 7 shows an alternative embodiment of a filtering arrangement using a number of filters, one for each time slot in a TDMA system
  • FIG 8 is a simplified flow diagram relating to suppressing of clock overtones according to one embodiment of the invention.
  • all oscillators i.e. all oscillating means such as local oscillators and digital clocks are phase locked for example using PLL:s as further discussed under reference to Figs 5 and 6 so that all potential disturbing frequencies are well defined within the frequency band.
  • the disturing frequencies are filtered out through the use of a filter, for example a narrow digital filter. If the arrangement is used in a system in which the variation in signal amplitude is comparatively slow, for example a FDMA (frequency division multiple access) system, a high pass filter, or more generally, a band reject filter can be used.
  • FDMA frequency division multiple access
  • a bandpass filter or particularly a low pass filter is used and the difference is taken between the filtered input signal and the input signal .
  • Such a filter arrangement 30 is schematically illustrated in Fig. 1.
  • Input signal I .IN received from a phase locking arrangement, (i.e. the frequencies of oscillators, digital clocks are locked to each other enabling filtering out of disturbing frequencies) , is filtered in bandpass (low pass) filter 33.
  • bandpass filter 33 In adding means 34 the filtered signal I is subtracted from the input signal I
  • a threshold value is set which is so high that the filter 33 always is active.
  • the disturbing signal has been converted to zero frequency by a preceding radio receiver in combination with digital signal processing.
  • this has in no way a limiting effect on the applicability of the inventive concept since, after suppression of the disturbing frequencies, the useful signal can be converted to the wanted frequency.
  • the frequencies used in the system are so chosen that there is no need to convert the useful signal .
  • a high pass filter having a limiting frequency (threshold frequency) which is so low that the useful signal is not affected considerably can be used (if the signal strength varies slowly) .
  • the limiting frequency must at the same time be sufficiently high to suppress the undesired low frequency component .
  • the disturbing frequency is already at zero frequency (as well as the frequency of the useful signal) . Then a lowpass filter is used and the disturbing signal is subtracted from the useful signal .
  • the center frequency of the useful signal is not zero and a conversion is performed so that the disturbing frequency is converted to zero. Then a lowpass filter as discussed above can be used ,but when the disturbing frequency has been subtracted, the signal has to be converted to zero frequency.
  • the useful frequency can be centered around zero but not the disturbing frequency. Then a bandpass filter is used to give the disturbing frequency. The disturbing frequency is then subtracted from the signal in any convenient manner.
  • a TDMA system the variation in received signal strength between different users can vary a lot. This means that, when there is a change from a strong signal to a weak signal, the remaining imbalance from the strong signal will not have time to fade out before reception of the weak signal starts. This makes the reception of the weak signal poor or even impossible. This will in the following be further described under reference to Figs. 2a and 2b. If the signal in one time slot (each user is assigned a particular time slot) is strong, whereas signals of the other time slots are weak, is schematically illustrated in Fig. 2a which is a simplified illustration showing an input signal I comprising one
  • TDMA-frame with three time slots per carrier frequency, time slots TS 1, 2 and 3, the signal in time slot 1 being strong.
  • the lowpass filtered signal I will then be as in Fig. 2b.
  • the remaining imbalance from the signal in time slot 1 will disturb time slot 2 if its level is not well below the noise floor. Through inactivating the filter for strong signals, the remaining disturbance will be prevented from being too high. If for example a threshold value of 20dB above the noise level is used, and the signal is suppressed 30dB in the filter, the disturbing signal will be eliminated whereas the "tail" will be about lOdB below the noise level and it will thus not disturb the weak signals, e.g. the signal from time' slot 2.
  • FIG. 3 an arrangement for suppressing a low frequency signal component is illustrated.
  • An input signal I is provided, (from a phase locking arrangement) , for example an input signal of a TDMA system with a fast variation in amplitude.
  • Means 41 are provided for taking the absolute value of the amplitude of the input signal
  • the input signal is either real or complex. If the input signal is a complex signal, an approximation of the absolute value is given through integrating over the absolute value of the quadrature components, ⁇ JI 2 + Q 2 * I 1 ! + IQi) ⁇
  • comparing means 42 the absolute value is compared with a given threshold value THR. If the absolute value of the signal is below the threshold value, the low-pass filter 43 is advanced stepwise and if the absolute value is above the threshold, the preceding value is kept.
  • adding means 44 the low-pass filtered signal i": is
  • the signal output from the low-pass filter 43 is only affected when the total amplitude is small and therefore a long time constant can be used in such a filter still preventing a strong input signal from creating any residues in the filter.
  • the comparing means 42 uses a hystheresis. Within a transition area it is then prevented that the modulation of the signal makes the filter repeatedly alternate between an integrating and a holding state.
  • the bandwidth of the low-pass filter is chosen to be sufficiently small so as to only have a neglectable effect on the useful signal but it still has 'to be large enough so as to suppress the disturbing signal which, because of phase noise of the oscillators in the system, may have a certain bandwidth.
  • the disturbing signal generally has the character of a leaking signal and in that it is small as compared to the available width of signal.
  • Fig. 4 a filtering arrangement 50 similar to that of Fig. 3 is illustrated but in which automatic gain control (AGC) is applied.
  • AGC automatic gain control
  • the filter can have a cut-off frequency determined only by the width of the leakage signal or the disturbing signal. If however, the reference frequency from a first local oscillator and the sampling frequency come from different sources, a non-zero bandwidth is requried.
  • a recursive filter can be used (of course also other filter types can be used) , for which the cut-off frequency can be low enough so as not to produce any phase shift of the wanted signal.
  • the filtering arrangement 50 also in this case comprises means 51 for taking the absolute value of the signal, comparing means 52 and a low-pass filter 53 and adding means 54 in which the difference is taken between the input signal I I s N o and the low-pass filtered signal I 50.
  • the low-p c ass filter 53 is only advanced if the absolute value of the signal level is below a certain threshold value. In this way a strong signal does not create any residues in the filter.
  • the filter is not used at all in this particular embodiment and switches 55,56 are used through which the filter is "disconnected/connected" .
  • This embodiment substantially corresponds to that of Fig. 3, it is merely intended to show that AGC can be implemented and that AGC may produce additional disturbances having to be handled.
  • the gain control is used, e.g. if the gain is controlled, this generally means that the signal is quite strong, and then the filtering functionality may have to be disconnected as illustrated through the switches.
  • a block diagram of a phase locked loop (PLL) 10 is schematically illustrated, a number of which PLL:s can be implemented in the phase locking arrangement as referred to in the foregoing.
  • a signal I REF giving the time base, i.e. the reference frequency is in dividing means 12 divided by a factor N.
  • the VCO- signal (to be locked) having a frequency f ou ⁇ is divided by a factor M in dividing means 13.
  • a phase detector 14 gives an output signal with pulses having a width which is proportional to the phase difference between the two divided signals.
  • the signal is then filtered in the loop filter 15 and fed back as a control signal to the VCO to minimize the error of the signal from the loop filter which is proprtional to the error in phase.
  • M and N f ou ⁇ can be controlled and used for example to set a channel.
  • This PLL 10 is however only one simple example of a PLL that can be used. Many other kinds of PLL:s can of course also be used.
  • FIG. 6 an arrangement 100 according to the invention comprising a locking arrangement 20 with two phase locking means 22,23 for locking the oscillating means and the digital clocking means in relation to the reference oscillator 21 and to each other and a filtering arrangement 40 as disclosed in Fig. 3 is illustrated.
  • the reference oscillator 21 generates an input signal with the reference frequency I REF 20 .
  • a channel selection is carried out through setting f 22 being the frequency of the local oscillator 23 and f M being the frequency of the input signal 1 ⁇ .
  • the signal will then be converted to zero frequency in the mixer 25.
  • An RF-filter 24 is implemented in the receiving arrangement in a conventional manner.
  • ⁇ f is the bandwidth of the input signal I___ divided by two.
  • a receiving arrangement generally comprises several filters, mixers, amplifiers etc. but this is not further discussed herein, since it is supposed to be well known to the person skilled in the art how a receiving arrangement can be built.
  • Fig. 7 an alternative embodiment of a filtering arrangement 60 is illustrated. It is supposed that all oscillators are locked to each other (or rather to a reference frequency) in any convenient manner, for example as discussed with reference to Fig. 6. This arrangement is also applicable to a receiving arrangement in a TDMA based system or more generally in a system in which an input signal varies much or rapidly in amplitude.
  • one of the filters is enabled or selected to be active, and in the illustrated embodiment it is the second filter means 62.
  • the signal I 0 ⁇ from the selected filter 62 is provided from the multiplexer 69B.
  • the limits of the time slots can be predicted with sufficient accuracy. That in Fig. 7 eight filter means are illustrated corresponding to eight time slots as used in for example the GSM system, is merely given as an example for illustrative purposes. IN .
  • the input signal I received n receiving arrangement 60 is a signal output from a locking arrangement, e.g. as disclosed in Fig. 6.
  • Fig. 8 a flow diagram relating to one particular embodiment is schematically illustrated.
  • a first step all oscillators and digital clocks are locked in relation to each other or in relation to a reference (which also inherently means that they are locked to each other), 110. All is here taken to mean all oscillators/digital clocks which might produce a disturbing frequency or clock overtones.
  • the locking as such is not described so carefully since it can be done in different ways.
  • the important aspect is that locking actually is provided for, e.g. using PLL:s instead of freely oscillating oscillators as in hitherto known arrangements used for the same purpose, which does not permit any filtering out of disturbing frequencies. Filtering is then, according to the invention, performed using any of the arrangements described herein.
  • a locked signal is thus received in a filtering arrangement, 120.
  • a predetermined threshold value is used.
  • the absolute value of the signal amplitude is then calculated, 130, as discussed earlier in the application and after that the absolute value of the signal amplitude is compared in comparing means with the given threshold value, 140. If the absolute value of the amplitude exceeds the threshold value, 150, the filter value is kept, 160. If, on the other hand, the absolute value of the signal amplitude is lower than the threshold value, the filter is advanced stepwise, 151.
  • the signal is then passed through the low-pass filter, 170, and provided to adding means in which the low-pass filtered signal is subtracted from the received signal, 180.
  • the signal so obtained is then ouput, 190.
  • more generally a band pass filter is used.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Noise Elimination (AREA)
EP98951878A 1997-10-29 1998-10-27 Arrangement and method relating to radio communication Withdrawn EP1032979A2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SE9703944 1997-10-29
SE9703944A SE9703944L (sv) 1997-10-29 1997-10-29 Anordning och förfarande avseende radiokommunikation
PCT/SE1998/001935 WO1999022456A2 (en) 1997-10-29 1998-10-27 Arrangement and method relating to radio communication

Publications (1)

Publication Number Publication Date
EP1032979A2 true EP1032979A2 (en) 2000-09-06

Family

ID=20408782

Family Applications (1)

Application Number Title Priority Date Filing Date
EP98951878A Withdrawn EP1032979A2 (en) 1997-10-29 1998-10-27 Arrangement and method relating to radio communication

Country Status (6)

Country Link
EP (1) EP1032979A2 (ja)
JP (1) JP2001522158A (ja)
CN (1) CN1283335A (ja)
AU (1) AU9771498A (ja)
SE (1) SE9703944L (ja)
WO (1) WO1999022456A2 (ja)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6804497B2 (en) 2001-01-12 2004-10-12 Silicon Laboratories, Inc. Partitioned radio-frequency apparatus and associated methods
US7024221B2 (en) 2001-01-12 2006-04-04 Silicon Laboratories Inc. Notch filter for DC offset reduction in radio-frequency apparatus and associated methods
US6970717B2 (en) * 2001-01-12 2005-11-29 Silicon Laboratories Inc. Digital architecture for radio-frequency apparatus and associated methods
US7035611B2 (en) 2001-01-12 2006-04-25 Silicon Laboratories Inc. Apparatus and method for front-end circuitry in radio-frequency apparatus
US7158574B2 (en) 2001-01-12 2007-01-02 Silicon Laboratories Inc. Digital interface in radio-frequency apparatus and associated methods
WO2002056488A2 (en) * 2001-01-12 2002-07-18 Silicon Lab Inc Digital interface in radio-frequency apparatus and associated methods
US7177610B2 (en) 2001-01-12 2007-02-13 Silicon Laboratories Inc. Calibrated low-noise current and voltage references and associated methods
US7031683B2 (en) 2001-01-12 2006-04-18 Silicon Laboratories Inc. Apparatus and methods for calibrating signal-processing circuitry
US7138858B2 (en) 2001-01-12 2006-11-21 Silicon Laboratories, Inc. Apparatus and methods for output buffer circuitry with constant output power in radio-frequency circuitry
AU2003220281A1 (en) 2002-03-15 2003-09-29 Silicon Laboratories Inc. Radio-frequency apparatus and associated methods
EP1675286A1 (en) * 2004-12-22 2006-06-28 Siemens Aktiengesellschaft Interference rejection in a receiver
US8489040B2 (en) 2010-02-18 2013-07-16 Telefonaktiebolaget L M Ericsson (Publ) Double clipped RF clock generation with spurious tone cancellation
EP2600544B1 (en) 2011-11-30 2014-10-15 Telefonaktiebolaget L M Ericsson (publ) Technique for crosstalk reduction
CN105306080B (zh) * 2015-11-30 2017-08-25 上海航天测控通信研究所 一种x频段星载锁相接收机

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GB2284718A (en) * 1990-10-10 1995-06-14 Motorola Inc Adjusting telephone bandwidth using variable integrated transconductance filter

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WO1995031860A1 (en) * 1993-09-13 1995-11-23 Analog Devices, Inc. Digital-to-digital conversion using nonuniform sample rates

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Publication number Priority date Publication date Assignee Title
GB2284718A (en) * 1990-10-10 1995-06-14 Motorola Inc Adjusting telephone bandwidth using variable integrated transconductance filter

Also Published As

Publication number Publication date
SE9703944L (sv) 1999-04-30
AU9771498A (en) 1999-05-17
CN1283335A (zh) 2001-02-07
JP2001522158A (ja) 2001-11-13
WO1999022456A3 (en) 1999-07-15
WO1999022456A2 (en) 1999-05-06
SE9703944D0 (sv) 1997-10-29

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