EP0978116B1 - Verfahren und vorrichtung zur speicherung von tonfolgen in cyclischen schleifen - Google Patents

Verfahren und vorrichtung zur speicherung von tonfolgen in cyclischen schleifen Download PDF

Info

Publication number
EP0978116B1
EP0978116B1 EP97937616A EP97937616A EP0978116B1 EP 0978116 B1 EP0978116 B1 EP 0978116B1 EP 97937616 A EP97937616 A EP 97937616A EP 97937616 A EP97937616 A EP 97937616A EP 0978116 B1 EP0978116 B1 EP 0978116B1
Authority
EP
European Patent Office
Prior art keywords
loops
memory
fact
addresses
loop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP97937616A
Other languages
English (en)
French (fr)
Other versions
EP0978116A1 (de
Inventor
Emmanuel Perille
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=9494992&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=EP0978116(B1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Individual filed Critical Individual
Publication of EP0978116A1 publication Critical patent/EP0978116A1/de
Application granted granted Critical
Publication of EP0978116B1 publication Critical patent/EP0978116B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10H—ELECTROPHONIC MUSICAL INSTRUMENTS; INSTRUMENTS IN WHICH THE TONES ARE GENERATED BY ELECTROMECHANICAL MEANS OR ELECTRONIC GENERATORS, OR IN WHICH THE TONES ARE SYNTHESISED FROM A DATA STORE
    • G10H1/00—Details of electrophonic musical instruments
    • G10H1/0033—Recording/reproducing or transmission of music for electrophonic musical instruments
    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10H—ELECTROPHONIC MUSICAL INSTRUMENTS; INSTRUMENTS IN WHICH THE TONES ARE GENERATED BY ELECTROMECHANICAL MEANS OR ELECTRONIC GENERATORS, OR IN WHICH THE TONES ARE SYNTHESISED FROM A DATA STORE
    • G10H2250/00—Aspects of algorithms or signal processing methods without intrinsic musical character, yet specifically adapted for or used in electrophonic musical processing
    • G10H2250/541—Details of musical waveform synthesis, i.e. audio waveshape processing from individual wavetable samples, independently of their origin or of the sound they represent
    • G10H2250/641—Waveform sampler, i.e. music samplers; Sampled music loop processing, wherein a loop is a sample of a performance that has been edited to repeat seamlessly without clicks or artifacts

Definitions

  • the present invention relates to a method and a device for recording in cyclic loops of several sequences phonics, with a view to simultaneous reproduction thereof, by means of of a device using sampled sound signals and including a memory, a memory control unit and a means sound reproduction.
  • the invention is particularly useful for a device pseudo multi-track play-back type intended to reproduce cyclic according to a given rhythmic coefficient different signals phonics sampled and stored in accordance with the method of the invention.
  • a processor of audio signals that can both sample and process signals audio.
  • the processor can also process external audio signals in real time so as to get complex effects of choruses and echo.
  • the sampled audio signal is split in two parts of which one is treated separately from the other.
  • EP-A-0 551 884 which deals with a sound signal generator adapted to be connected to a microcomputer.
  • EP-A-0 484 047 which relates a device providing an audio signal requiring a so-called MIDI for cyclical synchronization.
  • a simple solution to get a background cyclical music is to reproduce, in a continuous way repeated, one or more sound passages all stalled in the same musical rhythm.
  • This can be achieved by a device that reproduces, from a reading of a memory, different signals phonic.
  • these phonic signals have been previously sampled and digitized to be arranged in memory.
  • the object of the present invention is to obviate these disadvantages with a method and a device of relaxed type not requiring a trigger sequence to obtain a signal synchronization.
  • Another object of the invention is to determine a device can be used in a simple way by a non-professional.
  • Yet another object of the invention is to treat basically the human voice.
  • the default values of the loops are previously determined.
  • the control unit includes a cyclic address generator dedicated to each of the loops
  • the duration of the recording is limited to strict duration of the determined loop, this duration being determined by the tempo, the number of measures of the loop and the frequency sampling.
  • the device includes a sampler, a random access memory, a memory control including a cyclic address generator dedicated to each of the loops and a means of sound reproduction; address generators dedicated to each of the loops evolve from cyclic way continuously depending on the frequency sampling, with loop values chosen by default.
  • the device comprises means allowing to modify the default values of the loops and, in particular, to set a common tempo for all loops, the number of each of the loops before recording, and the frequency sampling.
  • FIG. 1 shows thus a device of the type digital unit comprising a control unit 101 including a control unit 103 memory control, a sampler and all circuits required for the management of the device.
  • the memory 103 is here of the random access type accessible in writing and reading at from the control unit 101.
  • sampling means, of course, conventional way a device for sampling a signal analogue phonics, but also a functional means of treatment an already digitized signal from, for example, a reading disc optical or computer.
  • the sampler normally includes an analog-to-digital converter preceded by anti-aliasing filters of analog signals.
  • the sampler includes a decoder of digital input signals, and is limited to either resampling the input signal at the rhythm of the sampling frequency of output signals, ie to convert the sampling frequency, this which can allow the device to work at another frequency than that of the transmission link. Double sequential memory access can be favorably expected when the digital signal input is transmitted in the form of very high speed packets.
  • the sampler is of a type conventional, since the phonic input signal comes from a microphone.
  • the control unit 101 initially reads the values by default to apply to the loops, ie the common tempo, the number of measurements and the sampling frequency of the signals phonic. Address cyclic generators work from now on permanently based on these values. Preferably this This is done when the device is put into service. However, it can be expected that it is performed simultaneously when starting a recording.
  • the user can enter the desired values inputs 105, 107 and 109 of the control unit 101.
  • the generators cyclic addresses then operate permanently on the basis of these new values.
  • the signals phonics that will be processed originate from a 111 microphone. Although this is not highlighted on the drawing, the Stereophony can easily be implemented here.
  • the signal coming of the microphone 111 is applied to the input 113 of the control unit 101 for sampling and storage, via a amplifier 115 for adjusting the initial volume.
  • the characteristics of the delay line are directly controlled by the control unit 101. In practice, this delay line 121 is theoretical, since the control unit 101 and the memory 103 are charged echo like any other loop.
  • the signal applied to the input 113 of the control unit 101 is therefore already processed in according to the choices of the user.
  • the user wears, in the example shown, a helmet 131 allowing him to simultaneously listen to what is being to be saved in memory.
  • the control unit 101 cyclically reads the other loops previously recorded.
  • Figure 1 there is shown, for reasons of clarity, that three outlets 133 each provided with a amplifier, and connected to a summator 135 to ensure the mix. Of course, this number of outputs represented is in no way limiting.
  • the signal from this summator 135 is applied, via an amplifier 139, to another summator 137 to which the signal from summator 117 is applied.
  • the internal clock of the control unit delivers, according to the values of the loops, a signal to a metronome 141 whose output is connected via an amplifier 143 to the summator 137.
  • the user whose helmet is connected to the exit of the summator 137, then receives all the signals from the microphone 111, corresponding echo, previously recorded loops 133 and metronome 141, these signals are thus directly mixed.
  • control unit 101 is provided with a means of limiting the duration of the registration to the strict length of the loop.
  • length of the loop we means the number of samples it may contain, and not the recording time of the phonic sequence.
  • a switch 145 at the microphone output 111 controlled by the unit of command 101 by an output 147 is symbolic, since its function is obtained more simply by controlling the address generator of the loop.
  • the loops are actually synchronous and it is not no longer necessary to use any trigger sequence.
  • the origin of the signals is represented here as being a microphone 111. If these come from a pre-recorded source, for example a disk or a magnetic tape, a registration temporal signals may be necessary to ensure possible better juxtaposition. Such a registration is easy to perform by ear playing on the available parameters.
  • the device essentially comprises, in combination, a first counter 2 modulates the rhythmic coefficient, a second bit counter 7, a parameter memory 9 and a combinatorial operator 13.
  • the first counter 2 to modulo programmable by through a register 3 according to the rhythmic coefficient recorded in this register 3, evolves with each period of a signal sampling 4 audio signals applied to the first counter 2, and delivers, on the one hand, the lower part of the address in the memory random access 103 and, on the other hand, an overflow hold 6 at the second counter 7, which evolves with this restraint 6 for to issue a base address 8 applied to the combinatorial operator 13.
  • the parameter memory 9 delivers, for a signal determined from the sampled audio signals, a vector of masking 11 and a substitution vector 12 applied to the combinatorial operator 13.
  • the latter delivers the upper part 14 of the address in random access memory 103 by selecting to using the masking vector 11 the binons to transparen of the base address 8 and assigning a value determined according to the substitute vector 12 to each of the other binons of the address of base 8.
  • the parameters included in the parameter memory 9 are, preferably, determined once and for all during the coding of the program, the length and location in memory of the loops being pre-established. However, it is possible to provide for a modification of these settings running the program by means of a appropriate interface.
  • the programmable modulo counter 2 produces the lower part 5 common to the audio samples of the signals to be reproduced during a given period of the sampling signal 4.
  • the counter 2 describes a cyclic sequence whose number of states is programmed by the rhythmic coefficient, coefficient which is, by example, saved in a register 3, and generates periodically, when the sequence re-starts at the same initial state, a signal of hold 6 which increments (or decrements) the second binary counter 7 delivering the base address 8.
  • the parameter memory 9 delivers, in addition, to the operator combinatory 13, a reset value 15 which is added to the address base 8 before application of the aforementioned vectors 11 and 12 to determine the upper part of the address in the access memory random.
  • the offset is quantified by sample blocks function of the rhythmic coefficient, which is clearly enough in rhythmic precision with respect to the duration average of a measurement. For example, with an equal rhythmic coefficient at 650 and a sampling frequency of 32 kHz, the offset that one can get is of the order of 20 ms.
  • the device further comprises a pointer memory 16 where the upper part of the address is written by the combinatorial operator 13 when issuing a hold of overrun 6 by the first counter 2 to modulo programmable, this upper part of the address in the random access memory being reproduced at each period of the sampling signal. 4 per reading for the selected audio signal from the pointer memory 16.
  • the pointer memory 16 retains the value of the part high of the address so as not to require unnecessary re-calculation at the following sampling period of the same upper part having a base address 8 unchanged when there was no signal from 6. If there was a hold-back 6, the base address 8 changes via the binary counter 7 and the operator combinatory 13 is requested to re-calculate the upper part of addresses and store it in the pointers memory 16.
  • FIG 3 which is a schematic table of the connection a random access memory to a programmable microcontroller with demultiplexing of the address bus, thus allowing the implementation of the invention.
  • a microcontroller 21 is connected to the memory 103 at random access, in a conventional way, through a data bus 26, an address bus 30, 31 and a control bus 27.
  • the samples of the audio signals pass, of course, through the data bus 26.
  • the upper part 14 of the address is applied to the memory 103 via a portion 30 of the address bus.
  • Sure the control bus 27, normally pass the signals that activate the memory 103 in reading or writing, and which ensure the selection address space in memory.
  • the demultiplexing of the address is provided by a register 22 disposed between the data bus 26 and the remaining portion 31 of the bus addresses where the lower part 5 of the address is applied.
  • a address decoder 23 is connected at the input to the part 30 of the bus addresses and to the control bus 27 from which it receives the signals 29 from selection of address space in memory. This decoder 23 generates essentially a locking signal 24 applied to the register 22 allowing the microcontroller 21 to write in this register 22 the value of the lower part 5 via the data bus 26. It also generates a memory access select signal 103 in reading or writing.
  • microcontroller includes, in internally, all the basic circuits necessary to perform a digital signal processing program without having to call to external components.
  • the program consists of two execution tasks, one activated under hardware interrupt by the signal sampling 4, and the other in the background.
  • the interrupted task essentially concerns the first counter 2 and the memory pointers 16.
  • the first counter 2 is decremented if it has not yet reaches the value zero. Otherwise, the value of the rhythmic coefficient is assigned to counter 2.
  • a variable Boolean representing the restraint 6 is then set to true, while a second Boolean variable for permutation of tables column pointers are reversed.
  • the pointer memory 16 which is an access memory random dual port if it is performed as a component electronic system, consists, in software form, of two tables of pointers, whose length is determined by the number of signals audio to reproduce. Next binary value of the second variable Boolean above, the interrupted task will use one or the other of these two pointer tables. As we will see, when one of the tables is used for reading by the task under interrupt, the other table is used in writing by the task of background to compose the list of high parts of addresses for the following retention 6.
  • the background task By constantly monitoring the false state of the variable Boolean representing restraint, the background task is active only when a restraint 6 has been activated. As soon as the state becomes true, the hold is detected and the background task will calculate the next 14. For this, the background task first affects the value to false to the Boolean retain variable, increments the second counter 7 and then continues, with the new address of base 8 obtained, the calculation and writing in the table pointers of columns, high parts for each selected audio signal 10 between the first and the last of the audio signals to be reproduced.
  • the device according to the invention furthermore comprises preferably a programmable manual control console to adjust the volume and the possible stereo balance of the sound of each of the loops taken separately during the reproduction,
  • a console may only have two potentiometers to adjust all the loops, since it presents a keyboard allowing the user to choose the parameter to be adjusted by means of the potentiometers.
  • the parameters to be controlled here being digital, the console mainly includes an analog / digital converter which converts the position of the potentiometer slider to a value digital that will be processed with the sound signal. Then, for a adjustment without discontinuity, a comparison will be made between the saved value of the parameter and the cursor position of the potentiometer to equal. The parameter will then follow the evolution analog of the cursor.
  • the device includes, in addition, a means for juxtaposing loops.
  • a processor to direct access memory DMA
  • DMA direct access memory
  • the type of addressing in page mode of loops, as described, makes this possible, since there is a time available at each sampling period for the processor DMA accesses his own memory. To obtain the correlation required rhythm, it is easy to impose an initial address of the phonic content in the loop to load.
  • a mobile cursor it is possible to obtain the sound effect said scratch by simple manipulation of a mobile cursor.
  • This effect sound was previously obtained by manually changing the speed angular classic black disks.
  • a cursor may, for example, consist of the moving part of a potentiometer.
  • the cursor can also be constituted by a computer peripheral conventional, such as the one usually called "mouse".

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Acoustics & Sound (AREA)
  • Multimedia (AREA)
  • Electrophonic Musical Instruments (AREA)

Claims (14)

  1. Verfahren für die Aufzeichnung mehrerer akustischer Sequenzen in zyklischen Schleifen für eine gleichzeitige Wiedergabe dieser Sequenzen mittels einer Vorrichtung, die abgetastete akustische Signale verwendet und einen Speicher, eine Speichersteuereinheit und eine Vorrichtung zur Wiedergabe der Töne umfasst und durch folgende Etappen gekennzeichnet ist:
    die Schleifen werden mit Standardwerten gestartet, sodass sie deutlich erkennbar permanent mit den gewünschten Werten in bezug auf das allen Schleifen gemeinsame Zeitmaß, die Anzahl der gewünschten Takte jeder der so genannten Schleifen und der Abtastfrequenz laufen; und
    die akustischen Signale werden für mindestens eine festgelegte Schleife aufgezeichnet.
  2. Verfahren gemäß Anspruch 1, das dadurch gekennzeichnet ist, dass die Standardwerte der sogenannten Schleifen vorher festgelegt werden.
  3. Verfahren gemäß Anspruch 1 oder 2, das dadurch gekennzeichnet ist, dass der genannte Speicher ein Direktzugriffsspeicher ist und die sogenannte Steuereinheit einen zyklischen Adressengenerator für jede der Schleifen umfasst und zyklische Adressengeneratoren für jede dieser Schleifen mit Standardwerten gestartet werden, so dass sie zyklisch permanent laufen.
  4. Verfahren gemäß einem der vorhergehenden Ansprüche, das dadurch gekennzeichnet ist, dass die Dauer der Aufzeichnung strikt auf die Dauer der festgelegten Schleife begrenzt wird, wobei diese Dauer durch das Zeitmaß, die Anzahl der Takte der genannten Schleife und die Abtastfrequenz bestimmt wird.
  5. Verfahren gemäß einem der vorhergehenden Ansprüche, das dadurch gekennzeichnet ist, dass die Schleifen temporär gegeneinander verschoben werden, um eine bessere Aneinanderreihung zu ermöglichen.
  6. Vorrichtung für die Umsetzung eines Verfahrens gemäß einem der Ansprüche 3 bis 5, wobei die genannte Vorrichtung abgetastete akustische Signale, einschließlich einem Direktzugriffsspeicher (103), einer Steuereinheit (101) des Speichers mit einem zyklischen Adressengenerator für jede der Schleifen und einer Methode zur Wiedergabe der Töne verwendet, die dadurch gekennzeichnet ist, dass die sogenannten Adressengeneratoren für jede der sogenannten Schleifen sich zyklisch dauerhaft abhängig von der Abtastfrequenz entwickeln, spätestens bei Beginn der sogenannten Aufzeichnung, mit standardmäßig gewählten Schleifenwerten.
  7. Vorrichtung gemäß Anspruch 6, die dadurch gekennzeichnet ist, dass sie eine Methode umfasst, die es ermöglicht, die sogenannten Standardwerte der Schleifen zu ändern und, vor allem, um ein allen Schleifen gemeinsames Zeitmaß, die Anzahl der Takte jeder dieser Schleifen vor der Aufzeichnung und die Abtastfrequenz festzulegen.
  8. Vorrichtung gemäß Anspruch 6 oder 7, die dadurch gekennzeichnet ist, dass sie außerdem einen gemeinsamen Adressengenerator mit zyklischer Sequenzierung umfasst, der sich mit der Abtastfrequenz entwickelt und die sogenannten Adressengeneratoren für jede Schleife steuert, wobei der Speicher nach und nach eineindeutig durch einfache Aneinanderreihung der durch einen spezifischen Generator generierten Adresse und der durch den sogenannten gemeinsamen Generator generierten Adresse adressiert wird.
  9. Vorrichtung gemäß Anspruch 8, die dadurch gekennzeichnet ist, dass sie außerdem einen Adressenspeicher umfasst, in den nach und nach die dedizierten Adressen der abgetasteten Signale der verwendeten Schleifen eingetragen werden, wobei die Adressierung des Direktzugriffsspeichers durch einfaches Lesen des sogenannten Adressenspeichers erfolgt, solange der sogenannte gemeinsame Speicher keinen kompletten Umlauf abgeschlossen hat.
  10. Vorrichtung gemäß einem der Ansprüche 6 bis 9, die dadurch gekennzeichnet ist, dass sie, vor allem, wenn die akustischen Eingangssignale bereits digitale Signale sind, außerdem eine Methode umfasst, die die Aneinanderreihung der Schleifen ermöglicht.
  11. Vorrichtung gemäß einem der Ansprüche 6 bis 10, die dadurch gekennzeichnet ist, dass sie eine Methode umfasst, um die sogenannte Aufzeichnung strikt auf die Länge der aktuellen Schleife zu begrenzen.
  12. Vorrichtung gemäß einem der Ansprüche 6 bis 11, die dadurch gekennzeichnet ist, dass sie einen Metronom mit demselben Zeitmaß umfasst.
  13. Vorrichtung gemäß einem der Ansprüche 6 bis 11, die dadurch gekennzeichnet ist, dass sie einen manuellen Schaltpult umfasst, der es ermöglicht, die Lautstärke und die stereophonische Balance des Tons von jeder der Schleifen bei der Wiedergabe separat einzustellen, und im übrigen die Lautstärke und eventuelle stereophonische Balance aller Schleifen gleichzeitig einzustellen.
  14. Vorrichtung gemäß Anspruch 13, die dadurch gekennzeichnet ist, dass sie außerdem einen Cursor umfasst, dessen Verschiebungsgeschwindigkeit die momentane Abtastfrequenz steuert.
EP97937616A 1996-08-12 1997-08-11 Verfahren und vorrichtung zur speicherung von tonfolgen in cyclischen schleifen Expired - Lifetime EP0978116B1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR9610109 1996-08-12
FR9610109A FR2752323B1 (fr) 1996-08-12 1996-08-12 Procede et dispositif pour l'enregistrement en boucles cycliques de plusieurs sequences phoniques
PCT/FR1997/001477 WO1998007140A1 (fr) 1996-08-12 1997-08-11 Procede et dispositif pour l'enregistrement en boucles cycliques de plusieurs sequences phoniques

Publications (2)

Publication Number Publication Date
EP0978116A1 EP0978116A1 (de) 2000-02-09
EP0978116B1 true EP0978116B1 (de) 2005-03-16

Family

ID=9494992

Family Applications (1)

Application Number Title Priority Date Filing Date
EP97937616A Expired - Lifetime EP0978116B1 (de) 1996-08-12 1997-08-11 Verfahren und vorrichtung zur speicherung von tonfolgen in cyclischen schleifen

Country Status (7)

Country Link
US (1) US20030171933A1 (de)
EP (1) EP0978116B1 (de)
AU (1) AU4018197A (de)
CA (1) CA2263365C (de)
DE (1) DE69732797T2 (de)
FR (1) FR2752323B1 (de)
WO (1) WO1998007140A1 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6574685B1 (en) * 1999-04-07 2003-06-03 Stephen R. Schwartz Sampling tuning system including replay of a selected data stream
GB0018296D0 (en) * 2000-07-27 2000-09-13 Chamings Ian Computer aided mixing system
JP2013050530A (ja) * 2011-08-30 2013-03-14 Casio Comput Co Ltd 録音再生装置およびプログラム
US9286872B2 (en) * 2013-07-12 2016-03-15 Intelliterran Inc. Portable recording, looping, and playback system for acoustic instruments
JP6155950B2 (ja) * 2013-08-12 2017-07-05 カシオ計算機株式会社 サンプリング装置、サンプリング方法及びプログラム
US9905210B2 (en) 2013-12-06 2018-02-27 Intelliterran Inc. Synthesized percussion pedal and docking station
US10741155B2 (en) 2013-12-06 2020-08-11 Intelliterran, Inc. Synthesized percussion pedal and looping station
JP6435751B2 (ja) * 2014-09-29 2018-12-12 ヤマハ株式会社 演奏記録再生装置、プログラム
WO2019046487A1 (en) 2017-08-29 2019-03-07 Intelliterran, Inc. APPARATUS, SYSTEM AND METHOD FOR MULTIMEDIA RECORDING AND RENDERING

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0278438B1 (de) * 1987-02-06 1995-11-02 Yamaha Corporation Vorrichtung zur vielfachen Informationsaufzeichnung in einem elektronischen Musikinstrument
US5194681A (en) * 1989-09-22 1993-03-16 Yamaha Corporation Musical tone generating apparatus
JP3068226B2 (ja) * 1991-02-27 2000-07-24 株式会社リコス バックコーラス合成装置
US5583650A (en) * 1992-09-01 1996-12-10 Hitachi America, Ltd. Digital recording and playback device error correction methods and apparatus for use with trick play data
US5583652A (en) * 1994-04-28 1996-12-10 International Business Machines Corporation Synchronized, variable-speed playback of digitally recorded audio and video

Also Published As

Publication number Publication date
CA2263365C (fr) 2011-04-19
DE69732797T2 (de) 2006-01-12
FR2752323B1 (fr) 1998-09-18
DE69732797D1 (de) 2005-04-21
WO1998007140A1 (fr) 1998-02-19
US20030171933A1 (en) 2003-09-11
AU4018197A (en) 1998-03-06
CA2263365A1 (fr) 1998-02-19
EP0978116A1 (de) 2000-02-09
FR2752323A1 (fr) 1998-02-13

Similar Documents

Publication Publication Date Title
FR2639458A1 (fr) Appareil permettant de produire, d'enregistrer ou de reproduire des donnees de source sonore et procede associe de codage de compression de donnees de source sonore
US8452432B2 (en) Realtime editing and performance of digital audio tracks
US20030040917A1 (en) Device and method for selective recall and preservation of events prior to decision to record the events
WO2010092139A2 (fr) Dispositif et procede d'interpretation de gestes musicaux
EP0978116B1 (de) Verfahren und vorrichtung zur speicherung von tonfolgen in cyclischen schleifen
CN110211556B (zh) 音乐文件的处理方法、装置、终端及存储介质
EP0142179A1 (de) Vorrichtung zur Tonerzeugung
WO2010092140A2 (fr) Dispositif et procede de controle du defilement d'un fichier de signaux a reproduire
FR2974226A1 (fr) Procede de generation d'effet sonore dans un logiciel de jeu, programme d'ordinateur associe et systeme informatique pour executer des instructions du programme d'ordinateur.
FR2762130A1 (fr) Systeme d'aide a la conduite et a la coordination des orchestres
JP2508972B2 (ja) 音響信号処理装置
EP1047044A1 (de) Vorrichtung zur Erfassung und Verarbeitung von Signalen um ein Gerät oder einen Prozess zu steueren
EP0011576B1 (de) Polyphone Syntheseschaltung für periodische Signale unter Anwendung digitaler Techniken
JP2016065903A (ja) 楽音制御装置、楽音制御方法、プログラム及び電子楽器
FR2627618A1 (fr) Appareil de montage de signaux modules par impulsions codees
US10482920B2 (en) Digital content reproduction control signal, phonograph record recording control signal, digital content reproduction system, digital content reproduction control system, digital content reproduction control device, digital content reproduction method, and digital content reproduction program
JPH076512A (ja) 情報再生装置
FR2548428A1 (fr) Appareil enregistreur de messages sonores dans une memoire electronique et appareil de reproduction de messages ainsi enregistres
EP0890166B1 (de) Verfahren zur audionumerischer schöpfung und dieses verfahren benützende anlagen zur synthetisierung und/oder tonaufnahme
WO1981001898A1 (fr) Appareil indicateur de notes emises au moyen d'un instrument de musique
Petelin et al. Cool Edit Pro2 in Use
Garrigus Sound forge power
FR2527819A1 (fr) Procede d'enregistrement et de lecture par echantillonnage de signaux sonores sur un support magnetique
FR3085512A1 (fr) Console de mixage electronique
JP2020060679A (ja) 電子音楽装置、再生制御方法およびプログラム

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19990113

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): BE CH DE ES FR GB IT LI

17Q First examination report despatched

Effective date: 20000824

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAG Despatch of communication of intention to grant

Free format text: ORIGINAL CODE: EPIDOS AGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

18D Application deemed to be withdrawn

Effective date: 20040302

D18D Application deemed to be withdrawn (deleted)
19U Interruption of proceedings before grant

Effective date: 20040820

19W Proceedings resumed before grant after interruption of proceedings

Effective date: 20041206

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): BE CH DE ES FR GB IT LI

REG Reference to a national code

Ref country code: CH

Ref legal event code: EP

REF Corresponds to:

Ref document number: 69732797

Country of ref document: DE

Date of ref document: 20050421

Kind code of ref document: P

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: ES

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 20050627

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: IT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20050811

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: LI

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20050831

Ref country code: CH

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20050831

GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)

Effective date: 20050822

PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20060301

26N No opposition filed

Effective date: 20051219

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

PGRI Patent reinstated in contracting state [announced from national office to epo]

Ref country code: IT

Effective date: 20091201

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: IT

Payment date: 20100726

Year of fee payment: 14

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: BE

Payment date: 20100830

Year of fee payment: 14

BERE Be: lapsed

Owner name: PERILLE, EMMANUEL

Effective date: 20110831

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20110831

Ref country code: IT

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20110811

REG Reference to a national code

Ref country code: FR

Ref legal event code: PLFP

Year of fee payment: 19

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 20150522

Year of fee payment: 19

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20150805

Year of fee payment: 19

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 20160811

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

Effective date: 20170428

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20160831

Ref country code: GB

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20160811