EP0672298A1 - Substrate fuer die zuechtung von 3-c siliziumcarbid - Google Patents

Substrate fuer die zuechtung von 3-c siliziumcarbid

Info

Publication number
EP0672298A1
EP0672298A1 EP94903525A EP94903525A EP0672298A1 EP 0672298 A1 EP0672298 A1 EP 0672298A1 EP 94903525 A EP94903525 A EP 94903525A EP 94903525 A EP94903525 A EP 94903525A EP 0672298 A1 EP0672298 A1 EP 0672298A1
Authority
EP
European Patent Office
Prior art keywords
sic
monocrystauine
cubic material
lattice parameter
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP94903525A
Other languages
English (en)
French (fr)
Other versions
EP0672298A4 (de
Inventor
James D. Parsons
Ajay K. Chadda
Her Song Chen
Jin Wu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oregon Graduate Institute of Science and Technology
Original Assignee
Oregon Graduate Institute of Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oregon Graduate Institute of Science and Technology filed Critical Oregon Graduate Institute of Science and Technology
Publication of EP0672298A1 publication Critical patent/EP0672298A1/de
Publication of EP0672298A4 publication Critical patent/EP0672298A4/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/36Carbides
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
    • C30B29/38Nitrides
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00Stock material or miscellaneous articles
    • Y10T428/24Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24942Structurally defined web or sheet [e.g., overall dimension, etc.] including components having same physical characteristic in differing degree

Definitions

  • This invention relates to methods for the synthesis of monocrystaUine films and crystals that are suitable as substrates to support the growth of cubic monocrystaUine 3C-silicon carbide ( J-SiC).
  • monocrystaUine /J-SiC would be a superior semiconductor material to silicon (Si).
  • MonocrystaUine /3-SiC has no polytypic form and its electronic transport properties are superior to Si and all other SiC forms. The superior properties can potentially extend the range of solid state electronic applications beyond present power, power-frequency, temperature and radiation density limits.
  • /3-SiC seems particularly suited for operation at high temperature such as, for example, 400 °C - 600 °C.
  • SiC was early identified as a candidate material for integrated circuitry applications since it has a high breakdown voltage, relatively large band gap, and a thermal conductivity of more than three times that of silicon at ambient temperature. SiC is also resistant to the diffusion of impurity species. It has been hoped that SiC devices can be substituted for Si devices.
  • SiC has not been used for semiconductor devices because it has not been possible to produce unpolytyped SiC single crystals of sufficient size to allow the fabrication of semiconductor devices.
  • a ⁇ -SiC single crystal must be substantially free of defects. But, to date, there are no reliable techniques to produce defect- free /3-SiC single crystals of a sufficient size to be used in integrated circuit production.
  • Epitaxy has not yet worked as hoped due to the lack of a suitable monocrystaUine substrate to support the heteroepitaxial growth of monocrystaUine /3-SiC.
  • a substrate would need to have certain properties with respect to (3-SiC.
  • the thermal coefficient of expansion of the substrate should be greater than (to compressively load the epilayer) or equal (to minimize strain) to that of 5-SiC.
  • any lattice parameter mismatch between the substrate and the 3-SiC should be less or about equal to 1 % .
  • the substrate must be thermally and chemically stable under conditions required for ⁇ -SiC growth. Also, for cost efficiency it would be desirable if the substrate could be fabricated in bulk, single crystal form.
  • a substrate for single-crystal epitaxial growth of thin film is its surface, upon which the thin film is nucleated and grown.
  • substrates are cut from bulk crystals and the surface of the substrate is polished to a flat smooth surface.
  • the reason that the entire substrate must be a single crystal with low defect concentration is that its surface properties will reflect its bulk properties.
  • a substrate contains a high defect density or it is polycrystalline, then its surface will have a high defect density or it will be polycrystalline.
  • the substrates which have been used for the purpose of attempting to nucleate monocrystaUine, epitaxial layers of /3-SiC are: A1 2 0 3 , AIN, 6H ⁇ -SiC, Si, and TiC. There have also been a few reports of ⁇ -SiC epitaxy on very small J-SiC substrates.
  • 6H ⁇ -SiC bulk crystal growth capabilities spurred interest in its use as a substrate for / 3-SiC epitaxial growth.
  • 6H ⁇ -SiC substrate surfaces do not have suitable properties for nucleating low-defect concentration, monocrystaUine /3-SiC thin films.
  • experimental evidence shows that /J-SiC can only be nucleated on the perfectly oriented (0001) and (0114) 6H ⁇ -SiC surfaces, where ⁇ 111 > ⁇ -SiC is nucleated on (0001) 6H ⁇ -SiC surfaces, and ⁇ 001 > / 3-SiC is nucleated on (0114) 6H ⁇ - SiC surfaces.
  • the slightest misorientation results in homoepitaxial growth of 6H os-SiC.
  • DPB defects can be explained as follows. There are six atoms on the surface of the hexagonal basal plane to which depositing atoms can bond. If the depositing atoms nucleate as a cubic structure, then there can be only three bonds attached to the six surface plane atoms. Thus, to form a cubic structure, the nucleating atoms must attach to every other atom in the basal plane of the hexagonal lattice. This causes the random nucleation of two /S-SiC epilayer orientations.
  • Both orientations are identical perpendicular to the 6H ot-SiC substrate, but they are misoriented 60 c with respect to each other in the plane of the substrate surface.
  • the DPBs between these two orientations are incoherent and they have a high internal energy.
  • the internal energy of the DPBs is released by the formation of stacking faults. These stacking faults seriously degrade the electronic transport properties of the ⁇ -SiC epilayer.
  • the resulting 3-SiC crystal has been found to contain high concentrations of crystallographic defects resulting from significant mismatches between the lattice parameters and the expansion coefficients of the two materials.
  • TiC and /3-SiC have ever yielded monocrystaUine, epitaxial /J-SiC substantially free of microcracks, antiphase domains, and double positioning boundaries.
  • the problem with these substrates is that they are difficult to synthesize as large single crystals.
  • the development of /3-SiC single-crystal growth technology, where the /3-SiC crystals are of significant size, may not be possible at all because of the relationship between silicon carbide crystalline form and the temperature at which it is synthesized.
  • TiC is particularly suitable as a substrate for nucleation and growth of monocrystaUine, epitaxial j(J-SiC.
  • the lattice parameter mismatch to /J-SiC is less than 1 % and TiC forms an almost ideal Schottky interface with jS-SiC, which is beneficial for ohmic contacts to n-type /3-SiC in vertical devices. Because both materials are cubic, the problem of double positioning boundaries can be completely eliminated. TiC and ⁇ -SiC have similar thermal expansion, and titanium is electrically inert in /3-SiC. However, TiC has not been a successful substrate due to the difficulty of producing TiC single crystals possessing the requisite quality. Prior TiC substrates have suffered from pinholes and subgrain boundary defects.
  • /3-SiC is grown on a surface of a substrate consisting of a cubic crystalline material that has a rock salt structure.
  • the cubic material has a lattice parameter within ⁇ 5 % of the lattice parameter of /J-SiC.
  • crystals of TiC, ZrC, HfC, or TiN are grown by starting with a single crystal of a hexagonal material having a lattice parameter within ⁇ 5 % of the lattice parameter of 6H ⁇ -SiC in the basal plane.
  • the hexagonal material preferably 6Hot-SiC, provides a surface upon which to nucleate and grow a crystal of the cubic material, e.g.
  • the resulting body of cubic material is completely free of subgrain boundaries and double positioning boundaries, with crystallinity independent of the exposed polytype.
  • the monocrystaUine cubic material in turn, provides a surface having crystalline properties suitable for nucleation and epitaxial growth of an IC quality, /3-SiC, monocrystaUine thin film.
  • the 6H ⁇ -SiC can be used as a substrate on which to nucleate and grow TiC, ZrC, HfC, or TiN bulk single crystals, which can be cut into TiC, ZrC, HfC, or TiN substrate wafers for nucleation and growth of semiconductor device and IC quality /J-SiC.
  • Thin-film TiC, ZrC, HfC, or TiN (at least 50 angstroms (A) thick) on 6H ⁇ -SiC has an advantage over bulk substrates cut from ingots. Because 6H ooSiC provides an excellent heat sink, the thermal expansion coefficient mismatch between the 6H ⁇ -SiC/cubic material substrate and ⁇ -SiC is almost zero, so there is little strain in the ⁇ -SiC. The thermal expansion mismatch between a TiC ingot substrate and /3-SiC is greater than 20%.
  • FIG. 1 is a partial elevational view of a substrate according to the present invention having a layer of 6H ⁇ -SiC and a layer of TiC, ZrC, HfC, or TiN; and
  • FIG. 2 is a partial elevational view of the substrate shown in FIG. 1, a layer of ⁇ - SiC being present on the upper surface of the substrate.
  • single crystals 10 of a hexagonal material having a planar surface with a lattice parameter that is within ⁇ 5 % of the lattice parameter of 6H ⁇ -SiC in the basal plane are used as the starting material for a substrate for the growth of monocrystaUine /J-SiC.
  • crystals of hexagonal form SiC (6H ⁇ -SiC) are grown or can be obtained from commercial sources, such as Cree Research and Westinghouse. These crystals consist substantially of 6H ⁇ -SiC, with some hexagonal poly types (e.g.,2H ⁇ and 4H ⁇ !- SiC). Such crystals may come with a mirror-like surface 12 at the (0001) Si face or may require diamond polishing to prepare such a surface.
  • a thin film 14 of a single crystal of TiC, or other cubic material (such as ZrC, HfC, or TiN) having a rock salt structure and having a lattice parameter within ⁇ 5 % of the lattice parameter of S-SiC, is nucleated and grown directly on the surface 12 of the hexagonal crystal 10 of SiC by any vapor phase growth technique, preferably chemical vapor deposition.
  • the film should be grown to a thickness of at least 50 A.
  • Chemical vapor deposition can be conducted at a pressure from ultra high vacuum to many atmospheres.
  • the temperature must be sufficiently high, at least 1,000°C, and the growth rate sufficiently low for the cubic material to grow epitaxially.
  • the growth rate can be increased if the temperature is elevated.
  • Titanium, zirconium, hafnium, and carbon atoms can be obtained from any of a number of common sources including elemental titanium, elemental zirconium, elemental hafnium, elemental carbon, organometallic compounds, and hydrides.
  • TiC can be nucleated and grown by chemical vapor deposition from
  • the resulting TiC film is completely free of subgrain boundaries and DPBs.
  • the crystallinity of such TiC is independent of the exposed polytype of the 6H ⁇ -SiC.
  • the TiC can be used for nucleation and growth of device and IC quality ⁇ -SiC.
  • An exposed surface 16 of the TiC is prepared by annealing in hydrogen at 1300 C C.
  • a layer 18 of 0-SiC can then be deposited on the prepared TiC surface by following the method described in U.S. Patent No. 4,767,666or 4,923,716.
  • a 6H or-SiC/TiC couple substrate in the form shown in FIG. 1 can be placed in a vacuum chamber which is initially evacuated to a vacuum of about 10 "6 torr.
  • the substrate Prior to loading in to the vacuum chamber, the substrate should be degreased using a solvent such as acetone with an alcohol rinse and air dry. Immediately prior to being loaded into the vacuum chamber, the substrate should be lightly etched in dilute hydrofluoric acid. The substrate may then be placed into a holder within the vacuum chamber where it is separated from an evaporation source by a shutter which is maintained closed until a steady state decomposition condition is reached.
  • an electron beam from an electron beam gun can be directed against a grounded silicon ingot which serves as a feedstock.
  • the electrons impinging upon the end of the ingot keep the silicon and create a molten pool whereupon the silicon atoms are ejected from the surface of the molten pool.
  • a reactive carbon-containing gas can be admitted to the vacuum chamber.
  • the preferred gas is acetylene (C 2 H 2 ), which readily decomposes at the substrate temperature to yield free carbon.
  • the pressure of the acetylene gas is not critical and can vary from 10 to about 10 torr.
  • the evaporating silicon atoms react with the carbon produced by the acetylene gas molecules to yield a reaction product which deposits upon the shutter as silicon carbide.
  • the shutter can be opened to allow deposition of the reaction products onto the substrate to produce an overlay layer of ⁇ -S ⁇ C.
  • the uncoated substrate Prior to evaporation and deposition, the uncoated substrate can be heated, by passage of an electrical current through the substrate, via a pair of leads contacting the substrate.
  • the preheat temperature can be controlled by varying the current through the substrate.
  • Deposition may be accomplished over a range of substrate temperatures from about 1000°C to about 1600°C.
  • the electron beam current is not critical, but ranges from about 0.07 to about 0.15 amps. No processing or other limitations are known that would restrict the thickness of the overlayer to any particular value. But, a preferred thickness is from about 0.1 to about 100 micrometers.
  • the growth rate is less than 10 micrometer per hour at atmospheric pressure.
  • the resulting ⁇ -SiC carbide overlayer 18 will achieve an epitaxial relationship to the substrate at substrate deposition temperatures greater than about 1250 C C. Silicon carbide surface smoothness of acceptable integrated surface quality will be obtained at substrate growth temperatures greater than about 1250 °C. The most preferred substrate temperature, using this growth approach, is about 1450°C. Higher temperatures increase the likelihood of silicon carbide polytype formation. At temperatures below about 1200°C, grains will develop in the overlayer. At all temperatures in the range of 1250°C to 1450°C, the overlay layer will be unpolytyped, pure ⁇ -SiC. Hexagonal polytypes will not be present in the overlay layer.
  • ⁇ -SiC that will have a usable diameter of 1.0 cm or more, will be substantially free of defects such as twins, and will not be cracked or otherwise physically damaged.
  • the upper surface of the ⁇ -SiC will be smooth and of integrated circuit quality and morphology. Surface morphology is critical to a successful, repeatable fabrication of devices in a crystal.
  • /3-SiC carbide crystals prepared by the present invention will exhibit excellent surface quality.
  • iS-SiC films, made according to the present invention have been measured and further processed in several different ways to determine their basic electrical characteristics. Prototype devices that have been fabricated and tested include Schottky diodes, p-n diodes, MOS capacitors and MOSFETs.
  • Chemical vapor deposition can also be used to fabricate /3-SiC according to the present invention.
  • the 6H ⁇ -SiC TiC couple substrate of FIG. 1 can be attached to a graphite susceptor and placed into a chamber with an RF heater coil, whereby the substrate is heated to the deposition temperature as a susceptor is heated.
  • the chamber can be vertical double-wall construction so that cooling water can pass through the outer jacket.
  • a reactive gas having a source of carbon and a source of silicon can be introduced at the lower end of the chamber and contacted to the substrate, so that a silicon carbide overlay layer 18 is epitaxially deposited on the titanium carbide surface 16 as a result of a chemical reaction of the surface.
  • the preferred reactive gas is disilylethane (C 2 H 10 Si 2 ) as a single molecular source of silicon and carbon, and hydrogen as a carrier gas.
  • Typical reaction conditions are: H 2 flow rate of 1.0 cubic centimeters per minute through the bubbler containing liquid C 2 H 1Q Si 2 (maintained at 0°C), and 2900 cubic centimeters per minute of carrier hydrogen.
  • the acceptable substrate temperature range, using C 2 H 10 Si 2 is 1290 ⁇ 10 °C.
  • the resulting epitaxial layer 18 will be unpolytyped monocrystaUine 3-SiC, without cracks (including microcracks), free of twins and of integrated circuit quality surface morphology.
  • Many other reactive gases and combinations of reactive gases are known as sources of silicon and carbon, and the present invention is known to be operable with such combinations.
  • the substrate and process of the present invention offer significant advantages in the preparation of monocrystaUine /3-SiC.
  • this particular substrate it is possible to fabricate epitaxially an overlay layer of ⁇ - SiC having laterally extensive monocrystaUine areas suitable for fabrication into semiconductor devices.
  • the /3-SiC overlay layer is substantially free of defects such as twins, and is unstrained or is maintained in compression so as to avoid formation of microcracks or other physical defects.
  • the result is a device wafer base that is chemically and physically stable, and may be processed in a manner similar to that of silicon epitaxial structures.
  • J-SiC could then be nucleated and grown on the self-standing TiC, ZrC, HfC, or TiN substrates.
  • a monocrystaUine hexagonal material other than 6H ⁇ -SiC provided that the hexagonal material has a planar surface with a lattice parameter that is within ⁇ 5 % of the lattice parameter of 6H of-SiC in the basal plane. Accordingly, the invention is not to be limited except by d e appended claims.

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
EP94903525A 1992-12-07 1993-12-07 Substrate fuer die zuechtung von 3-c siliziumcarbid. Withdrawn EP0672298A4 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US98699992A 1992-12-07 1992-12-07
US986999 1992-12-07
US83903 1993-06-25
US08/083,903 US5492752A (en) 1992-12-07 1993-06-25 Substrates for the growth of 3C-silicon carbide
PCT/US1993/011900 WO1994014186A1 (en) 1992-12-07 1993-12-07 Substrates for the growth of 3c-silicon carbide

Publications (2)

Publication Number Publication Date
EP0672298A1 true EP0672298A1 (de) 1995-09-20
EP0672298A4 EP0672298A4 (de) 1997-05-07

Family

ID=26769877

Family Applications (1)

Application Number Title Priority Date Filing Date
EP94903525A Withdrawn EP0672298A4 (de) 1992-12-07 1993-12-07 Substrate fuer die zuechtung von 3-c siliziumcarbid.

Country Status (5)

Country Link
US (2) US5492752A (de)
EP (1) EP0672298A4 (de)
JP (1) JPH08509575A (de)
KR (1) KR950704806A (de)
WO (1) WO1994014186A1 (de)

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US5492752A (en) * 1992-12-07 1996-02-20 Oregon Graduate Institute Of Science And Technology Substrates for the growth of 3C-silicon carbide
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US6388272B1 (en) 1996-03-07 2002-05-14 Caldus Semiconductor, Inc. W/WC/TAC ohmic and rectifying contacts on SiC
US5929523A (en) * 1996-03-07 1999-07-27 3C Semiconductor Corporation Os rectifying Schottky and ohmic junction and W/WC/TiC ohmic contacts on SiC
US6048429A (en) 1998-08-11 2000-04-11 Marquip, Inc. Production of double wall corrugated web
JP4897244B2 (ja) * 2005-06-14 2012-03-14 昭和電工株式会社 炭化珪素層製造方法、窒化ガリウム系半導体素子およびシリコン基板
EP1891663A4 (de) * 2005-06-14 2011-10-12 Showa Denko Kk Verfahren zur herstellung einer siliziumcarbidschicht, galliumnitrid-halbleiterbauelement und siliziumsubstrat
WO2009116219A1 (ja) * 2008-03-18 2009-09-24 国立大学法人京都大学 超電導回転子、超電導回転機および超電導回転機システム
DE102012012088A1 (de) * 2012-06-18 2013-12-19 Jean-Paul Theis Verfahren zum Herstellen von Halbleiterdünnschichten auf Fremdsubstraten
JP5965862B2 (ja) * 2013-03-29 2016-08-10 日本碍子株式会社 ハニカム構造体、及びその製造方法
KR102089949B1 (ko) * 2017-10-20 2020-03-19 세메스 주식회사 기판 처리 장치 및 기판 처리 장치의 부품
CN108321213A (zh) * 2017-12-21 2018-07-24 秦皇岛京河科学技术研究院有限公司 SiC功率二极管器件的制备方法及其结构

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Title
No further relevant documents disclosed *
See also references of WO9414186A1 *

Also Published As

Publication number Publication date
EP0672298A4 (de) 1997-05-07
US5492752A (en) 1996-02-20
JPH08509575A (ja) 1996-10-08
US5653798A (en) 1997-08-05
WO1994014186A1 (en) 1994-06-23
KR950704806A (ko) 1995-11-20

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