EP0541396A2 - Méthode de commande d'un panneau d'affichage à cristaux liquides - Google Patents
Méthode de commande d'un panneau d'affichage à cristaux liquides Download PDFInfo
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- EP0541396A2 EP0541396A2 EP92310203A EP92310203A EP0541396A2 EP 0541396 A2 EP0541396 A2 EP 0541396A2 EP 92310203 A EP92310203 A EP 92310203A EP 92310203 A EP92310203 A EP 92310203A EP 0541396 A2 EP0541396 A2 EP 0541396A2
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- voltage
- pixel
- display
- scanning
- liquid crystal
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3622—Control of matrices with row and column drivers using a passive matrix
- G09G3/3629—Control of matrices with row and column drivers using a passive matrix using liquid crystals having memory effects, e.g. ferroelectric liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/04—Partial updating of the display screen
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0209—Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
Definitions
- the present invention relates to a method for driving a liquid crystal panel, and more particularly to a method for driving a liquid crystal panel using a ferroelectric liquid crystal (hereinafter referred to as a FLC).
- a FLC ferroelectric liquid crystal
- Fig. 2 is a schematic section view showing the structure of a FLC panel. More specifically, glass substrates 5a and 5b are provided opposite to each other. A plurality of signal electrodes S are provided in parallel with one another on the surface of one glass substrate 5a.
- the signal electrodes S are transparent and consist of indium tin oxide (hereinafter referred to as ITO) and the like.
- the signal electrodes S are covered by a transparent insulating film 6a which consists of SiO2 and the like.
- a plurality of scanning electrodes L are provided in parallel with one another and perpendicularly to the signal electrodes S on the surface of the other glass substrate 5b which is opposite to the signal electrodes S.
- the scanning electrodes L are transparent and consist of ITO and the like.
- the scanning electrodes L are covered by a transparent insulating film 6b which consists of SiO2 and the like.
- the insulating films 6a and 6b On the insulating films 6a and 6b are formed transparent orientation films 7a and 7b which are subjected to rubbing processing and consist of polyvinyl alcohol and the like.
- the glass substrates 5a and 5b are stuck together by a sealing agent 8 with an inlet left.
- a FLC 9 is introduced into a space interposed between the orientation films 7a and 7b through the inlet by vacuum injection. Then, the inlet is sealed by the sealing agent 8.
- the glass substrates 5a and 5b thus stuck together are interposed between polarizing plates 10a and 10b.
- the polarizing plates 10a and 10b are provided in such a manner that their polarizing axes are perpendicular to each other.
- Fig. 3 is a plan view showing the schematic structure of a FLC display (hereinafter referred to as a FLCD) 4 in which the scanning electrodes L and signal electrodes S of the FLC panel 1 are connected to a scanning side drive circuit 11 and a signal side drive circuit 12 respectively.
- a FLCD FLC display
- a pixel in a portion or a cell where a given scanning electrode Li and a given signal electrode Sj intersect each other is indicated at Aij.
- the scanning side drive circuit 11 serves to apply voltages to the scanning electrodes L and includes an address decoder, a latch and an analog switch which are not shown. More specifically, the scanning side drive circuit 11 applies a selection voltage V c1 to the scanning electrode Li corresponding to an address Ax which is specified, and applies a non-selection voltage V c0 to other scanning electrodes Lk (k ⁇ i).
- the signal side drive circuit 12 serves to apply voltages to the signal electrodes S and includes a shift register, a latch and an analog switch which are not shown. More specifically, the signal side drive circuit 12 applies an active voltage V s1 to the signal electrode S in which data DATA corresponds to "1", and applies a non-active voltage V s0 to the signal electrode S in which the data DATA corresponds to "0".
- a FLC molecule 101 forming the pixel Aij has a spontaneous polarization Ps perpendicularly to the direction of a major axis thereof, receives a force which is proportional to a vector product composed of an electric field E and the spontaneous polarization Ps, and is moved on the surface of a circular cone 102.
- the electric field E is produced by the voltages of the scanning electrode L and signal electrode S.
- the circular cone 102 has an apex angle 2 ⁇ which is twice as great as a tilt angle.
- the FLC molecule 101 has two stable states. When moved to an axis 107 shown in Fig. 7 (A) by the electric field E, the FLC molecule 101 is brought into a stable state 105.
- the FLC molecule 101 When moved to an axis 106 by the electric field E, the FLC molecule 101 is brought into a stable state 104.
- a restoring force for returning to an original stable state acts on the FLC molecule 101 while the given stable state is not changed.
- Japanese Unexamined Patent Publication Nos. 56933/1987, 280824/1987 and 24234/1989 have disclosed a method for driving a FLC panel utilizing the foregoing.
- Fig. 17 shows a graph which represents the relationship between a voltage and a response speed of the FLC material disclosed in the Japanese Unexamined Patent Publication No. 24234/1989.
- Fig. 16 shows a driving method disclosed in the Japanese Unexamined Patent Publication No. 24234/1989.
- the stable state of a FLC molecule forming a pixel Aij is changed or rewritten into another stable state in the following manner. More specifically, when a voltage waveform shown in Fig. 16 (1) is applied to a scanning electrode Li, a voltage waveform shown in Fig. 16 (3) is applied to a signal electrode Sj and a voltage waveform shown in Fig. 16 (5) is applied to the FLC molecule forming the pixel Aij. Consequently, the stable state of the FLC molecule is changed or rewritten into another stable state. The stable state of the FLC molecule forming the pixel Aij is changed into a further stable state in the following manner.
- a voltage waveform shown in Fig. 16 (1) is applied to the scanning electrode Li
- a voltage waveform shown in Fig. 16 (4) is applied to the signal electrode Sj
- a voltage waveform shown in Fig. 16 (6) is applied to the FLC molecule forming the pixel Aij. Consequently, the stable state of the FLC molecule is changed into the further stable state.
- a voltage waveform shown in Fig. 16 (2) is applied to the scanning electrode Li and the voltage waveform shown in Fig. 16 (3) or (4) is applied to the signal electrode Sj.
- a voltage waveform shown in Fig. 16 (7) or (8) is applied to the FLC molecule forming the pixel Aij so that the stable state of the FLC molecule is not changed.
- a force acting on the FLC molecule by virtue of the former voltage is greater than a force acting on the FLC molecule by virtue of the latter voltage.
- the foregoing can be presumed because a response time shown in Fig. 17 has a minimum value when a voltage is 30 to 40 v and the response time is greater when the voltage is greater than 40 v as compared with the case where the voltage is 30 v.
- Fig. 15 shows the relationship between a voltage and a memory pulse width of the FLC material SCE8 disclosed in the above-mentioned paper. Data shown in Fig. 15 (a) is obtained by applying a pulse on which a bias voltage of ⁇ 10 v is superposed as shown in Fig. 14 (B). Data shown in Fig.
- Driving waveforms shown in Fig. 13 (A) are applied in a first field and driving waveforms shown in Fig. 13 (B) are applied in a second field.
- the stable state of the FLC molecule forming the pixel Aij is changed into another stable state in the following manner. More specifically, when a selection voltage shown in Fig. 13 (A) (1) is applied to a scanning electrode Li in the first field, a rewriting voltage shown in Fig. 13 (A) (3) is applied to the signal electrode Sj and a voltage waveform shown in Fig. 13 (A) (5) is applied to the FLC molecule forming the pixel Aij so as to change the stable state of the FLC molecule into another stable state. Furthermore, when a selection voltage shown in Fig. 13 (B) (1) is applied to the scanning electrode Li in the second field, a holding voltage shown in Fig. 13 (B) (4) is applied to the signal electrode Sj and a voltage waveform shown in Fig. 13 (B) (6) is applied to the FLC molecule forming the pixel Aij so as not to change the stable state of the FLC molecule.
- the stable state of the FLC molecule forming the pixel Aij is changed into a further stable state in the following manner. More specifically, when the selection voltage shown in Fig. 13 (A) (1) is applied to the scanning electrode Li in the first field, a holding voltage shown in Fig. 13 (A) (4) is applied to the signal electrode Sj and a voltage waveform shown in Fig. 13 (A) (6) is applied to the FLC molecule forming the pixel Aij so as not to change the stable state of the FLC molecule. Furthermore, when the selection voltage shown in Fig. 13 (B) (1) is applied to the scanning electrode Li in the second field, a rewriting voltage shown in Fig.
- a non-selection voltage shown in Fig. 13 (A) (2) is applied to the scanning electrode Li
- the voltage waveform shown in Fig. 13 (A) (3) or (4) is applied to the signal electrode Sj
- a voltage waveform shown in Fig. 13 (A) (7) or (8) is applied to the FLC molecule forming the pixel Aij in the first field.
- the voltage waveform shown in Fig. 13 (B) (2) is applied to the scanning electrode Li
- the voltage waveform shown in Fig. 13 (B) (4) or (3) is applied to the signal electrode Sj and a voltage waveform shown in Fig. 13 (B) (8) or (7) is applied to the FLC molecule forming the pixel Aij.
- Even though a voltage is applied the stable state of the FLC molecule is not changed.
- a force acting on the FLC molecule by virtue of the former voltage is greater than a force acting on the FLC molecule by virtue of the latter voltage.
- the polarity of a voltage -Vd or Vd is the same as that of the voltage (-Vs + Vd) or (Vs - Vd).
- the polarity of the voltage Vd or -Vd is reverse to that of the voltage (-Vs - Vd) or (Vs + Vd).
- the stable state of the FLC molecule is easy to change by virtue of the voltage (-Vs + Vd) or (Vs - Vd) in the former case, and is hard to change by virtue of the voltage (-Vs - Vd) or (Vs + Vd) in the latter case.
- the voltage Vs is 50 v and the voltage Vd is 10 v (or 7.5 v) in Fig. 13. Accordingly, when the voltage is about ⁇ 60 v, the effect of ⁇ ⁇ ⁇ 0 is substantially equal to that of Ps.
- the driving voltage of a commerically available CMOS driver is 25 to 35 v.
- the value of the first term involving Ps is made 1/2.
- the value of the second term involving ⁇ ⁇ is made 1/4.
- the effect of ⁇ ⁇ ⁇ 0 is assumed to be almost equal to that of Ps in an electric field E1, though, the effect of ⁇ ⁇ ⁇ 0 becomes about half of that of Ps in an electric field E1/2.
- ⁇ ⁇ is mainly controlled by the base LC of the FLC material.
- Ps is controlled by a quantity of chiral of the FLC material to be added. If the quantity of chiral to be added is reduced by half or more, it is easy to blend the FLC material which has the same ⁇ ⁇ and half of Ps (on the other hand, it is very difficult to change the value of ⁇ ⁇ because the base LC should be changed into another composition system).
- the value of the first term involving Ps is made 1/4.
- the value of the second term involving ⁇ ⁇ is made 1/4. Consequently, if the effect of ⁇ ⁇ ⁇ 0 is substantially equal to that of Ps in the electric field E1 of the FLC material having the spontaneous polarization Ps, the effect of ⁇ ⁇ ⁇ 0 is equal to that of Ps in the electric field E1/2 of the FLC material having a spontaneous polarization Ps/2.
- the response speed of the FLC material having the spontaneous polarization Ps/2 is lower than that of the FLC material having the spontaneous polarization Ps by about twice because a force acting on the FLC molecule of the formula (3) is half of that of the formula (2).
- the driving method and FLC material having such a low response speed are applied to a dynamic driving method which executes rewriting all pixels with and without the change of display, it takes a lot of time to rewrite pixels on all scanning electrodes from top to bottom on a screen. The time for rewriting comes to have the worst value of a response speed in the case that the displayed contents are changed. Consequently, the response speed is lowered.
- the present invention provides a method for driving a liquid crystal panel comprising the steps of providing a ferroelectric liquid crystal of which dielectric anisotropy is negative, between a plurality of scanning electrodes and a plurality of signal electrodes, said scanning electrodes being perpendicular to said signal electrodes, selectively applying either a selection voltage or a non-seclection voltage to each of the scanning electrodes and selectively applying either a rewritting voltage or a holding voltage to each of the signal electrodes so as to change the display of each pixel in spaces where the scanning electrodes and signal electrodes intersect each other, applying positive and negative voltages to a first pixel formed by the scanning electrode having the non-selection voltage applied thereto and the signal electrode having the rewriting voltage applied thereto and to a second pixel formed by the scanning electrode having the non-selection voltage applied thereto and the signal electrode having the holding voltage applied thereto so that the changes of the quantities of transmitted light of the first and second pixels are made substantially equal to each other, and applying a positive or negative voltage within
- a holding voltage is applied to the signal electrode forming the pixel which is on the scanning electrode having a selection voltage applied thereto when display of the pixel does not need to be changed, and a rewriting voltage is applied to the signal electrode when the display needs to be changed.
- the method for driving a liquid crystal panel further comprises the step of providing means for virtually dividing the scanning electrode into a plurality of groups and for detecting the necessity of changing the display of pixels on the scanning electrode belonging to each group, and means for deciding whether the display of each pixel needs to be changed and for detecting the kind of display change, whereby the ferroelectric liquid crystal molecule forming a pixel of which display needs to be changed is brought from one of stable states into the other stable state and vice versa according to a display state, and the ferroelectric liquid crystal molecule forming a pixel of which display does not need to be changed holds a stable state thereof.
- the change of a quantity of transmitted light of the pixel formed by the scanning electrode having a selection voltage applied thereto and the signal electrode having a holding voltage applied thereto is smaller than or almost equal to that of the pixel formed by the scanning electrode having a non-selection voltage applied thereto, the change of a quantity of transmitted light of a pixel having no change of display is always constant (the change of the quantity of transmitted light which is less slight is not marked). Consequently, even though the selection voltage is applied to the scanning electrode forming the pixel to change a display state thereof, a flicker cannot be observed.
- Fig. 18 graphically shows the relationship between a voltage and a memory pulse width of each of four FLC panels except for a FLC panel made of nylon, which is measured by voltage waveforms shown in Fig. 14 (A).
- the basic characteristic of each panel is as follows.
- Fig. 19 shows rubbing, pretilt and chevron directions.
- Fig. 19 (a) shows a C1 uniform orientation.
- Fig. 19 (b) shows a C1 twist orientation.
- Fig. 19 (c) shows a C2 orientation.
- the state of each panel can be specified as the C2 orientation based on the relationship between the disclination and the rubbing direction.
- C1 uniform orientation C1 twist orientation
- C2 orientation C2 orientation
- each panel has a voltage to which a minimum memory pulse width is related.
- the voltage is represented by Vmin for each panel. (V0 + V1) > Vmin
- the following voltage waveforms give the change of a quantity of transmitted light which is equal to that made on pixels when a voltage waveform in which a voltage -V0/2 shown in Fig. 20 (1) is followed by voltages V0/2 and 0 is applied to the pixels in the memory state of "dark” or "bright”: voltage waveforms shown in Figs. 20 (2) to (4); a voltage waveform in which a voltage -(V0 + V1) is followed by voltages (V0 + V1) and 0; a voltage waveform in which the voltage 0 is followed by the voltages -(V0 + V1) and (V0 + V1).
- the following voltage waveforms give the change of a quantity of transmitted light which is equal to that made on pixels when a voltage waveform in which a voltage V0/2 shown in Fig. 20 (5) is followed by voltages -V0/2 and 0 is applied to the pixels in the memory state of "dark” or "bright”: voltage waveforms shown in Figs. 20 (6) to (8); a voltage waveform in which a voltage (V0 + V1) is followed by voltages -(V0 + V1) and 0; a voltage waveform in which the voltage 0 is followed by the voltages (V0 + V1) and -(V0 + V1).
- a voltage to be applied to a pixel is determined so as not to cause crosstalk.
- Fig. 20 (1) shows a voltage waveform to be applied to a pixel A22 formed by a scanning electrode having a non-selection voltage applied thereto and a signal electrode having a holding voltage applied thereto
- the following voltage waveforms give the change of a quantity of transmitted light which is almost equal to that of the pixel made when the voltage waveform shown in Fig. 20 (1) is applied to the FLC molecule forming the pixel: voltage waveforms shown in Figs.
- Fig. 20 (2) shows a voltage waveform to be applied to a pixel A21 formed by the scanning electrode having a non-selection voltage applied thereto and the signal electrode having a rewriting voltage applied thereto.
- a voltage waveform to be applied to a pixel A12 formed by the scanning electrode having a selection voltage applied thereto and the signal electrode having a holding voltage applied thereto is selected from voltage waveforms shown in Figs. 20 (1) to (4), the voltage waveform in which the voltage -(V0 + V1) is followed by the voltages (V0 + V1) and 0, and the voltage waveform in which the voltage 0 is followed by the voltages -(V0 + V1) and (V0 + V1).
- V22, V21 and V12 to be applied to the pixels A22, A21 and A12 and a voltage V11 to be applied to a pixel A11 formed by the scanning electrode having a selection voltage applied thereto and the signal electrode having a rewriting voltage applied thereto.
- V22 - V21 V12 - V11
- V11 V12 - (V22 - V21)
- Fig. 21 (a) shows a voltage waveform to be applied to the pixel A11.
- a voltage waveform shown in Fig. 21 (c) or (a) (1) is assigned for a voltage waveform to be applied to a pixel formed by the scanning electrode having a non-selection voltage applied thereto and the signal electrode having a holding voltage applied thereto which is shown in Fig. 9 (A) or (B) (8).
- a voltage waveform shown in Fig. 21 (c) or (a) (2) is assigned for a voltage waveform to be applied to a pixel formed by the scanning electrode having a non-selection voltage applied thereto and the signal electrode having a rewriting voltage applied thereto which is shown in Fig. 9 (A) or (B) (7).
- FIG. 21 (c) or (a) (4) is assigned for a voltage waveform to be applied to a pixel formed by the scanning electrode having a selection voltage applied thereto and the signal electrode having a holding voltage applied thereto which is shown in Fig. 9 (A) or (B) (6).
- a voltage waveform shown in Fig. 21 (c) or (a) (5) is assigned for a voltage waveform to be applied to a pixel formed by the scanning electrode having a selection voltage applied thereto and the signal electrode having a rewriting voltage applied thereto which is shown in Fig. 9 (A) or (B) (5).
- the change of a quantity of transmitted light of the pixel made by applying the voltage waveform shown in Fig. 9 (A) or (B) (6) to the FLC molecule forming the pixel is almost equal to that made by applying the voltage waveform shown in Fig. 9 (A) (7) or (8) or Fig. 9 (B) (7) or (8) to the FLC molecule forming the pixel.
- a voltage waveform shown in Fig. 9 (A) (1) or Fig. 9 (B) (1) is applied to the scanning electrode
- a rewriting voltage waveform shown in Fig. 9 (A) (3) or Fig. 9 (B) (3) is applied to the signal electrode
- a holding voltage waveform shown in Fig. 9 (A) (4) or Fig. 9 (B) (4) is applied to the signal electrode
- a non-selection voltage waveform shown in Fig. 9 (A) (2) or Fig. 9 (B) (2) is applied to the scanning electrode.
- V3 V1 - V5
- V4 V1 - V6
- V2 V3 + V7
- a bias ratio B (V0/2 ⁇ (V1 + V0/2)
- the time axes of the combinations of voltage waveforms shown in Fig. 9 (A) are changed from t0 to t1, and the combinations of voltage waveforms shown in Fig. 9 (A) are added to those of voltage waveforms which are obtained by shifting the combinations of voltage waveforms shown in Fig. 9 (A) by a time 2t1 so that the combinations of voltage waveforms shown in Fig. 11 (A) are obtained.
- the time axes of the combinations of voltage waveforms shown in Fig. 9 (B) are changed from t0 to t1, and the combinations of voltage waveforms shown in Fig. 9 (B) are added to those of voltage waveforms which are obtained by shifting those of voltage waveforms shown in Fig.
- the contrast depends on how many times the combinations of voltage waveforms shown in Fig. 9 are shifted and superposed.
- the combinations of voltage waveforms shown in Fig. 9 can be superposed many times for the following reason. Since the voltage waveform shown in Fig. 9 (A) or (B) (6) is preliminarily designed in such a manner that a torque which is equal to those of the voltage waveforms shown in Figs. 9 (A) or (B) (7) and (8) is given to the FLC molecule, the memory state of the FLC molecule is not changed in similar to the time of biasing. This fact is made clearer by using a voltage (V0 + ⁇ ) / 2 ( ⁇ > 0) in place of a voltage V0/2 in Fig. 9.
- a voltage (V0 + V1) is set to 50 v
- a voltage V0 is variable to compare characteristics obtained by applying voltages shown in Figs. 11 (A) (7) and (8) to the pixel and measuring an optical response as an electric signal by means of a photodiode with characteristics obtained by applying a voltage shown in Fig. 11 (A) (6) to the pixel and measuring an optical response as an electric signal by means of the photodiode. Consequently, there are obtained following voltages by which the quantities of transmitted light are almost equal to each other.
- V0/2 is set to 12 v and V1 is set to 26 v.
- the voltages shown in Fig. 11 (A) (6) and Fig. 11 (A) (7) or (8) are sequentially applied.
- Fig. 11 (B) (6) and Fig. 11 (B) (7) or (8) are sequentially applied. Although this operation is repeated in a cycle of 10 Hz, a flicker is not sensed. It is a matter of course that the state of a pixel can be changed into another state by applying a voltage shown in Fig. 11 (A) (5) in place of the voltage shown in Fig. 11 (A) (6), and that the state of a pixel can be changed into a further state by applying a voltage shown in Fig. 11 (B) (5) in place of the voltage shown in Fig. 11 (B) (6).
- liquid crystal compositions A and B are injected into panels using the orientation films PSI-X012, PSI-X014 and PSI-X7355 manufactured by Chisso Co., Ltd.
- the liquid crystal compositions A and B are prepared by diluting a ferroelectric liquid crystal SCE-8 with compounds A and B having a negative dielectric anisotropy.
- Liquid Crystal Composition B SCE-8 Compound B 9 1
- Figs. 25 and 26 show the relationship between a voltage and a memory pulse width measured by voltage waveforms shown in Fig. 14 (A).
- Figs. 25 and 26 are compared with Fig. 18, it is apparent that a voltage Vmin having a minimum memory pulse width is reduced. It is found that the voltage (V0 + V1) can be reduced by decreasing the ratio of chiral in a liquid crystal.
- Fig. 1 is a block diagram schematically showing the structure of a display system using the FLCD 4.
- information necessary for image display is obtained from a digital signal which is outputted from a personal computer 2 to a CRT display 3. and a display controller 13 converts the digital signal into a signal for causing the FLCD 4 to perform image display. Based on a conversion signal thus obtained, image display is performed by the FLCD 4.
- Fig. 4 is a waveform diagram for each signal outputted from the personal computer 2 to the CRT display 3.
- Fig. 4 (1) shows a horizontal synchronizing signal HD which gives a cycle for a horizontal scanning partition of image information outputted to the CRT display 3.
- Fig. 4 (2) shows a vertical synchronizing signal VD which gives a cycle for a screen of the image information.
- Fig. 4 (3) collectively shows the image information as display data Data for each horizontal scanning partition, in which numerals are attached to distinguish the data Data for each horizontal period.
- Fig. 4 (4) is an enlarged waveform diagram showing the horizontal scanning partition of the horizontal synchronizing signal HD.
- FIG. 4 (5) is an enlarged waveform diagram showing the horizontal scanning partition of the display data Data, in which numerals are attached to distinguish the data Data for each pixel.
- Fig. 4 (6) is a waveform diagram showing a data transfer clock CLK of the display data Data.
- the digital signal has data for only 9 x 8 pixels, data for 16 x 16 pixels of the FLC panel 1 can be displayed for the following reason.
- the 16 x 16 pixels of the FLC panel 1 are virtually divided into display portions 0 to 3.
- the display portion 0 has scanning electrodes L0 to L7 and signal electrodes S0 to S7.
- the display portion 1 has the scanning electrodes L0 to L7 and signal electrodes S8 to SF.
- the display portion 2 has scanning electrodes L8 to LF and the signal electrodes S0 to S7.
- the display portion 3 has the scanning electrodes L8 to LF and the signal electrodes S8 to SF.
- data in the 0th horizontal scanning partition of the digital signal for 9 x 8 pixels to be inputted indicates the correspondence of data in first to eighth horizontal scanning partitions to the display portions 0 to 3.
- Fig. 8 is a block diagram showing the schematic structure of the display controller 13.
- the display controller 13 includes an interface circuit 14, a display memory circuit 15, a group memory circuit 16, an identity and difference memory circuit 17, an input control circuit 18, an output control circuit 19, an address circuit 20 and a driving control circuit 21.
- the interface circuit 14 receives a digital signal from the personal computer 2 and distributes the same to necessary circuits.
- the display memory circuit 15 records display data DA to be displayed next on the FLC panel 1.
- the group memory circuit 16 collectively records the change of data of the display memory circuit 15 every two scanning electrodes (if at least one pixel is changed. there is change).
- the identity and difference memory circuit 17 collectively records the change of data of the display memory circuit 15 every four pixels (if at least one pixel is changed, there is change).
- the input control circuit 18 controls a timing at which the digital signal outputted from the personal computer 2 is written into the memory circuits 15, 16 and 17.
- the output control circuit 19 and address circuit 20 control timings at which data to be outputted from the memory circuits 15, 16 and 17 to the FLCD 4 are read out.
- the driving control circuit 21 controls the operations of a scanning side drive circuit 11 and a signal side drive circuit 12 forming the FLCD 4 on receipt of data from the memory circuits 15, 16 and 17, the output control circuit 19 and the address circuit 20.
- the memory circuits 15 and 17 repeat four continuous cycles in which the data of addresses specified by input side addresses IACx and IASx are first read out from the memory, the data of addresses specified by output side addresses OACx and OASx are secondly read out from the memory, the data of addresses specified by the input side addresses IACx and IASx are thirdly written into the memory, and the data of addresses specified by the output side addresses OACx and OASx are fourthly read out from the memory.
- the group memory circuit 16 brings the data of the address specified by the output side address OAGx into the state of no change in a second cycle.
- 16 scanning electrodes L of the FLCD 4 shown in Fig. 3 are virtually divided into 8 groups two by two, the group memory circuit 16 records whether the display of pixels on 2 scanning electrodes for each group needs to be changed, the identity and difference memory circuit 17 collectively records, every 4 pixels, which pixel on the 2 scanning electrodes needs to be changed in the display state, and the display memory circuit 15 records, for each pixel, the display state into which the pixel is brought.
- the display of the FLCD 4 is "A B C D" shown in Fig. 3 and 9 x 8 matrix data Data shown in Fig. 5 is inputted from the personal computer 2 to the display controller 13, the data of groups 0 to 3 indicate that display is changed and the data of groups 4 to 7 indicate that display is not changed in the group memory circuit 16 of the display controller 13.
- the group 0 corresponds to the scanning electrodes L0 and L1.
- the group 1 corresponds to the scanning electrodes L2 and L3.
- the group 2 corresponds to the scanning electrodes L4 and L5.
- the group 3 corresponds to the scanning electrodes L6 and L7.
- a selection voltage shown in Fig. 11 (A) (1) is applied to the scanning electrodes L0 and LI belonging to the group 0 in order.
- a rewriting voltage shown in Fig. 11 (A) (3) is applied to the signal electrode Sj forming the pixel Aij so as to change the display state of the pixel Aij into "dark”.
- a holding voltage shown in Fig. 11 (A) (4) is applied to a signal electrode Sh forming a pixel Aih (j ⁇ h) on the scanning electrode Li.
- a selection voltage shown in Fig. 11 (B) (1) is applied to the scanning electrodes L0 and L1 belonging to the group 0 in order.
- a rewriting voltage shown in Fig. 11 (B) (3) is applied to the signal electrode Sj forming the pixel Aij so as to change the display state of the pixel Aij into "bright”.
- a holding voltage shown in Fig. 11 (B) (4) is applied to the signal electrode Sh forming the pixel Aih (j ⁇ h) on the scanning electrode Li.
- the display state of a pixel is decided as "dark” or "bright” by causing the polarizing axis of the polarizing plate 10a shown in Fig. 2 to correspond to the direction of a major axis in the stable state 104 or 105 of the FLC molecule shown in Fig. 7 (A). If the polarizing axis corresponds to the direction of a major axis, one of the stable states 104 and 105 is “dark” and the other is “bright”. The pixel formed by the FLC molecule in the stable state of "dark” is in the display state of "dark". The pixel formed by the FLC molecule in the stable state of "bright” is in the display state of "bright".
- each voltage waveform shown in Fig. 10 is different from each voltage waveform shown in Fig. 9 in that the quantities of transmitted light are not equal to each other when voltage waveforms shown in Fig. 10 (6) and Fig. 10 (7) or (8) are applied to the pixel.
- the voltage waveforms of Fig. 10 are the same as those of Fig. 9. Therefore, further description will be omitted.
- the combinations of voltage waveforms shown in Fig. 10 can be applied to a static driving method in similar to the combinations of voltage waveforms shown in Fig. 11.
- the voltage waveform shown in Fig. 10 (A) (6) indicates that a voltage V1 is applied for a time t0/2 and a voltage (-V1 - V0) is then applied for a time t0. Consequently, a force acting on the FLC molecule by virtue of the voltage V1 should be about twice as great as a force acting on the FLC molecule by virtue of the voltage (V1 + V0).
- the voltage waveform shown in Fig. 11 (A) (5) or Fig. 11 (B) (5) includes only a voltage having a unipolarity. For this reason, it is relatively difficult to sense a flicker attendant on rewriting even though there are performed driving operations in which the scanning electrodes L0 and L1 belonging to the group 0 are driven based on the combinations of voltage waveforms shown in Fig. 11 (A), pixels on the scanning electrodes are rewritten based on the combinations of voltage waveforms shown in Fig. 11 (A) or (B) by 4:1 jump scan, the scanning electrodes L0 and L1 belonging to the group 0 are driven based on the combinations of voltage waveforms shown in Fig. 11 (B), and pixels on the scanning electrodes are rewritten based on the combinations of voltage waveforms shown in Fig. 11 (B) or (A) by the 4:1 jump scan.
- Fig. 12 is a waveform diagram in which the scanning electrode LD is rewritten by the voltage waveforms shown in Fig. 11 (A), the group 6 is driven by the voltage waveforms shown in Fig. 11 (A), the scanning electrode L2 is rewritten by the voltage waveforms shown in Fig. 11 (B), the group 0 is driven by the voltage waveforms shown in Fig. 11 (B), the scanning electrode L2 is rewritten by the voltage waveforms shown in Fig. 11 (A), the group 0 is driven by the voltage waveforms shown in Fig. 11 (A), the scanning electrode L6 is rewritten by the voltage waveforms shown in Fig. 11 (B), and the group 1 is driven by the voltage waveforms shown in Fig. 11 (B).
- Figs. 12 (1) to (8) show voltages to be applied to the scanning electrode L2, the scanning electrode L3, the signal electrode S1, the signal electrode S2, the pixel A21, the pixel A22, the pixel A31 and the pixel A 32, respectively
- the quantities of transmitted light of the pixels A21 and A22 are the largest when the combinations of applied voltage waveforms are changed from Fig. 11 (A) to Fig. 11 (B) or from Fig. 11 (B) to Fig. 11 (A), and the voltage waveform of Fig. 11 (A) (5) or Fig. 11 (B) (5) is applied to the pixel A21 and A22.
- the voltage waveforms shown in Fig. 11 (A) (5) or Fig. 11 (B) (5) is a unipolar pulse. Consequently, the FLC molecule is only moved from the stable state 105 or 104 shown in Fig. 7 (A) to the axis 107 or 106 by a critical tilt angle ⁇ ⁇ . If the tilt angle ⁇ is almost equal to a memory angle ⁇ , the change of a quantity of transmitted light made on pixels is not greatly different from that obtained by exchanging the combinations of applied voltage waveforms of Fig. 11 (A) for those of Fig. 11 (B), or reversely. Consequently, there can be realized driving in which a flicker is not strongly marked.
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Liquid Crystal Display Device Control (AREA)
- Liquid Crystal (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29317991 | 1991-11-08 | ||
JP293179/91 | 1991-11-08 | ||
JP4232126A JP2996564B2 (ja) | 1991-11-08 | 1992-08-31 | 液晶パネルの駆動方法 |
JP232126/92 | 1992-08-31 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
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EP97102275 Division | 1997-02-13 |
Publications (3)
Publication Number | Publication Date |
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EP0541396A2 true EP0541396A2 (fr) | 1993-05-12 |
EP0541396A3 EP0541396A3 (en) | 1994-09-21 |
EP0541396B1 EP0541396B1 (fr) | 1998-01-21 |
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Application Number | Title | Priority Date | Filing Date |
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EP92310203A Expired - Lifetime EP0541396B1 (fr) | 1991-11-08 | 1992-11-06 | Méthode de commande d'un panneau d'affichage à cristaux liquides |
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EP (1) | EP0541396B1 (fr) |
JP (1) | JP2996564B2 (fr) |
KR (1) | KR970001848B1 (fr) |
DE (1) | DE69224147T2 (fr) |
TW (1) | TW245780B (fr) |
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FR2850966B1 (fr) | 2003-02-10 | 2005-03-18 | Rhodia Polyamide Intermediates | Procede de fabrication de composes dinitriles |
FR2854891B1 (fr) | 2003-05-12 | 2006-07-07 | Rhodia Polyamide Intermediates | Procede de preparation de dinitriles |
TWI263834B (en) | 2005-04-29 | 2006-10-11 | Au Optronics Corp | Liquid crystal display panel |
US7973174B2 (en) | 2005-10-18 | 2011-07-05 | Invista North America S.A.R.L. | Process of making 3-aminopentanenitrile |
CA2644961A1 (fr) | 2006-03-17 | 2007-09-27 | Invista Technologies S.A.R.L. | Procede pour purifier des triorganophosphites grace au traitement a l'aide d'un adjuvant basique |
US7919646B2 (en) | 2006-07-14 | 2011-04-05 | Invista North America S.A R.L. | Hydrocyanation of 2-pentenenitrile |
US8101790B2 (en) | 2007-06-13 | 2012-01-24 | Invista North America S.A.R.L. | Process for improving adiponitrile quality |
EP2229353B1 (fr) | 2008-01-15 | 2018-01-03 | INVISTA Textiles (U.K.) Limited | Hydrocyanation de pentènenitriles |
WO2009091771A2 (fr) | 2008-01-15 | 2009-07-23 | Invista Technologies S.A R.L | Procédé de fabrication et de raffinage de 3-pentènenitrile et de raffinage de 2-méthyl-3-butènenitrile |
ES2526868T3 (es) | 2008-10-14 | 2015-01-16 | Invista Technologies S.À.R.L. | Procedimiento de preparación de 2-alquilsecundario-4,5-di-(alquilnormal)fenoles |
JP5615920B2 (ja) | 2009-08-07 | 2014-10-29 | インヴィスタ テクノロジーズ エスアエルエル | ジエステルを形成するための水素化およびエステル化 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4773716A (en) * | 1986-05-30 | 1988-09-27 | Alps Electric Co., Ltd | Method of driving a liquid crystal display apparatus employing a ferroelectric liquid crystal cell |
EP0306203A2 (fr) * | 1987-09-04 | 1989-03-08 | Nortel Networks Corporation | Méthode d'adressage d'un dispositif d'affichage à cristaux liquides ferroélectriques |
EP0435701A2 (fr) * | 1989-12-29 | 1991-07-03 | Sharp Kabushiki Kaisha | Méthode et dispositif de commande d'un panneau d'affichage à cristaux liquides ferroélectriques |
-
1992
- 1992-08-31 JP JP4232126A patent/JP2996564B2/ja not_active Expired - Lifetime
- 1992-10-30 TW TW081108675A patent/TW245780B/zh active
- 1992-11-06 EP EP92310203A patent/EP0541396B1/fr not_active Expired - Lifetime
- 1992-11-06 DE DE69224147T patent/DE69224147T2/de not_active Expired - Fee Related
- 1992-11-09 KR KR1019920020968A patent/KR970001848B1/ko not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4773716A (en) * | 1986-05-30 | 1988-09-27 | Alps Electric Co., Ltd | Method of driving a liquid crystal display apparatus employing a ferroelectric liquid crystal cell |
EP0306203A2 (fr) * | 1987-09-04 | 1989-03-08 | Nortel Networks Corporation | Méthode d'adressage d'un dispositif d'affichage à cristaux liquides ferroélectriques |
EP0435701A2 (fr) * | 1989-12-29 | 1991-07-03 | Sharp Kabushiki Kaisha | Méthode et dispositif de commande d'un panneau d'affichage à cristaux liquides ferroélectriques |
Also Published As
Publication number | Publication date |
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EP0541396B1 (fr) | 1998-01-21 |
KR930010835A (ko) | 1993-06-23 |
JPH05210365A (ja) | 1993-08-20 |
KR970001848B1 (ko) | 1997-02-17 |
EP0541396A3 (en) | 1994-09-21 |
TW245780B (fr) | 1995-04-21 |
DE69224147D1 (de) | 1998-02-26 |
JP2996564B2 (ja) | 2000-01-11 |
DE69224147T2 (de) | 1998-08-06 |
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