EP0518800B1 - Heteroepitaktisches Aufwachsen von Germanium auf Silizium mittels Ultra-Hochvakuum-CVD - Google Patents

Heteroepitaktisches Aufwachsen von Germanium auf Silizium mittels Ultra-Hochvakuum-CVD Download PDF

Info

Publication number
EP0518800B1
EP0518800B1 EP92480075A EP92480075A EP0518800B1 EP 0518800 B1 EP0518800 B1 EP 0518800B1 EP 92480075 A EP92480075 A EP 92480075A EP 92480075 A EP92480075 A EP 92480075A EP 0518800 B1 EP0518800 B1 EP 0518800B1
Authority
EP
European Patent Office
Prior art keywords
substrate
chamber
load lock
reaction chamber
growth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP92480075A
Other languages
English (en)
French (fr)
Other versions
EP0518800A2 (de
EP0518800A3 (en
Inventor
Shahzad Akbar
Jack Oon Chu
Biran Cunningham
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of EP0518800A2 publication Critical patent/EP0518800A2/de
Publication of EP0518800A3 publication Critical patent/EP0518800A3/en
Application granted granted Critical
Publication of EP0518800B1 publication Critical patent/EP0518800B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/28Deposition of only one other non-metal element
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0227Pretreatment of the material to be coated by cleaning or etching
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/08Germanium

Definitions

  • This invention relates to semiconductor manufacturing processes, and more particularly, a method of growing heteroepitaxial layers of germanium (Ge) on silicon (Si) by low temperature UHV/CVD epitaxy.
  • heteroepitaxial Ge and Ge x Si 1-x alloys on Si has attracted widespread interest because of the possibility of tailoring the band gap of Ge x Si 1-x based heterostructures.
  • Proposed uses for these heterostructures include optical devices, modulation doped transistors, and heterojunction bipolar transistors.
  • thin films of elemental Ge grown on Si substrates may be utilized as an intermediate epilayer to allow subsequent growth of gallium arsenide (GaAs) for optoelectronic integration on Si or for use as a SiGe heterojunction in high performance electronic device applications.
  • GaAs gallium arsenide
  • GaAs is better lattice matched to Ge and can be easily deposited on it
  • a high quality epitaxial Ge layer on Si serves as a suitable substrate for the subsequent growth of GaAs and possibly other layers (e.g. Ga x Al 1-x As), and consequently allows for the integration of GaAs optoelectronic devices with Si based devices.
  • Heteroepitaxial growth of pure Ge is most desirable, in particular, because the higher the Ge content of the structure, the higher the carrier mobility which, in turn, provides higher current capability, lower power consumption, lower temperature operation and greater speed. Also, as previously mentioned, pure Ge provides optoelectronic capability.
  • Ge and Ge x Si 1-x alloys have previously been deposited on Si by a variety of techniques, including ion-sputtering, physical vapor deposition, chemical vapor deposition (CVD), and more recently, molecular beam epitaxy (MBE).
  • CVD is the most advantageous of these processes because it is a high throughput process and also because it has in-situ doping capabilities.
  • the high temperatures, high pressures and carrier gases characteristic of conventional CVD systems produce undesirable surface roughness and therefore render the process impractical for many applications.
  • Maenpaa, et al. "The heteroepitaxy of Ge on Si: A comparison of chemical vapor and vacuum deposited layers", J. Appl. Phys. 53(2), (February 1982), 1076-1083, (Maenpaa et al.) describes a CVD experiment performed utilizing GeH4 as a carrier gas with a pressure of 266-1729 Pa (2-13 Torr) and maintaining the Si temperature between 500-900°C.
  • U.S.-A- 3 473 978 (Jackson), entitled “Epitaxial Growth of Germanium”, teaches a method for the nucleation and growth of monocrystalline germanium on a Si substrate which comprises epitaxially growing a layer of monocrystalline Si at a temperature of at least 900°C, then cooling the Si below 670°C, followed by the nucleation and growth of Ge.
  • ultrahigh vacuum chemical vapor deposition processes have been utilized for growing of Ge X Si 1-X layers onto Si. Examples of this technique are disclosed in the following references.
  • Racanelli and Greve "Growth of Epitaxial Layers of Ge x Si 1-x by UHV/CVD", (Mat. Res. Soc. Symp. Proc. Vol. 198, 1990 Materials Research Society), (RACANELLI et al.), which teaches a method of growing epitaxial layers of a Ge x Si 1-x composition on Si at temperatures between 577 and 665°C.
  • US-A-4 870 030 describes a remote plasma enhanced CVD apparatus and method for growing semiconductor layers on a substrate wherein an intermediate feed gas, which does not itself contain constituent elements to be deposited, is first activated in an activation region to produce plural reactive species of the feed gas.
  • FIG. 1 illustrates a typical CVD growth rate versus temperature curve.
  • G G o exp (- ⁇ E/kT s )
  • the value of the activation energy can be used to postulate the rate limiting step of the surface reaction or, conversely, if the rate limiting step is known, to determine the activation energy for such a reaction.
  • the growth rate is mass transport/diffusion-limited.
  • the rate limiting step is the diffusion of the gaseous reactant to the surface, since the high deposition temperature rapidly decomposes and incorporates the molecules arriving on the surface.
  • This fast decomposition step makes available a sufficient number of surface sites to allow for the continuous adsorption of the arriving reactant species. Since the diffusion coefficient varies slowly with temperature, a slower increase in growth rate is observed in the diffusion limited regime as compared to the kinetically controlled regime. This behavior has been observed for CVD of epitaxial Si from a variety of gas sources (e.g. SiH x Cl1 ⁇ x ).
  • Fig.s 2A-C show schematic representations of the three basic modes of heteroepitaxial growth.
  • the first mode (Fig. 2A) is known as Frank-van der Merwe (F-vdM) wherein growth proceeds in a layer by layer mode (2D).
  • the second mode (Fig. 2B) is known as Volmer-Weber (V-W), wherein island growth (3D) occurs.
  • the third mode (Fig. 2C) is known as Stranski-Krastanov (S-K), which proceeds initially as layer by layer growth, followed by islanding after a critical thickness has been exceeded. In the absence of any strain in the epilayer (i.e.
  • the growth mode is determined by the surface energy of the substrate ( ⁇ 1) and epilayer ( ⁇ 2), and the interface energy ( ⁇ 12) and is predicted purely by the following thermodynamic free energy considerations: ⁇ 1 > ⁇ 2 + ⁇ 12 F-vdM (2D) ⁇ 1 ⁇ ⁇ 2 + ⁇ 12 V-W (3D)
  • the surface free energy of Ge is smaller than that of Si by about 10%, which would imply that the growth of Ge/Si should proceed in a F-vdM mode,
  • the misfit between the two lattices is approximately 4%, the accumulation of strain energy, in fact, produces S-K growth, with 3-4 monolayers (ML) of layer by layer growth occurring prior to island formation.
  • Prior techniques, (such as those mentioned hereinbefore), for depositing Ge on Si have been undesirable because these factors have produced rough surface morphology, as illustrated in FIG. 3.
  • CVD methods of the prior art are undesirable because they require high processing temperatures, thereby limiting device application. Also, prior CVD methods utilize poor vacuum processing techniques, which cause system contamination, thereby affecting surface interface quality essential to film growth.
  • An object of the present invention is to provide a method of heteroepitaxially growing pure Ge on to a substrate, in particular, Si.
  • the essential features of the method are defined in Claim 1.
  • Preferred embodiments are defined in Claims 2 to 7.
  • Another object of the present invention is to provide a method of heteroepitaxially growing Ge on Si wherein the deposited Ge has a smooth, continuous surface morphology.
  • Another object of the present invention is to provide a method of heteroepitaxially growing Ge on Si utilizing low pressures and low temperatures.
  • a UHV/CVD process is utilized to induce 2D layer by layer heteroepitaxial growth of Ge on Si using temperatures less than 500°C and pressures between 1.33 and 6.66 Pa (10 and 50mTorr) with a 12.5-25sccm gas source of 10% GeH4/He.
  • the present invention facilitates the growth of thin, epitaxial Ge films having abrupt junctions.
  • the surface morphology of these epitaxial films is sufficiently smooth to allow subsequent epitaxial growth of differently built Ge or other thin films for device application.
  • the Ge films show complete selectivity for growth on Si versus SiO2.
  • the Ge films can be in-situ doped with boron to yield P-type Ge films with good electrical properties.
  • the Ge films can be in-situ doped with phosphorous or arsenic to yield N-type Ge films.
  • safer chemistry is employed using 10% GeH4/He rather than previously utilized 100% GeH4.
  • FIG. 1 is a graph of a typical growth rate curve for a CVD process.
  • FIG. 2A is a simplified schematic representation of a F-vdM heteroepitaxial growth mode.
  • FIG. 2B is a simplified schematic representation of a V-W heteroepitaxial growth mode.
  • FIG. 2C is a simplified schematic representation of a S-K heteroepitaxial growth mode.
  • FIG. 3 is a Scanning Electron Micrograph of rough surface morphology resulting from prior art methods of depositing of Ge on Si.
  • FIG. 4 is a simplified schematic block diagram of the UHV/CVD system utilized for the method of the present invention.
  • Figs. 5A-5H are cross sectional Transmission Electron Micrographs of structures of Ge grown on Si at different temperatures according to the method of the present invention.
  • FIG. 6 is a high resolution Transmission Electron Micrograph of a structure of Ge grown on Si at 350°C according to the method of the present invention.
  • FIG.s 7A-7B are cross sectional Transmission Electron Micrographs of structures of Ge grown on Si at 400°C for 1 hr and 9 hrs, respectively, according to the method of the present invention.
  • FIG. 8 is an Arrhenius plot of UHV/CVD growth of Ge on Si according to the method of the present invention.
  • FIG. 9 is a cross sectional Transmission Electron Micrograph of a Si/Ge/Si structure grown in accordance with the method of the present invention.
  • FIG. 10 is an Arrhenius plot of UHV/CVD growth of Si on Ge according to the method of the present invention.
  • the UHV/CVD system 100 utilized for carrying out the process of the present invention includes a quartz reaction chamber 102, a furnace 104, which surrounds the quartz reaction chamber 102, and a load lock chamber 106.
  • Chamber 102, furnace 104 and load lock chamber may be any of a number of suitable UHV/ CVD systems known in the art.
  • a valve 114 such as part number 10746-CE44 manufactured by VAT, isolates the load lock chamber 106 from the reaction chamber 102.
  • a valve 112 similar to valve 114 isolates the load lock chamber 106 from a pair of evacuation pumps 108, 110, such as part numbers TMP 1500 and D65-BCS, respectively, manufactured by Liebold, which are in series with the load lock chamber and are utilized to evacuate the chamber 106.
  • a bypass valve 116 similar to valve 114, and a metering valve 117, such as Model Number SS-4BMRW made by Nupro, isolate the load lock chamber 106 from a pair of evacuation pumps 118, 120, such as Liebold part numbers TMP 450 and D65-BCS, respectively, which are also in series with the load lock chamber 106 and utilized to pre-evacuate the chamber 106.
  • Gas is provided to valve 114 from a valve 132 through a gas line 130.
  • Valve 132 controls the mixture of gas coming from four -different sources (not shown).
  • Silane (SiH4) is provided through a flow controller 134 and a gas line 144.
  • a 99.99% He and 0.01% B2H6 mixture is provided through a flow controller 136 and a gas line 146.
  • a 10% GeH4 and 90% He mixture is provided through a flow controller 138 and a gas line 148.
  • H2 is provided through a flow controller 140 and gas line 150.
  • the flow controllers may be any of a number known in the art such as part number 1449A manufactured by MKS.
  • the pumps 160, 162, and 164 utilized for this application may be Liebold part numbers TMP 1500, WS 250, and D65-BCS, respectively.
  • a throttle valve 170, such as part number 228-0400 manufactured by HVA and a valve 172, similar to valve 114, are connected in series between pump 160 and the evacuation chamber 166.
  • a valve 174, such as Model Number 151-0050K made by HPS, is connected between the pump 162 and pump 160.
  • a special cleaning process (hereinafter known as a Huang clean) which is comprised of a) immersing the wafers in a 5:1:1 solution of H2O:H2O2:NH4OH at 65°C for 1 minute followed by a deionized H2O rinse, and b) immersing the wafers in a 5:1:1 solution of H2O:H2O2:HCl at 65°C for 1 minute, followed by another deionized water rinse.
  • a Huang clean which is comprised of a) immersing the wafers in a 5:1:1 solution of H2O:H2O2:NH4OH at 65°C for 1 minute followed by a deionized H2O rinse, and b) immersing the wafers in a 5:1:1 solution of H2O:H2O2:HCl at 65°C for 1 minute, followed by another deionized water rinse.
  • the wafers are etched in a dilute 10:1 HF solution at room temperature for 10 to 15 seconds and then placed on a wafer boat 180 and placed in load lock chamber 106.
  • the load lock chamber 106 is then slowly pre-evacuated through pumps 118, 120 by opening valve 116 and adjusting metering valve 117 to thereby create a pressure of approximately 10 to 50mTorr in the load lock chamber 106.
  • Valve 116 is then closed and the load lock chamber 106 is quickly evacuated through valve 112 and pumps 108, 110 to a pressure of approximately 1.3310 ⁇ 5 Pa (10 ⁇ 7 Torr).
  • flow controller 140 bleeds H2 through valve 114 and into the reaction chamber 102 at a rate of approximately 650 sccm.
  • valve 114 is opened, thereby exposing load lock chamber 106 to the reaction chamber 102 and the wafers are transferred from the load lock chamber 106 to the reaction chamber 102. It is to be noted that the aforementioned flow of hydrogen reduces cross contamination of the two chambers during this wafer transfer process.
  • reaction chamber 102 is maintained at a pressure of about 26.6 - 40 Pa (200-300 mTorr) by pumps 160, 162, 164 and valves 170, 172, 174 during the aforementioned wafer transfer steps.
  • valve 114 is shut, thereby sealing the load lock chamber 106 from the reaction chamber 102.
  • flow controller 140 stops the flow of H2 and flow controller 138 starts a flow of the He and GeH4 mixture at a rate of approximately 10 to 25sccm through the reaction chamber 102.
  • Throttle valve 170 is then adjusted to produce a GeH4 partial pressure of approximately 0.133-0.665 Pa (1-5 mTorr). If the temperature of the reaction chamber 102 is maintained at approximately 300-375°C, F-vdM growth (described hereinbefore) of Ge on the Si wafers occurs.
  • the preferred process conditions for a single run at 350°C would be a GeH4/He flow rate of 12.5 sccm, with a total process pressure of 1.33-2.66 Pa (10-20 mTorr) and a subsequent GeH4 partial pressure of 0.133-0.266 Pa (1-2 mTorr). Since the Ge partial pressure during this deposition is extremely low, homogeneous pyrolysis of GeH4 is negligible. The appropriate mechanistic mode of growth is then heterogeneous surface decomposition of GeH4.
  • Ge may be deposited on substrates comprised of materials other than Si utilizing the method of the present invention.
  • Ge may be deposited on a Ge x si 1-x substrate in accordance with the present invention.
  • materials other than Ge may be deposited if different gases are utilized in the reaction chamber.
  • Si may be deposited if SiH4 is used instead of GeH4. If homoepitaxial growth of Si films is desired, SiH4 should be provided at a constant flow of 4-5 sccm and a Si partial pressure of 0.133-0.266 Pa (1-2 mTorr) at temperatures at approximately 550°C.
  • FIGs. 5A-5H cross-sectional micrographs of films grown by the deposition method of the present invention at eight different temperatures, in the range of 275°C to 560°C are shown. Films grown at or below 275°C show almost no growth occurs for up to eleven hours, as illustrated in Fig. 5A.
  • Figs. 5B-5D illustrate that between 300°C and 350°C the films are smooth indicating the growth has proceeded by 2D process.
  • Fig. 5E at 375°C the 2D growth appears to be giving way to 3D growth as evidenced by the slight roughness of the film. Above 375°C growth occurs as 3D islanding as illustrated by Figs. 5F-5H. This islanding is extremely apparent at 560°C (Fig. 5H).
  • a high resolution transmission electron micrograph of a Ge film grown at 350°C exhibits excellent surface smoothness on an atomic scale.
  • Figs. 7A and 7B two Ge films both grown at 400°C, but for two substantially different times are illustrated.
  • the film in Fig. 7A was grown for about 1 hour and the film grown in Fig. 7B was grown for about 9 hours.
  • the magnitude of the surface roughness increases, indicating that there is no smoothing out of the roughness with increasing deposition time.
  • the growth rates at the different temperatures were determined by measuring the thickness of films grown for long times (>4 hrs), to minimize possible effects due to any nucleation periods associated with the adsorption of GeH4 on a Si surface.
  • the growth rates for the rough films were determined by measuring an average film thickness.
  • Fig. 8 the results of the growth rate of Ge grown on Si in accordance with the present invention are plotted against 1/T.
  • Fig. 8 shows that the growth rate has an Arrhenius temperature dependence, with an activation energy of 1.46eV (33kcal/mole) for the temperature regime between 300°C and 375°C. It is to be noted that two distinctive slopes are present in Fig. 8, a first more gradual slope and then a steeper slope. Deposition of Ge in accordance with the method of the present invention occurs in the regime of the steeper slope.
  • Fig. 9 shows a Transmission Electron Micrograph of the resultant Si/Ge/Si structure. Although the UHV/CVD Si film is heavily faulted, it can be seen that the film has grown in a layer by layer (F-vdM) mode. Prior art models for this deposition, on the contrary, predict a V-W growth mode. It is to be noted that the growth of these types of Si/Ge/Si structures may very well be of more technological interest than Ge/Si structures because, for example, of the possible applications in high electron mobility transistors (HEMT).
  • HEMT high electron mobility transistors
  • Fig. 10 the growth rates of homoepitaxial Si films grown in accordance with the present invention in the temperature range 550°C - 650°C are plotted against 1/T.
  • the heteroepitaxial growth mode of the Ge according to the method of the present invention is layer by layer. This 2D growth observed in the low temperature regime is believed to be due to the control of the growth kinetics by a surface reaction mechanism (i.e. the H2 desorption step prior to lattice incorporation of the Ge).
  • the GeH x surface species are likely to be less mobile (and less reactive) than Ge atoms, due to hydrogen termination at the growth interface, thereby reducing the overall surface mobility and preventing island formation.
  • the growth rate is controlled by diffusion and adsorption of GeH4 from the gas phase and the growth mode changes to S-K.
  • the growth kinetics are dominated by the flux of GeH4 molecules adsorbed on the surface.
  • the UHV/CVD behavior is similar to MBE where the growth rate is controlled by the flux of Ge atoms impinging on the surface.
  • Ge x Si 1-x films grown on (100) Si are also observed to exhibit the aforementioned growth-rate vs. temperature characteristics.
  • the Ge concentration in the Ge x Si 1-x films is increased, there is a stronger tendency for island formation, again as a consequence of the strain energy term driving the growth from 2D to 3D. Since the lattice mismatch increases as the Ge fraction increases, the strain energy term also increases.
  • Ge may also be grown on Ge x Si 1-x substrates according to the method of the present invention disclosed hereinbefore.
  • the Si and/or Ge films may be in-situ doped (e.g. boron doping) in a manner well known in the UHV/CVD processing art.
  • Process conditions in the reaction chamber 102 for boron doping may be, for instance, a 1-30 sccm flow of a 100 ppm mixture of B2H6 in He.
  • Ge deposition in accordance with the present invention was carried out on (100) Si surfaces. Other crystal orientation Si surfaces may be utilized, however, as the deposition substrate.

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Vapour Deposition (AREA)

Claims (7)

  1. Verfahren zum Aufbringen von Ge auf ein Substrat in einer Reaktionskammer, wobei das Verfahren die Schritte umfaßt:
    a) Evakuieren der Reaktionskammer und einer zugehörigen Ladeschleusenkammer auf einen Anfangsgleichgewichtsdruck von unter 1,33 x 10⁻⁷ Pa (10⁻⁹ Torr);
    b) Erwärmen der Reaktionskammer auf eine vorgeschriebene Prozeßtemperatur im Bereich von 300 °C bis 375 °C;
    c) Vorreinigen des Substrats;
    d) Anordnen des Substrats in der Ladeschleusenkammer, wodurch der Druck in der Ladeschleusenkammer auf Atmosphärendruck anwächst; wobei die Ladeschleusenkammer während des Anordnens des Substrats in der Ladeschleusenkammer von der Reaktionskammer isoliert ist;
    e) langsames Evakuieren der Ladeschleusenkammer von Atmosphärendruck auf einen ersten vorgeschriebenen Druck im Bereich von 1,3 Pa bis 7 Pa (10 mTorr bis 50 mTorr) und dann weiteres schnelles Evakuieren der Ladeschleusenkammer von dem ersten vorgeschriebenen Druck auf einen zweiten vorgeschriebenen Druck von ungefähr 1,33 x 10⁻⁵ Pa (10⁻⁷ Torr);
    f) Ausströmenlassen von H₂ in die Reaktionskammer, wodurch der Druck in der Reaktionskammer auf einen Überführungsdruck im Bereich von 26 Pa bis 40 Pa (200 mTorr bis 300 mTorr) anwächst;
    g) Öffnen der Ladeschleusenkammer zu der Reaktionskammer hin und Über führen des Substrats von der Ladeschleusenkammer in die Reaktionskammer, wobei das Ausströmenlassen von H₂ des vorherigen Schritts eine wechselseitige Verunreinigung zwischen der Ladeschleusenkammer und der Reaktionskammer während der Überführung reduziert und wobei sich das Substrat auf die vorgeschriebene Prozeßtemperatur im Inneren der Reaktionskammer erwärmt; und
    h) Stoppen des Ausströmens von H₂ und Bereitstellen eines Gemisches aus GeH₄- und He-Gas in der Reaktionskammer, um dadurch Ge auf das Substrat aufzubringen, wobei die Reaktionskammer auf einen Gesamtprozeßdruck im Bereich von 1,3 Pa bis 2,6 Pa (10 mTorr bis 20 mTorr) ins Gleichgewicht kommt.
  2. Verfahren zum Aufbringen von Ge auf ein Substrat in einer Kammer gemäß Anspruch 1, wobei das Substrat aus Si oder GexSi1-x besteht.
  3. Verfahren zum Aufbringen von Ge auf ein Substrat in einer Kammer gemäß Anspruch 1 oder 2, wobei das Gemisch in der Größenordnung von 10 % GeH₄ und 90 % He liegt.
  4. Verfahren zum Aufbringen von Ge auf ein Substrat in einer Kammer gemäß Anspruch 1, 2 oder 3, wobei der Partialdruck von GeH₄ in der Größenordnung von 0,133 Pa bis 0,665 Pa (1 mTorr bis 5 mTorr) liegt.
  5. Verfahren zum Aufbringen von Ge auf ein Substrat in einer Kammer gemäß irgendeinem der vorherigen Ansprüche, das des weiteren vor Schritt c) die Schritte umfaßt:
    Eintauchen der Wafer in eine ungefähre 5:1:1-Lösung aus H₂O:H₂O₂:NH₄OH bei etwa 65 °C während etwa 1 Minute;
    Spülen der Wafer mit deionisiertem H₂O;
    Eintauchen der Wafer in eine ungefähre 5:1:1-Lösung aus H₂O:H₂O₂:HCl bei etwa 65 °C während etwa 1 Minute; und
    Spülen der Wafer mit deionisiertem H₂O.
  6. Verfahren zum Aufbringen von Ge auf ein Substrat in einer Kammer gemäß irgendeinem der obigen Ansprüche, wobei Schritt c) die Bereitstellung des Gemisches bei einer Flußrate in der Größenordnung von 12,5 sccm bis 25 sccm umfaßt.
  7. Verfahren zum Aufbringen von Ge auf ein Substrat in einer Kammer gemäß irgendeinem der Ansprüche 5 bis 7, das des weiteren nach dem letzten Spülungsschritt den Schritt des Eintauchens des Substrats in eine ungefähre 10:1-Lösung aus H₂O:HF bei Raumtemperatur während etwa 10 Sekunden bis 15 Sekunden umfaßt.
EP92480075A 1991-06-12 1992-06-03 Heteroepitaktisches Aufwachsen von Germanium auf Silizium mittels Ultra-Hochvakuum-CVD Expired - Lifetime EP0518800B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/714,297 US5259918A (en) 1991-06-12 1991-06-12 Heteroepitaxial growth of germanium on silicon by UHV/CVD
US714297 1991-06-12

Publications (3)

Publication Number Publication Date
EP0518800A2 EP0518800A2 (de) 1992-12-16
EP0518800A3 EP0518800A3 (en) 1993-07-14
EP0518800B1 true EP0518800B1 (de) 1996-04-17

Family

ID=24869475

Family Applications (1)

Application Number Title Priority Date Filing Date
EP92480075A Expired - Lifetime EP0518800B1 (de) 1991-06-12 1992-06-03 Heteroepitaktisches Aufwachsen von Germanium auf Silizium mittels Ultra-Hochvakuum-CVD

Country Status (4)

Country Link
US (1) US5259918A (de)
EP (1) EP0518800B1 (de)
JP (1) JP2948414B2 (de)
DE (1) DE69209901T2 (de)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5273829A (en) * 1991-10-08 1993-12-28 International Business Machines Corporation Epitaxial silicon membranes
DE19632834C2 (de) * 1996-08-14 1998-11-05 Siemens Ag Verfahren zur Herstellung feiner Strukturen und dessen Verwendung zur Herstellung einer Maske und eines MOS-Transistors
US5976941A (en) * 1997-06-06 1999-11-02 The Whitaker Corporation Ultrahigh vacuum deposition of silicon (Si-Ge) on HMIC substrates
JPH113861A (ja) * 1997-06-12 1999-01-06 Sony Corp 半導体装置の製造方法及びその装置
US6040225A (en) * 1997-08-29 2000-03-21 The Whitaker Corporation Method of fabricating polysilicon based resistors in Si-Ge heterojunction devices
US6130471A (en) * 1997-08-29 2000-10-10 The Whitaker Corporation Ballasting of high power silicon-germanium heterojunction biploar transistors
AU9674498A (en) 1997-10-10 1999-05-03 Cornell Research Foundation Inc. Methods for growing defect-free heteroepitaxial layers
FR2783254B1 (fr) * 1998-09-10 2000-11-10 France Telecom Procede d'obtention d'une couche de germanium monocristallin sur un substrat de silicium monocristallin,et produits obtenus
US7145167B1 (en) 2000-03-11 2006-12-05 International Business Machines Corporation High speed Ge channel heterostructures for field effect devices
US6350993B1 (en) 1999-03-12 2002-02-26 International Business Machines Corporation High speed composite p-channel Si/SiGe heterostructure for field effect devices
US20050072679A1 (en) * 1999-10-22 2005-04-07 Nayfeh Munir H. Germanium and germanium alloy nanoparticle and method for producing the same
WO2001093338A1 (en) * 2000-05-26 2001-12-06 Amberwave Systems Corporation Buried channel strained silicon fet using an ion implanted doped layer
GB0111207D0 (en) * 2001-05-08 2001-06-27 Btg Int Ltd A method to produce germanium layers
US6875279B2 (en) * 2001-11-16 2005-04-05 International Business Machines Corporation Single reactor, multi-pressure chemical vapor deposition for semiconductor devices
US20030111013A1 (en) * 2001-12-19 2003-06-19 Oosterlaken Theodorus Gerardus Maria Method for the deposition of silicon germanium layers
US7682947B2 (en) * 2003-03-13 2010-03-23 Asm America, Inc. Epitaxial semiconductor deposition methods and structures
JP4714422B2 (ja) * 2003-04-05 2011-06-29 ローム・アンド・ハース・エレクトロニック・マテリアルズ,エル.エル.シー. ゲルマニウムを含有するフィルムを堆積させる方法、及び蒸気送達装置
JP4954448B2 (ja) * 2003-04-05 2012-06-13 ローム・アンド・ハース・エレクトロニック・マテリアルズ,エル.エル.シー. 有機金属化合物
WO2005084231A2 (en) * 2004-02-27 2005-09-15 Asm Aemrica, Inc. Germanium deposition
US7678420B2 (en) 2005-06-22 2010-03-16 Sandisk 3D Llc Method of depositing germanium films
US7648853B2 (en) 2006-07-11 2010-01-19 Asm America, Inc. Dual channel heterostructure
WO2009013034A1 (en) * 2007-07-20 2009-01-29 Interuniversitair Microelektronica Centrum (Imec) Method for providing a crystalline germanium layer on a substrate
US20110180849A1 (en) * 2008-10-02 2011-07-28 Sumitomo Chemical Company, Limited Semiconductor substrate, electronic device and method for manufacturing semiconductor substrate
CN102171790A (zh) 2008-10-02 2011-08-31 住友化学株式会社 半导体基板、电子器件、以及半导体基板的制造方法
WO2011037961A2 (en) * 2009-09-22 2011-03-31 Massachusetts Institute Of Technology Method and system for forming germanium on silicon
US9127345B2 (en) 2012-03-06 2015-09-08 Asm America, Inc. Methods for depositing an epitaxial silicon germanium layer having a germanium to silicon ratio greater than 1:1 using silylgermane and a diluent
US9171715B2 (en) 2012-09-05 2015-10-27 Asm Ip Holding B.V. Atomic layer deposition of GeO2
US9218963B2 (en) 2013-12-19 2015-12-22 Asm Ip Holding B.V. Cyclical deposition of germanium
TWI556285B (zh) * 2014-08-21 2016-11-01 國立中央大學 在矽基板上磊晶成長鍺薄膜的方法
CN107354513B (zh) * 2017-09-12 2020-05-12 中国电子科技集团公司第四十六研究所 一种高效稳定的锗单晶片腐蚀工艺

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3473978A (en) * 1967-04-24 1969-10-21 Motorola Inc Epitaxial growth of germanium
US3615855A (en) * 1969-04-03 1971-10-26 Gen Motors Corp Radiant energy photovoltalic device
US4861393A (en) * 1983-10-28 1989-08-29 American Telephone And Telegraph Company, At&T Bell Laboratories Semiconductor heterostructures having Gex Si1-x layers on Si utilizing molecular beam epitaxy
US4529455A (en) * 1983-10-28 1985-07-16 At&T Bell Laboratories Method for epitaxially growing Gex Si1-x layers on Si utilizing molecular beam epitaxy
JPS60140813A (ja) * 1983-12-28 1985-07-25 Fujitsu Ltd 半導体装置の製造方法
DE3527363A1 (de) * 1985-05-17 1986-11-20 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Verfahren zur herstellung einer raeumlich periodischen halbleiter-schichtenfolge
JPH0666264B2 (ja) * 1986-02-03 1994-08-24 日本電信電話株式会社 半導体装置の製造方法および製造装置
US4806996A (en) * 1986-04-10 1989-02-21 American Telephone And Telegraph Company, At&T Bell Laboratories Dislocation-free epitaxial layer on a lattice-mismatched porous or otherwise submicron patterned single crystal substrate
JPS63140521A (ja) * 1986-12-02 1988-06-13 Nippon Telegr & Teleph Corp <Ntt> 半導体装置の製造方法
JPS63177419A (ja) * 1987-01-16 1988-07-21 Nippon Telegr & Teleph Corp <Ntt> 薄膜形成方法
JPS6445011A (en) * 1987-08-13 1989-02-17 Tdk Corp Superconductive oxide ceramic material
US4870030A (en) * 1987-09-24 1989-09-26 Research Triangle Institute, Inc. Remote plasma enhanced CVD method for growing an epitaxial semiconductor layer
US4891329A (en) * 1988-11-29 1990-01-02 University Of North Carolina Method of forming a nonsilicon semiconductor on insulator structure
US4997776A (en) * 1989-03-06 1991-03-05 International Business Machines Corp. Complementary bipolar transistor structure and method for manufacture
US5190792A (en) * 1989-09-27 1993-03-02 International Business Machines Corporation High-throughput, low-temperature process for depositing oxides

Also Published As

Publication number Publication date
DE69209901T2 (de) 1996-10-24
JPH07176485A (ja) 1995-07-14
JP2948414B2 (ja) 1999-09-13
US5259918A (en) 1993-11-09
EP0518800A2 (de) 1992-12-16
DE69209901D1 (de) 1996-05-23
EP0518800A3 (en) 1993-07-14

Similar Documents

Publication Publication Date Title
EP0518800B1 (de) Heteroepitaktisches Aufwachsen von Germanium auf Silizium mittels Ultra-Hochvakuum-CVD
Cunningham et al. Heteroepitaxial growth of Ge on (100) Si by ultrahigh vacuum, chemical vapor deposition
USRE43045E1 (en) Multi-chamber MOCVD growth apparatus for high performance/high throughput
US6064081A (en) Silicon-germanium-carbon compositions and processes thereof
US5760426A (en) Heteroepitaxial semiconductor device including silicon substrate, GaAs layer and GaN layer #13
KR101556054B1 (ko) AlzGa1-zN 층을 갖는 반도체 웨이퍼 및 이를 제조하는 방법
JP2003520444A (ja) 高温成長を不要とする低貫通転位密度格子不整合エピ層
US4835116A (en) Annealing method for III-V deposition
US5210052A (en) Method for fabricating a semiconductor substrate
JPH0547665A (ja) 気相成長方法
Kobayashi et al. Selective germanium epitaxial growth on silicon using CVD technology with ultra-pure gases
US5286334A (en) Nonselective germanium deposition by UHV/CVD
Sedgwick et al. Atmospheric pressure chemical vapor deposition of Si and SiGe at low temperatures
Kinosky et al. Low‐temperature growth of Ge x Si1− x/Si heterostructures on Si (100) by remote plasma‐enhanced chemical vapor deposition
JP3214505B2 (ja) 半導体装置の製造方法
Tsai et al. Growth and characterization of undoped and in situ doped Si1− x Ge x on patterned oxide Si substrates by very low pressure chemical vapor deposition at 700 and 625° C
Caymax et al. Low thermal budget chemical vapour deposition techniques for Si and SiGe
EP0407233B1 (de) Verfahren zur Herstellung eines Halbleitersubstrats
CAYMAX WY LEONG
JPH0722330A (ja) 歪ヘテロエピタキシャル層の形成方法
JP2668236B2 (ja) 半導体素子の製法
JP2753832B2 (ja) 第▲iii▼・v族化合物半導体の気相成長法
Karam et al. Atomic layer epitaxy of GaAs on Si by MOCVD
JPH06232042A (ja) Si−Ge薄膜の形成方法
Kwong et al. RTP-CVD: A Single Wafer In-Situ Multiprocessing Manufacturing Technology For ULSI

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A2

Designated state(s): DE FR GB

PUAL Search report despatched

Free format text: ORIGINAL CODE: 0009013

17P Request for examination filed

Effective date: 19930427

AK Designated contracting states

Kind code of ref document: A3

Designated state(s): DE FR GB

17Q First examination report despatched

Effective date: 19941010

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): DE FR GB

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 19960520

Year of fee payment: 5

REF Corresponds to:

Ref document number: 69209901

Country of ref document: DE

Date of ref document: 19960523

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: FR

Payment date: 19960607

Year of fee payment: 5

ET Fr: translation filed
PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

26N No opposition filed
PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Effective date: 19970603

GBPC Gb: european patent ceased through non-payment of renewal fee

Effective date: 19970603

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: FR

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19980227

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

REG Reference to a national code

Ref country code: FR

Ref legal event code: ST

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20000626

Year of fee payment: 9

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 20020403