EP0398897A1 - Transducteur de tension - Google Patents

Transducteur de tension

Info

Publication number
EP0398897A1
EP0398897A1 EP19890900595 EP89900595A EP0398897A1 EP 0398897 A1 EP0398897 A1 EP 0398897A1 EP 19890900595 EP19890900595 EP 19890900595 EP 89900595 A EP89900595 A EP 89900595A EP 0398897 A1 EP0398897 A1 EP 0398897A1
Authority
EP
European Patent Office
Prior art keywords
input
output
transducer
junction
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19890900595
Other languages
German (de)
English (en)
Inventor
Didier René HASPESLAGH
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nokia Bell NV
Alcatel Lucent NV
Original Assignee
Bell Telephone Manufacturing Co NV
Alcatel NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bell Telephone Manufacturing Co NV, Alcatel NV filed Critical Bell Telephone Manufacturing Co NV
Publication of EP0398897A1 publication Critical patent/EP0398897A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is dc
    • G05F3/10Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/24Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/561Voltage to current converters

Definitions

  • the present invention relates to a transducer including an amplifier having a first input as well as an output coupled to a second input via a negative feedback loop and such that the voltage at said second input is substantially equal to an input voltage applied to said first input.
  • Such a transducer is well known in the art, e.g. from the article "A Bipolar Voltage-Controlled Tunable Filter” by K. Fukahori, Journal of Solid-state Circuits, Vol. SC-16, No 6, December 1981, pp 729-731 and more particularly from Fig.8 on page 773 thereof.
  • This transducer is able to convert an input voltage, e.g. a reference DC voltage, into a reference DC current flowing from the output.
  • An object of the present invention is to provide a transducer of the above type, but which provides two separate output voltages that are respectively smaller and larger than said input voltage by accurate predetermined voltages.
  • Such output voltages may for instance be used as reference voltages in the feedback loop of a sigma-delta modulator of the type disclosed in the published European patent application No 0155061.
  • this object is achieved due to the fact that said output is coupled to a DC bias potential through three impedances in series, the junction between the first and the second being coupled to said second input and the junction between the second and the third constituting an additional output for said transducer.
  • Fig. 1 is a schematic diagram of a first embodiment of a transducer according to the present invention
  • Fig. 2 shows a second embodiment of a transducer according to the present invention.
  • the transducer shown in Fig. 1 is built up by means of PMOS transistors PI to P3, of which P2 is connected in diode configuration, NMOS transistors Nl and N2, constant current source CS, resistors Rl to R3 and capacitor C.
  • the transducer comprises an amplifier constituted by the cascade connection of a differential input stage DIS and an output stage OS and has an external input II and two external outputs 01 and 02.
  • the differential input stage DIS comprises two parallel branches connected in series with the constant current source CS between the poles of a DC supply source. These poles are at the bias potentials V and ground respectively. These branches comprise the series connected transistors PI, Nl and P2, N2 respectively. The gates of transistors Nl and N2 constitute the negative and positive inputs II and 12 of the differential stage DIS, whilst the junction point of transistors PI and Nl is the output 03 of this stage.
  • the output stage OS comprises the series connection, between V and ground, of transistor P3 and the resistors Rl to R3 which constitute the drain impedance of this transistor.
  • the gate of transistor P3 is controlled by the output 03 of the input stage DIS and the drain of this transistor P3 constitutes the transducer output 01.
  • the latter is connected to the output 03 via capacitor C which is used for stability purposes as well as to the input 12 of the input stage stage DIS via the feedback resistance Rl.
  • 12 is the feedback input of DIS.
  • the junction point of the resistors R2 and R3 is the transducer output 02.
  • resistors Rl/3 of the output stage OS may also be connected as represented in Fig. 2. Therein they constitute the source resistance of transistor P3 whose gate is again controlled by the output 03 of the differential input stage DIS. However, II and 12 are now used as feedback input and as external input of the transducer respectively. In both cases the external input is at a high impedance level and the three resistances Rl/3 are decoupled therefrom.
  • the output 01 is connected to the positive input 12 via feedback resistor Rl because the voltages at 03 and 01 vary in opposite direction.
  • the output 01 is connected to the negative input II via resistor Rl because these voltages vary in the same direction.
  • V01 VI + Rl.I C2)
  • V02 VI - R2.I C3) or, when taking the relation CD into account by
  • V01 VI + V1.R1/CR2+R3) C )
  • V02 VI - V1.R2/CR2+R3) C5)
  • V01 VI - CV-VDR1/CR2+R3) C6)
  • V02 VI + CV-VDR2/CR2+R3) C7)

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

Le transducteur décrit comprend un étage d'entrée différentiel (DIS) ayant une sortie (03) commandant la porte d'un transistor de sortie (P3), dont la ligne de courant principale est connectée entre les pôles d'une source d'alimentation en courant continue placée en série avec trois résistances (R1/3). La jonction de la première résistance (R1) et de la seconde résistance (R2) est connectée à une entrée (I2) de l'étage différentiel et la jonction de la seconde résistance (R2) et de la troisième résistance (R3) constitue une sortie (02) du transducteur, lequel comporte une autre sortie constituée par la jonction du transistor (P3) et de la première résistance (R1).
EP19890900595 1988-12-05 1988-12-05 Transducteur de tension Withdrawn EP0398897A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/EP1988/001129 WO1990006547A1 (fr) 1988-12-05 1988-12-05 Transducteur de tension

Publications (1)

Publication Number Publication Date
EP0398897A1 true EP0398897A1 (fr) 1990-11-28

Family

ID=8165349

Family Applications (1)

Application Number Title Priority Date Filing Date
EP19890900595 Withdrawn EP0398897A1 (fr) 1988-12-05 1988-12-05 Transducteur de tension

Country Status (3)

Country Link
EP (1) EP0398897A1 (fr)
AU (1) AU625696B2 (fr)
WO (1) WO1990006547A1 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2689708B2 (ja) * 1990-09-18 1997-12-10 日本モトローラ株式会社 バイアス電流制御回路
GB2298724B (en) * 1991-11-15 1996-12-11 Nec Corp Constant voltage circuit
EP0725328B1 (fr) * 1995-01-31 2006-04-05 Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Méthode pour changer le niveau de tension et circuit correspondant
EP0733959B1 (fr) * 1995-03-24 2001-06-13 Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno Circuit pour générer une tension de référence et détecter une baisse de la tension d'alimentation et méthode correspondante
EP0740260B1 (fr) * 1995-04-28 2001-08-22 STMicroelectronics S.r.l. Processeur analogique flou avec compensation de température
DE69528351D1 (de) 1995-04-28 2002-10-31 St Microelectronics Srl Programmierbarer analoger Fuzzy-Prozessor
CN104104228B (zh) * 2014-08-04 2017-06-06 南京矽力杰半导体技术有限公司 同步整流电路和应用其的充电电路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU498002B2 (en) * 1975-06-28 1979-02-01 Licentia Patent-Verwaltungs-Gmbh Amplifier
DE3071642D1 (en) * 1979-12-19 1986-07-24 Seiko Epson Corp A voltage regulator for a liquid crystal display
US4282477A (en) * 1980-02-11 1981-08-04 Rca Corporation Series voltage regulators for developing temperature-compensated voltages
US4280090A (en) * 1980-03-17 1981-07-21 Silicon General, Inc. Temperature compensated bipolar reference voltage circuit
AU557658B2 (en) * 1982-04-01 1987-01-08 Unisearch Limited Parallel amplifier
DE3334243A1 (de) * 1983-09-22 1985-04-04 Standard Elektrik Lorenz Ag, 7000 Stuttgart Kapazitiver, komplexer widerstand
JPS60163116A (ja) * 1984-02-02 1985-08-26 Hitachi Cable Ltd オフセツト電圧発生回路
JP2638771B2 (ja) * 1985-07-02 1997-08-06 松下電器産業株式会社 基準電圧発生装置
US4680535A (en) * 1985-10-17 1987-07-14 Harris Corporation Stable current source

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO9006547A1 *

Also Published As

Publication number Publication date
WO1990006547A1 (fr) 1990-06-14
AU4532789A (en) 1990-06-07
AU625696B2 (en) 1992-07-16

Similar Documents

Publication Publication Date Title
US6384684B1 (en) Amplifier
US5736892A (en) Differential charge pump circuit with high differential impedance and low common mode impedance
JP3185698B2 (ja) 基準電圧発生回路
US4394587A (en) CMOS Differential comparator with hysteresis
JPH09179644A (ja) 温度補償基準電流発生器
JPH05276737A (ja) 昇圧回路
JPH09181540A (ja) 高対称性の双方向電流源
US4524328A (en) MOS Power amplifier circuit
US4352073A (en) Complementary MOS field effect transistor amplifier
US7612614B2 (en) Device and method for biasing a transistor amplifier
US6476669B2 (en) Reference voltage adjustment
US6448851B1 (en) Amplifier with offset compensation for a high voltage output transistor stage
EP0398897A1 (fr) Transducteur de tension
US4924113A (en) Transistor base current compensation circuitry
WO1982002128A1 (fr) Circuit de commande ayant une distorsion de convergence reduite
US6965270B1 (en) Regulated cascode amplifier with controlled saturation
EP0618674B1 (fr) Circuit de conversion de tension en courant
US6525602B1 (en) Input stage for a buffer with negative feed-back
US5302888A (en) CMOS integrated mid-supply voltage generator
KR19980033303A (ko) 레벨 시프트 회로
US6496066B2 (en) Fully differential operational amplifier of the folded cascode type
US5065056A (en) Clamping circuit
US20050110470A1 (en) Analog level shifter
US20210067102A1 (en) Amplifier circuit
US4616172A (en) Voltage generator for telecommunication amplifier

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19900717

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): BE CH IT LI

17Q First examination report despatched

Effective date: 19930422

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 19940316