AU625696B2 - A transducer - Google Patents

Description

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COMMONWEALTH OF AUSTRALIA PATENTS ACT 1952-1969 COMPLETE SPECIFIECATION FOR THE IN)VENTION ENTITLED "A TRANSDUCER" The following statement is a full description r.F.

this invention, including the best method of performing it kcnown to us:sliko, 1 2 1/ a This invention relates to a transducer including an amplifier having a first input as well as an output coupled to a second input via a negative feedback loop and such that the voltage at said second input is substantially equal to an input voltage applied to said first input.

Such a transducer is well known in the art, e.g. from the article "A Bipolar Voltage-Controlled Tunable Filter" by K. Fukahori, Journal of Solid- State Circuits, Vol. SC-16, No. 6, December 1981, pp 729-731 and more particularly from Fig. 8 on page 773 thereof. This transducer is able to convert an input voltage, e.g. a reference DC voltage, into a reference DC current flowing from the output.

An object of the present invention is to provide a transducer of the above type, but which provides two separate output voltages that are respectively smaller and larger than said input voltage by accurate predetermined voltages. Such output voltages may for instance be used as reference voltages in the feedback loop of a sigma-delta modulator of the type disclosed in the specification of Australian Patent No. 571944.

According to the invention this object is achieved coupling said output to a DC bias potential through three impedances in series, the junction between the first and the second being coupled to said second input and the junction between the second and the third constituting an additional output for said transducer.

In this way the same current flows through all three impedances so that the voltages at the transducer outputs are equal to the input voltage plus and minus respective predetermined voltages which are each function of the ratio of two impedances. Because such a ratio can be realised in an accurate way better than the impedances themselves the predetermined voltages and therefore also the output voltages are accurate.

The above mentioned and other objects and features of the invention will become more apparent and the invention itself will be best understood by re- Sil l j ll.rrCl if

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i i 1 i: ferring to the following description of embodiments taken in conjunction with the accompanying drawings wherein: Figure 1 is a schematic diagram of a first embodiment of a transducer according to the present invention; Figure 2 shows a second embodiment of a transducer according to the present invention.

The transducer shown in Figure 1 is built up by means of PMOS transistors PI to P3, of which P2 is connected in diode configuration, NMOS transistors N1 and N2, constant current source CS, resistors Rl to R3 and capacitor C. The transducer comprises an amplifier constituted by the cascade connection of a differential input stage DIS and an output stage OS and has an external input Il and two external outputs 01 and 02.

The differential input stage DIS comprises two parallel branches connected in series with the constant current source CS between the poles of a DC supply suurce. These poles are at the bias potentials V and ground respectively. These branches comprise the series connected transistors P1, N1 and P2, N2 respectively. The gates of transistors Nl and N2 constitute the negative and positive inputs Ii and 12 of the differential stage DIS, whilst the junction point of transistors PI and N1 is the output 03 of this stage.

The output stage OS comprises the series connection, between V and ground, of transistor P3 and the resistors Ri to R3 which constitute the drain impedance of this transistor. The gate of transistor P3 is controlled by the output 03 of the input stage DIS and the drain of this transistor P3 constitutes the transducer output 01. The latter is connected to the output 03 via capacitor C which is used for stability purposes as well as to the input 12 of the input stage DIS via the feedback resistance Rl. Hence 12 is the feedback input of DIS. The junction point of the resistors R2 and R3 is the transducer output 02.

Instead of connecting the resistors R1/3 of the output stage OS in the way shown in Figure 1 they may also be connected as respresented in Figure 2.

3 1 r: 1 -L i, Therein they constitute the source resistance of transistor P3 whose gate is again controlled by the output 03 of the differential input stage DIS. However, Il and 12 are now used as feedback input and as external input of the transducer respectively. In both c'aaes the external input is at a high impedance level and the three resistances R1/3 are decoupled therefrom.

To be noted that in Figure 1 the output 01 is connected to the positive input 12 via feedback resistor R1 because the voltages at 03 and 01 vary in opposite direction. On the contrary, in Figure 2 the output 01 is connected to the negative input Il via resistor Ri because these voltb'ges vary in the same direction.

Instead of using a PMOS transistor P3 in the output stage OS use may obviously also be made therein of an NMOS transistor. Also instead of MOS tran- S sistors bipolar transistors could be utilised.

Returning to Figure 1, when for instance a DC reference voltage Vl is applied to the transducer input Ii and assuming that the gain of the input stage 41 DIS is sufficiently high the input 12 will substantially also be at the same reference voltage V1. As a consequence a DC current I =Vl/(R2+R3) (1) flows to ground through the resistors R2 and R3. Because no current flows into the input 12 this DC current I necessarily flows through P3 and Ri in sesi, ries so that the voltages V0l and V02 and the transducer outputs 01 and 02 are given by V0l Vl Rl.I1 V02 =Vi R2. 1 (3) or, When taking -the relation into account by V0l Vi Vl.R.I/(R2+R3) (4) V02 V1 Vl.R2/(R2+R3) In the transducer of Fig. 2 the output voltages V01 and V02 are given by the followingla relations 4 vl1 Vi (V-V1)R1/(R2+R3) (6) V02 Vl (V-V1)R2/(R2+R3) (7) From the relations to it follows that the two voltages VOl and V02 are equal to a same reference voltage V1 plus and minus a respective predetermined voltage which is dependent on the value of the ratio of two resistances and not on the values of these resistances themselves. This is advantageous when the transducer has to be integrated on a chip since it is easier to realise an accurate resistance ratio than an accurate resistance.

Instead of resistances other impedances, e.g. Zener diodes, could be used.

Further, instead of applying an input DC voltage, an AC voltage or an AC/DC voltage could be applied.

From the above it is also clear that the present transducer first converts the DC reference voltage VI into a DC reference current I and then uses this current to generate predetermined voltage drops in the resistances R1 and R2, thus creating the outout voltages VO1 and V02.

While the principles of the invention have been described above in connection with specific apparatus, it is to be clearly understood that this description is made only by way of example and not as a limitation on the scope of i;he invention.

Claims (3)

1. A transducer including an amplifier means having a first input as well as a first output coupled to a second input via a negative feedback loop such that the voltage at said second input is substantially cqual to an input voltage applied to said first input, wherein said first output is coupled to a fir'st DC bias potential through three impedances in series, the junction bctwen the first and thle second being cou- pled to said sccond input and the junction between the second and the third consti- tuting an additional output for said transducer.

2. A transducer as claimcel in claim 1, wherein said amplifier means comprises a. differential amplifier stage whosc inputs are said first input and said second input and Whose Output is coupled to and includes an Output transistor, and wherein said first output is further connected. to a second DC bias potential, having a valuc distinct from said first DC bias potential, through the said output transistor's main current it: path, all said three impedances allowing the flow of DC current.

3. A transducer as claimed in clairn 1, wherein said first input is at a high impedance level, e.g. input of an operational amplifier, said three impedances being o decoupled therefrom. A transducer substantially as herein described with reference to Figures 1 or 2 of the accompanying drawings. 300 D7