EP0359171A2 - Schaltung zum Feststellen der Stromwellenform eines Transistors - Google Patents

Schaltung zum Feststellen der Stromwellenform eines Transistors Download PDF

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Publication number
EP0359171A2
EP0359171A2 EP89116763A EP89116763A EP0359171A2 EP 0359171 A2 EP0359171 A2 EP 0359171A2 EP 89116763 A EP89116763 A EP 89116763A EP 89116763 A EP89116763 A EP 89116763A EP 0359171 A2 EP0359171 A2 EP 0359171A2
Authority
EP
European Patent Office
Prior art keywords
transistor
switching
collector
transducing
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP89116763A
Other languages
English (en)
French (fr)
Other versions
EP0359171A3 (de
EP0359171B1 (de
Inventor
Davide Chieli
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
STMicroelectronics lnc USA
Original Assignee
SGS Thomson Microelectronics SRL
SGS Thomson Microelectronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SRL, SGS Thomson Microelectronics Inc filed Critical SGS Thomson Microelectronics SRL
Publication of EP0359171A2 publication Critical patent/EP0359171A2/de
Publication of EP0359171A3 publication Critical patent/EP0359171A3/de
Application granted granted Critical
Publication of EP0359171B1 publication Critical patent/EP0359171B1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K4/00—Generating pulses having essentially a finite slope or stepped portions
    • H03K4/06—Generating pulses having essentially a finite slope or stepped portions having triangular shape
    • H03K4/08—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape
    • H03K4/48—Generating pulses having essentially a finite slope or stepped portions having triangular shape having sawtooth shape using as active elements semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0826—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in bipolar transistor switches

Definitions

  • the present invention relates to a circuit for sensing the waveform of the collector current in a transistor, in particular the switching transistor of a regulated power supply operating in current mode.
  • a power supply of this type is shown in figure 1, corresponding to the device UC 1842 or UC 1846 manufactured by SGS Microelectronics.
  • the power supply comprises a dual loop including an error amplifier EA which compares the regulated voltage V O with an externally fed reference voltage V REF and generates an error signal ES.
  • a comparator CP is provided downstream the error amplifier EA in order to compare the error signal ES, which is fed to the non-inverting input of the comparator CP, to a saw-tooth signal RA which is proportional to the saw tooth current which flows through the collector of the switching transistor T S .
  • Said saw-tooth signal RA generated by a sensing resistor R S connected between the emitter of the switching transistor T S and the ground, is fed to the inverting input of the comparator thus forming a feedback loop.
  • the comparator CP generates a switching signal indicated by the letter C.
  • Block 2 connected to the collector of transistor T S , is a part of the regulated power supply and generates the regulated output voltage V O , but is not shown in detail since it is well known in the art and not necessary for the comprehension of the present invention.
  • the dimensioning of the sensing resistor R S is rather difficult, since two opposite conditions must be satisfied, namely: - in order to keep the dissipated power as low as possible, the sensing resistor R S must have a low resistive value; - and on the other hand the resistance of said resistor R S must be kept relatively high in order to maximize the dynamic amplitude of the saw-tooth signal.
  • Said article describes a FET sensor in which a portion of the cells of the source is used for current sensing purposes, monitoring the absorbed current without intersecting in series to the current load a high-power dissipation resistor.
  • the aim of the present invention is to provide a current sensing circuit which can be easily implemented in various technologies, for example MOS technology or bipolar technology.
  • a particular object of the present invention is to provide a sensing circuit generating a good dynamic saw-tooth signal fed through a feedback loop to the comparator which controls the switching transistor and nevertheless has low power dissipation.
  • a further object of the invention is to provide a sensing circuit structure, of the kind used in integrated circuits, which can be implemented at low cost.
  • the block indicated by the reference numeral 1 in figure 1 is replaced with the switching circuit illustrated in figure 2 which receives at a first input the switching signal C and at a second input a control signal C R generated by an inverting delay block 3, such as the one illustrated in figure 4.
  • the switching signal C is generated by the comparator CP, as is known in the art.
  • said switching signal C is delayed by the delay block 4, indicated by T a , while the inversion is completed by means of the NAND gate 5.
  • the resulting control signal C R is inverted and has a falling edge delayed with respect to the leading edge of the switching signal C, as illustrated in figure 5.
  • the delay block has a conventional structure and comprises, for example, resistor means and capacitor means, as is well known in the art.
  • the control signal C R is used, together with switching signal C, for controlling the switching circuit illustrated in figure 2.
  • a first supply voltage line V SS and a second supply voltage line V CC feed the switching circuit; said voltage lines V SS and V CC , defining reference potential lines, are not necessarily equal to one another.
  • the switching transistor is here defined by a first transistor T1, which is preferably constituted by a power transistor and has a collector current I C ; said transistor is controlled by said switching signal C which is applied to its base.
  • the collector of said first transistor T1 is connected, through an impedance Z C , to the second supply voltage line V CC and to the cathode of a diode D, while the emitter of said first transistor T1 is connected to the ground G defining a further reference potential line.
  • the impedance Z C represents the block 2 of figure 1 if the switching circuit of figure 2 is used in a power supply of the type shown in figure 1, but may represent any load fed by the collector current of transistor T1.
  • the switching circuit further comprises a second transistor T2 which defines a switch element and is controlled by the control signal C R applied to its base.
  • the collector of the second transistor T2 is connected to the anode of said diode D, to a current source S which generates a constant current I p , and to the base of a third transistor T3 defining a transducing transistor.
  • the emitter of said second transistor is connected to the ground.
  • the current source S is fed by said first supply voltage line V SS which is also connected to the collector of the third transistor T3.
  • the emitter of the third transistor is connected to the ground through resistor R.
  • the first transistor T1 is on while the second transistor T2 is off and the third transistor T3 is on since it is not short-­circuited by the second transistor.
  • the voltage drop V P across the diode D is approximately equal to the base-­emitter voltage drop V BE across said third transistor T3 so that the voltage drop V R across the resistor R (corresponding to signal RA of figure 1 to be fed to comparator CP) is consequently equal to the collector-­emitter voltage drop across said first transistor T1.
  • the pair of elements constituted by the third transistor T3 and by the diode D acts as a differential amplifier controlled by transistor T2 which switches off the differential amplifier when signal C R is high.
  • the first transistor T1 switches off and the current source S is connected to ground through transistor T2, thus causing the third transistor T3 to switch off.
  • the switching signal C and the control signal C R as illustrated in the diagram of figure 3, therefore allow to extract the waveform of the collector currents I C and I C3 .
  • the falling edge of the signal C R must be delayed by the time T a with respect to the leading edge of the switching signal C, thus the third transistor T3 is switched off after the first transistor T1 is switched on.
  • the power transistor T S in the conducting state has an equivalent resistance of 1 ⁇
  • the resistor R S has a value of 1 ⁇ and the collector current I C is of 1 A
  • the power dissipated by R S is 1 W
  • the power dissipated by T S is also 1 W.
  • resistor R has a value of 1 K ⁇
  • V SS might be of the order of 10 V
  • the current I P which is fed by the source S which feeds the third transistor T3 is of the order of 10 ⁇ A, while the NAND gate which feeds the signal C R also has a consumption in the range of a few mW. All the power consumption estimates approximately correspond to practical values.
  • the power consumption of the circuit of figure 2 is in the range of 10 mW, and is therefore much lower than the one of block 1, while the dynamic excursion of the signals across R S and R is identical.
  • the transistors may furthermore be replaced with equivalent switching means.
  • the current sensing circuit of figure 2 may be applied to any device including a controlled transistor such as T1, the collector current of which should be controlled with high dynamics and low dissipation and is not limited to regulated power supply as shown in figure 1.
  • a controlled transistor such as T1

Landscapes

  • Measurement Of Current Or Voltage (AREA)
  • Electronic Switches (AREA)
  • Dc-Dc Converters (AREA)
EP89116763A 1988-09-15 1989-09-11 Schaltung zum Feststellen der Stromwellenform eines Transistors Expired - Lifetime EP0359171B1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
IT8821955A IT1226938B (it) 1988-09-15 1988-09-15 Circuito per il rilevamento della forma d'onda della corrente in un transistor
IT2195588 1988-09-15

Publications (3)

Publication Number Publication Date
EP0359171A2 true EP0359171A2 (de) 1990-03-21
EP0359171A3 EP0359171A3 (de) 1991-08-07
EP0359171B1 EP0359171B1 (de) 1996-04-03

Family

ID=11189361

Family Applications (1)

Application Number Title Priority Date Filing Date
EP89116763A Expired - Lifetime EP0359171B1 (de) 1988-09-15 1989-09-11 Schaltung zum Feststellen der Stromwellenform eines Transistors

Country Status (5)

Country Link
US (1) US4929883A (de)
EP (1) EP0359171B1 (de)
JP (1) JPH02154159A (de)
DE (1) DE68926138T2 (de)
IT (1) IT1226938B (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5247240A (en) * 1990-07-25 1993-09-21 Power Trends Miniaturized switching power supply with circuit for unidirectional suppression of leading spike
US5164659A (en) * 1991-08-29 1992-11-17 Warren Schultz Switching circuit
JP3337079B2 (ja) * 1991-11-26 2002-10-21 ローム株式会社 電源回路
US5319303A (en) * 1992-02-12 1994-06-07 Sony/Tektronix Corporation Current source circuit
JP3523718B2 (ja) * 1995-02-06 2004-04-26 株式会社ルネサステクノロジ 半導体装置
US5760571A (en) * 1995-08-16 1998-06-02 Signal Restoration Technologies I Limited Partnership Power supply damping circuit and method
FR2767589B1 (fr) * 1997-08-21 2000-07-21 Sgs Thomson Microelectronics Dispositif de surveillance de tension d'alimentation de type "reset"
JPH11224131A (ja) * 1998-02-04 1999-08-17 Seiko Instruments Inc ボルテージ・レギュレータ
US8238127B1 (en) * 2007-10-31 2012-08-07 Sadwick Laurence P Method and apparatus for supplying and switching power

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL177858C (nl) * 1976-03-31 1985-12-02 Philips Nv Schakeling voor het leveren van een vooraf bepaalde stroom aan een belasting.
US4072890A (en) * 1976-10-18 1978-02-07 Honeywell Inc. Voltage regulator
US4107596A (en) * 1976-10-21 1978-08-15 The Singer Company Efficient bidirectional power converter for portable data gathering apparatus
US4291357A (en) * 1979-12-27 1981-09-22 International Business Machines Corp. Short circuit protection circuit
US4339707A (en) * 1980-12-24 1982-07-13 Honeywell Inc. Band gap voltage regulator
JPH0690656B2 (ja) * 1985-01-24 1994-11-14 ソニー株式会社 基準電圧の形成回路
FR2588431B1 (fr) * 1985-10-08 1987-11-20 Radiotechnique Circuit regulateur de tension

Also Published As

Publication number Publication date
DE68926138D1 (de) 1996-05-09
US4929883A (en) 1990-05-29
EP0359171A3 (de) 1991-08-07
EP0359171B1 (de) 1996-04-03
DE68926138T2 (de) 1996-12-12
IT8821955A0 (it) 1988-09-15
IT1226938B (it) 1991-02-22
JPH02154159A (ja) 1990-06-13

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