EP0324020A1

EP0324020A1 - A method of providing refilled trenches

Info

Publication number: EP0324020A1
Application number: EP19880906932
Authority: EP
Inventors: Shane Duncan
Original assignee: Plessey Overseas Ltd; Plessey Semiconductors Ltd
Current assignee: Plessey Semiconductors Ltd
Priority date: 1987-07-24
Filing date: 1988-07-22
Publication date: 1989-07-19
Also published as: WO1989001236A1; JPH02500153A; GB2207281B; GB2207281A; GB8717612D0

Abstract

A method of providing refilled trenches, for use in i.c. technology, using spin-on glass (14). The method comprises etching a trench through the substrate, growing a passivating layer (8), providing fillets (12) on the sidewalls of the trench, defining a void (13) therebetween and filling the void with spin-on glass (14). The glass is then cured at a high temperature and etched back to provide a planarised trench. The fillets reduce the effective width of the trench, thereby enabling spin- on glass to be introduced and avoiding the problem of the glass cracking during the curing process.

Description

A METHOD OF P OVIDTNG REFILLED TRENCHES

The present invention relates to a method of providing refilled trenches and in particular to a method of refilling deep trenches with spin-on glass.

The use of trenches in integrated circuit (i.c) technology is a known technique for providing component isolation and mechanical stability. The trenches are formed by etching through the epitaxial layer and buried N+ layer. The trench is then refilled with a refill material which is usually polysilicon.

Previously proposed methods of introducing the refill material have been susceptible to defect generation in the epitaxial layer during the succeeding stages of device processing.

One such method comprises refilling the trench completely with polysilicon. When the trench is completely filled, a grain boundary is formed down the middle of the trench since the deposition of polysilicon extends from the side walls of the trench inwards. This grain boundary is fissile such that during field oxidation, the oxide may extend into the trench along the grain boundary. The oxide acts on the polysilicon, creating pressure on the sidewalls of the trench which can result in defects being formed in the epitaxial layer. Attempts have^' been made to reduce this pressure by depositing a thinner layer of polysilicon on the sidewalls. However, it has proven impractical to control the required thickness for minimising pressure on the sidewalls whilst ensuring that the trench is filled. Generally, methods using an oxide as a refill material are restricted to specialised chemical vapour deposition (CVD) processes and require large thicknesses of material to planarise the trench surface. A more preferable refill material is spin-on glass since it can be applied by a less specialised process and is a material which is self-planarising.

However, thick layers or large volumes of spin-on glass are susceptible to cracking at high temperatures during the curing process. Spin-on glass is a known material in the art and comprises polymethyle syloxane.

Hence, the present invention seeks to provide a method for refilling deep trenches using spin-on glass whilst substantially eliminating the aforementioned disadvantages.

According to the present invention there is provided, a method of providing refilled trenches, which method comprises: etching a trench; growing a passivating layer for lining the trench: providing fillets along each respective sidewall of the trench contiguous with the passivating layer, having a void therebetween; and filing the said void with spin-on glass.

Preferably, the fillets are provided by depositing a layer of polysilicon and anisotropically etching the said layer.

Furthermore, the method may comprise the following steps of curing the spin-on glass and etching the spin-on glass, thereby providing a planarised trench surface. Particular embodiments of the present invention will now further be described with reference to the accompanying drawings, of which:

Figures 1, 2, 3, and 4 are schematic cross-sections of trenches at various stages of the method in accordance with a first embodiment; and

Figures 5, 6, and 7 are schematic cross-sections of trenches at various stages of the method in accordance with a second embodiment.

Referring to the drawings there is shown schematic cross- sections of silicon substrate for one micron feature size integrated circuits. A trench 2 is plasma etched through the epitaxial layer 4 and buried N+ layer 6. The dimensions of the trench are typically 5μ m deep and 2μm wide. The trench 2 is introduced to provide component isolation in the integrated circuit, the components (not shown) being disposed in the epitaxial layer 4.

After etching the trench 2, a layer of thermal oxide 8 is grown to provide a suitable passivating layer. This layer of thermal oxide 8 typically comprises a homogenous, amorphous material possessing a structure of silicon-oxygen bonds grown at a high temperature.

In accordance with the first embodiment shown in Figures 1 to 4, a thick layer of polysilicon 10 is then deposited usually by a low pressure chemical vapour deposition (LPCVD) process.

This layer is then anisotropically etched in a vertical direction to form large sidewall fillets 12 running down the sidewalls of the trench 2 as shown in figure 2. The width of the fillets 12 is approximately 0.7μm. These fillets 12 leave a void 13 running down the middle of the trench 2, of a width approximately 0.5μm.

Glass is then spun-on, filling the void 13 and resides above the surface of the trench 2. Since the material spin-on glass is self- planarising, in this application it will tend to form a uniform layer parallel to the thermal oxide layer 8, as shown in Figure 3. The spin- on glass is then cured at a high temperature, forming a stable oxide. The cured glass is then etched to form a planarised trench 2 as shown in Figure 4.

The second embodiment of the present invention will now be described with reference to Figures 5, 6 and 7.

As before, the trench 2 is etched through the epitaxial layer 4 and buried N+ layer 6. A passivating layer is provided by growing the layer of thermal oxide 8.

As shown in Figure 5 a layer of silicon nitride 16 is then deposited, followed by a thin layer of polysilicon 10. The depth of the polysilicon is approximately 0.3μm. This layer of polysilicon 10 is anisotropically etched in a vertical direction, to leave thin sidewall fillets 18 as shown in Figure 6. Thus a void 20 remains therebetween running down the trench 2, of an approximate width 1.4μm. The width of this void 20 is too wide to avoid cracking of the spin-on glass during the curing process, if introduced at this stage. Therefore, the fillets 18 are completely oxidised and swell so as to leave a narrower void 20, see Figure 7. The layer of silicon nitride 16 protects the surface and sidewalls of the trench 2 from this oxidation process. As in the first embodiment, the void 20 is then filled with spin- on glass, cured at a high temperature and then etched back to provide a planarised trench 2.

The use of spin-on glass as a refill material ensures low isolation capacitance between adjacent buried N+ layers whilst improving surface planarity after refill. Furthermore, the probability of defect formation in the eptaxial layer 4 is reduced.

In the first embodiment, this is due to a reduced exposure area of the polysilicon fillets 12 to any subsequent field oxidation. Also if the top of the fillets 12 do become oxidised, then the resultant pressure tends to act on the spin-on glass 14 rather than the sidewalls of the trench 2.

In the second embodiment, the refill material in the trench, namely the fillets 18 and the spin-on glass 20, is already oxidised and therefore not susceptible to further oxidation. Hence, the problem of defect formation is obviated.

It will be readily apparent to a man skilled in the art, that the foregoing description has been given by way of example only and modifications may be made without departing from the scope of the present invention.

Claims

1. A method of providing refilled trenches for use in integrated circuit (i.c) technology, which method comprises: etching a trench; growing a passivating layer for lining the trench; providing fillets along each respective sidewall of the trench contiguous with the passivating layer, having a void therebetween; and filling the said void with spin-on glass.

2. A method as claimed in claim 1, wherein after growing the passivating layer, depositing a layer of silicon nitride.

3. A method as claimed in claim 1 or claim 2, wherein the fillets are provided by depositing a layer of polysilicon and anisotropically etching the said layer of polysilicon.

4. A method as claimed in claims 2 and 3, which method comprises oxidising the fillets.

5. A method as claimed in any one of the preceding claims, wherein the passivating layer is a layer of thermal oxide comprising a structure of silicon-oxygen bonds.

6. A method as claimed in any one of the preceding claims, comprising the further steps of curing the spin-on glass and etching the spin-on glass, thereby providing a planarised trench surface.

7. A method of providing refilled trenches substantially as herein before described with reference to the accompanying drawings.

8. An integrated circuit having at least one refilled trench substantially as provided by the aforegoing method.