EP0147542A2 - Système d'affichage à fenêtres multiples - Google Patents

Système d'affichage à fenêtres multiples Download PDF

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Publication number
EP0147542A2
EP0147542A2 EP84111872A EP84111872A EP0147542A2 EP 0147542 A2 EP0147542 A2 EP 0147542A2 EP 84111872 A EP84111872 A EP 84111872A EP 84111872 A EP84111872 A EP 84111872A EP 0147542 A2 EP0147542 A2 EP 0147542A2
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EP
European Patent Office
Prior art keywords
screen
display
buffer
data
buffers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP84111872A
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German (de)
English (en)
Other versions
EP0147542B1 (fr
EP0147542A3 (en
Inventor
Harry Cheselka
Jeffrey Stuart Lucash
William Doosevelt Vincent
Joy Lynn Mann
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
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International Business Machines Corp
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Filing date
Publication date
Priority claimed from US06/542,376 external-priority patent/US4651146A/en
Priority claimed from US06/542,572 external-priority patent/US4653020A/en
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of EP0147542A2 publication Critical patent/EP0147542A2/fr
Publication of EP0147542A3 publication Critical patent/EP0147542A3/en
Application granted granted Critical
Publication of EP0147542B1 publication Critical patent/EP0147542B1/fr
Expired legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/22—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
    • G09G5/222—Control of the character-code memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/14—Display of multiple viewports

Definitions

  • the present invention is generally related to a multiple window display system and more particularly to hardware and software implementations that display multiple data windows on cathode ray tube (CRT), gas panel, liquid crystal displays (LCD) and other like displays commonly used in computer and data processing systems.
  • CTR cathode ray tube
  • LCD liquid crystal displays
  • the invention has its primary application in multi-tasking computer environments wherein each window displays data from a different one of the tasks.
  • FIG. 1 shows a typical implementation.
  • a CRT controller 10 is used to generate memory addresses for a display refresh buffer 12.
  • a selector 14, interposed between the controller 10 and the buffer 12, is used to provide an alternate source of addressing so that the contents of the refresh buffer can be modified.
  • the selector 14 may pass the refresh address from the controller 10 or an address on the system address bus to the display refresh buffer 12.
  • TDM time division multiplexing
  • the display refresh buffer usually contains storage for a character code point and associated attributes. The character code point is used to address the character pel generator 16.
  • Outputs from the character generator 16 are produced in synchronism with the scan line count output from the CRT controller 10. Attribute functions such as reverse video, blink, underscore, and the like are applied to the character generator outputs by the attribute logic 18, and the resultant pels are serialised to the video monitor.
  • a number of operating system (OS) programs and application programs allow a computer to carry on multiple tasks simultaneously.
  • a background data processing task might be carried on with a foreground word processing task.
  • Related to the background data processing task might be a graphics generation task for producing pie or bar charts from the data generated in the data processing task.
  • the data in all these tasks might be merged to produce a single document.
  • the multi-tasking operating may be performed by a single computer such as one of the more popular micro computers now on the market, or it may be performed by a micro computer connected to a host computer. In the latter case, the host computer generally carries out the background data processing functions, while the micro computer carries out the foreground operations.
  • the system shown in Figure 1 can also be used to display windows from multiple tasks. Each task is independent of the others and occupies non-overlapping space in the system memory. User-definable windows for the tasks resident in system memory can be constructed so as to display, within the limits imposed by the screen size, data from each of the tasks being processed.
  • Figures 2A and 2B illustrate this concept. From the user perspective, windows can be displayed as either non-overlapping, as shown in Figure 2A, or layered or overlapping, as shown in Figure 2B. It will be understood by those skilled in the art, however, that an overlapping display of the type shown in Figure 2B does not imply lost data in the system memory. On the contrary, it is necessary to preserve the data for each task so that as an occulting window is moved about the display screen or even removed from the display screen, the underlying display data can be viewed by updating the refresh buffer.
  • a multiple window display system including a repeatedly scanned display device, a screen buffer having display data element locations mapped directly onto the display areas of the display device and accessing means traversing the display data element locations in synchronism with the traverse of the display areas of the display device and a facility for compiling, from, potentially, a plurality of windows generated independently by individual respective users, an aggregate of data elements to be displayed, characterised in that the compiling facility is controlled by a picture matrix having compile control locations mapped directly onto the display areas of the display device and is directly responsive to the contents of the control locations to automatically filter the available data elements from the various windows, display area by display area.
  • task selection means couples the output of a single one of the buffers to video output at any given time.
  • the data displayed originates from a selected buffer appropriate to the over-all composition producing a screen picture compiled from more than one of the screen buffers.
  • the task selection means may be a separate task selection buffer and decoder, in which case the task selection buffer is synchronously addressed with the screen buffers and the decoder enables the read out of a single one of the screen buffers for any point on the display screen.
  • one of the screen buffers may be designated to perform the operation of the task selection buffer.
  • the display data in the designated screen buffer is non-transparent in the sense that it cannot, at a location corresponding to a given screen location, also be used for display data for that screen location, since that buffer location is loaded with unique selection code used to indicate one of the other buffers from which the data for that location is to be taken.
  • unique selection code used to indicate one of the other buffers from which the data for that location is to be taken.
  • the absence of one of these selection codes at the accessed non-transparent buffer location allows the data at that location to be displayed, as a default condition, at the corresponding screen location. In this way, it will be apparent how the display is compiled from data, in part, from the non-transparent buffer and, in part, from the other screen buffers.
  • the system memory provides presentation spaces for receiving application data for plural windows of the displayable area. Each window defines the whole or a subset of a corresponding presentation space.
  • a window priority matrix mapped to the display screen filters the data from the windows of the presentation spaces to the screen buffer to designate which of the data will be shown in corresponding positions of the display screen.
  • display data filtering can be performed both on loading a screen buffer and also on selective read out of the screen buffers where more than one such is provided
  • CRT displays are but one of many types of display, including gas panels and liquid crystal displays, to which the present invention may be applied. Therefore, those skilled in the art will understand that the mention of CRT displays is by way of example only. It follows therefore that the term refresh buffer, while having a particular meaning as applied to CRT displays, is fully equivalent to either a hardware or software screen buffer for storing data to be displayed.
  • the current refresh address from the CRT controller 10 is supplied to one of the operand inputs of adders 20 1 to 20 n .
  • the other operand input of each of these adders is supplied by corresponding offset registers 22 1 to 22 n .
  • An effective refresh address for any one of the refresh buffers is generated by adding the current address provided by the CRT controller 10 with a value previously stored in the associated offset address register 22 1 to 22 n . Because a common refresh address is used in the example shown in Figure 4, the width of the formatted data must be the same for all the refresh buffers.
  • a task selection memory 24 having a location for each screen display area so that the contents of the task selection memory can be referred to as a screen matrix, is also accessed in parallel, via its selector 26, using the CRT controller produced address, to enable the output of a single selected refresh buffer.
  • decoder 28 which responds to the contents, which are essentially codes, read out of the locations as they are scanned in synchronism with the screen buffers, and, of course, the display itself, to generate enable outputs 1 to n.
  • These enable outputs are provided to the corresponding refresh buffers 12 1 to 12 n so that at any given time only one of the refresh buffers is enabled to supply an output to the character generator 16 and attribute logic 18.
  • a simplified variation of the system shown in Figure 4 can be implemented as is shown in Figure 6.
  • the task selection memory 24 is eliminated by designating one of the refresh buffers to be non-transparent and effectively take the place of the task selection memory.
  • refresh buffer 12 1 is so designated.
  • the decoder 28 is retained and a gate 30 is added.
  • Unique filter codes, loaded into the non-transparent refresh buffer can then be used as the selection mechanism for the remaining transparent refresh buffers 12 2 to 12 .
  • the absence of of one of these selection 2 n buffer code points at the currently accessed location in buffer 12 1 , as detected by the decoder 28, causes the gate 30 to pass the data stored in that location, if any, to the character generator 16. This modification trades off a reduction in hardware against the performance loss caused by having one of the buffers non-transparent.
  • this implementation employs screen control blocks 32, window control blocks 34, presentation space control blocks 36, presentation spaces 38, and a screen matrix 40.
  • screen control blocks 32 There may be, for example, ten screen control blocks and ten sets of window control blocks, one each for each screen layout.
  • a given screen control block 32 points to a corresponding set of window control blocks 34.
  • Each presentation space 38 has at least one window per screen layout. The presentation spaces, but not the windows, are common to all screens.
  • the window control block 34 corresponding to a given presentation space 38 in that screen layout, defines the origin (upper left hand corner) of the window in the presentation space, the width and height of that window in the presentation space and the origin of the window on the display screen.
  • the screen matrix 40 is a map of the data to be displayed and, in one embodiment, maps, on a one-to-one basis by character, that which is to be displayed on the CRT screen, but the mapping could be on a pel or any other basis. All display output from the several tasks is directed to memory and, specifically, to the presentation spaces 38 rather than to the hardware refresh buffer.
  • a micro computer such as the IBM (R.T.M.) Personal Computer (PC)
  • a host computer such as an IBM 3270 computer via a controller such as an IBM 3274 controller.
  • the PC hardware buffer 12 2 acts as the PC presentation space.
  • Each presentation space is assigned an identification tag and has an associated window defined by the operator or an application program as to size and screen location.
  • the system builds an image in the screen matrix 40 consisting of the identifying tag aligned in the appropriate locations.
  • the matrix 40 may be created in a reverse order from that appearing on the CRT screen allowing overlapping windows to be built up by overwriting.
  • the matrix 40 can be created by beginning with the uppermost window and so on, down through the overlay.
  • the choice of the method of creating the matrix 40 is based on desired system performance.
  • the system directs display output to the refresh buffer by filtering all screen updates through the screen matrix 40, allowing a performance increment in an overlapped window system by only allowing those characters that actually need to be changed or displayed on the screen to reach the refresh buffer.
  • those characters that are not currently required,do not reach the refresh buffer will not cause an unnecessary redraw.
  • the absence of these unnecessary redraws removes the requirement for continual updates of all windows whenever the contents of one is altered.
  • the IBM 3274 controller, a supervisor application or the PC writes character code into presentation space 38 at locations designated by that presentation space's cursor value control block. No other updates are required. the new character will be displayed or not according to whether it falls within the window designated by the corresponding window control block 34 and the portion of that window designated for display by the screen matrix 40.
  • a window control block is established for the PC the same as any other window control block 34 including width, height, presentation space origin, and screen origin.
  • the screen matrix 40 is updated, and data from the window in the PC buffer defined by the window control block 34 will, to the extent allowed by the screen matrix 40, appear on the CRT screen.
  • Data within a window may be scrolled by decrementing or incrementing the X or Y value of the window origin. No other control updates are needed. Only the corresponding window in the screen buffer is rewritten or, if a PC window, the offset register is changed. A window can be relocated on the screen by changing the origin coordinates in the window control block 34 for that window.
  • the screen matrix 40 is updated, and the entire non-PC screen buffer is rewritten with data for non-PC tasks and codes (hexadecimal FF) for the PC.
  • the window control block 34 for that presentation space 38 is first updated by altering the width and/or height.
  • the screen matrix 40 is updated by over-writing window designator codes of the matrix, starting with the lowest priority window control block. Then, all windows to non-PC refresh buffer 12 are rewritten with data from the presentation space for the non-PC windows and the hexadecimal code FF for the PC window.
  • Figure 8 illustrates the general shape of the process for window updating.
  • the presentation space (PS) row is set to the first PS row needing update;
  • the screen row is set to the row on the display screen of the PS row;
  • the PS column is set to the first PS column needing update;
  • the screen column is set to the column on the screen of the PS column;
  • the number of rows is set to the number of PS rows to be updated;
  • the number of columns is set to the number of PS columns to be updated.
  • the procedure which follows is done for the number of rows to be updated.
  • the matrix 40 is checked to determine if the screen row and column is within the window to be updated. This is indicated by the decision block 44.
  • Figure 9 illustrates the general shape of the process for building the screen matrix 40.
  • the window is set to the bottom window as indicated in block 54.
  • the procedure indicated within block 58 is followed, and this procedure includes the procedure indicated within block 60 for the number of window columns.
  • the matrix row and column is set to the window identification as indicated in block 62.
  • the column is incremented as indicated by block 64.
  • the column is set to the first window column on the screen as indicated by block 66.
  • the row is incremented as indicated by block 68.
  • the window is incremented to the next window as indicated by block 70.
  • the function which draws the multiple window display is driven by any one of the following:
  • Application programs may cause the draw function to occur for cases 3 and 4 above by using the following functional calls:

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Digital Computer Display Output (AREA)
EP19840111872 1983-10-17 1984-10-04 Système d'affichage à fenêtres multiples Expired EP0147542B1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US542376 1983-10-17
US06/542,376 US4651146A (en) 1983-10-17 1983-10-17 Display of multiple data windows in a multi-tasking system
US06/542,572 US4653020A (en) 1983-10-17 1983-10-17 Display of multiple data windows in a multi-tasking system
US542572 1995-10-13

Publications (3)

Publication Number Publication Date
EP0147542A2 true EP0147542A2 (fr) 1985-07-10
EP0147542A3 EP0147542A3 (en) 1989-07-26
EP0147542B1 EP0147542B1 (fr) 1991-10-02

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EP19840111872 Expired EP0147542B1 (fr) 1983-10-17 1984-10-04 Système d'affichage à fenêtres multiples

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EP (1) EP0147542B1 (fr)
DE (1) DE3485132D1 (fr)
HK (1) HK88192A (fr)
SG (1) SG93192G (fr)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2179227A (en) * 1985-08-01 1987-02-25 Cadtrak Corp Graphics display system
EP0212563A2 (fr) * 1985-08-14 1987-03-04 Hitachi, Ltd. Méthode de commande d'affichage pour un système à plusieurs fenêtres
EP0223383A2 (fr) * 1985-10-04 1987-05-27 Tektronix, Inc. Dispositif d'affichage à fenêtres de processus multiples
EP0261463A2 (fr) * 1986-09-24 1988-03-30 Hitachi, Ltd. Dispositif de commande d'affichage
EP0280582A2 (fr) * 1987-02-27 1988-08-31 Axiom Innovation Limited Systèmes graphiques à ordinateur
US4845644A (en) * 1986-06-16 1989-07-04 International Business Machines Corporation Data display system
GB2215956A (en) * 1988-03-23 1989-09-27 Benchmark Technologies Arbitrary shape clipper
US4890257A (en) * 1986-06-16 1989-12-26 International Business Machines Corporation Multiple window display system having indirectly addressable windows arranged in an ordered list
GB2226938A (en) * 1986-06-04 1990-07-11 Apple Computer Video display apparatus
GB2228164A (en) * 1989-02-08 1990-08-15 Sun Microsystems Inc Hardware implementation for providing raster offsets in a graphics subsystem with windowing
KR980700632A (ko) * 1995-09-27 1998-03-30 로버트 에프. 도너후 메모리 매핑용 회로, 시스템 및 방법과 이를 사용하는 디스플레이 제어 시스템 (circuits, systems and methoos for memory mapping and display control systems using the same)
US7463307B2 (en) 2004-04-02 2008-12-09 Mstar Semiconductor, Inc. Display controlling device capable of displaying multi-windows and related method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4197590A (en) * 1976-01-19 1980-04-08 Nugraphics, Inc. Method for dynamically viewing image elements stored in a random access memory array
EP0055167A1 (fr) * 1980-12-12 1982-06-30 TEXAS INSTRUMENTS FRANCE Société dite: Procédé et dispositif pour la visualisation de messages sur un dispositif d'affichage à trame balayée tel qu'un écran d'un tube à rayons cathodiques par utilisation d'un ensemble mémoire composite
EP0099989A2 (fr) * 1982-06-28 1984-02-08 Kabushiki Kaisha Toshiba Dispositif de commande d'affichage d'une image
US4649377A (en) * 1983-05-24 1987-03-10 Hitachi, Ltd. Split image display control unit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4197590A (en) * 1976-01-19 1980-04-08 Nugraphics, Inc. Method for dynamically viewing image elements stored in a random access memory array
US4197590B1 (fr) * 1976-01-19 1990-05-08 Cadtrak Corp
EP0055167A1 (fr) * 1980-12-12 1982-06-30 TEXAS INSTRUMENTS FRANCE Société dite: Procédé et dispositif pour la visualisation de messages sur un dispositif d'affichage à trame balayée tel qu'un écran d'un tube à rayons cathodiques par utilisation d'un ensemble mémoire composite
EP0099989A2 (fr) * 1982-06-28 1984-02-08 Kabushiki Kaisha Toshiba Dispositif de commande d'affichage d'une image
US4649377A (en) * 1983-05-24 1987-03-10 Hitachi, Ltd. Split image display control unit

Cited By (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2179227B (en) * 1985-08-01 1989-07-26 Cadtrak Corp Graphics display system with arbitrary overlapping viewports
US4812834A (en) * 1985-08-01 1989-03-14 Cadtrak Corporation Graphics display system with arbitrary overlapping viewports
GB2179227A (en) * 1985-08-01 1987-02-25 Cadtrak Corp Graphics display system
EP0212563A2 (fr) * 1985-08-14 1987-03-04 Hitachi, Ltd. Méthode de commande d'affichage pour un système à plusieurs fenêtres
EP0212563A3 (en) * 1985-08-14 1989-10-11 Hitachi, Ltd. Display control method for multi-window system
EP0223383A2 (fr) * 1985-10-04 1987-05-27 Tektronix, Inc. Dispositif d'affichage à fenêtres de processus multiples
EP0223383A3 (en) * 1985-10-04 1989-02-08 Tektronix, Inc. Multiple process, windowed display system
GB2226938B (en) * 1986-06-04 1991-05-08 Apple Computer Video display apparatus
GB2226938A (en) * 1986-06-04 1990-07-11 Apple Computer Video display apparatus
US4890257A (en) * 1986-06-16 1989-12-26 International Business Machines Corporation Multiple window display system having indirectly addressable windows arranged in an ordered list
US4845644A (en) * 1986-06-16 1989-07-04 International Business Machines Corporation Data display system
US5129055A (en) * 1986-09-24 1992-07-07 Hitachi, Ltd. Display control apparatus including a window display priority designation arrangement
EP0261463A3 (fr) * 1986-09-24 1991-01-23 Hitachi, Ltd. Dispositif de commande d'affichage
EP0261463A2 (fr) * 1986-09-24 1988-03-30 Hitachi, Ltd. Dispositif de commande d'affichage
GB2202115A (en) * 1987-02-27 1988-09-14 Caplin Cybernetics Planes of image memory have respective viewport controllers
GB2202115B (en) * 1987-02-27 1991-09-25 Caplin Cybernetics Improvements in computer graphics systems
EP0280582A3 (en) * 1987-02-27 1990-07-04 Caplin Cybernetics Corporation Ltd. Improvements in computer graphics systems
EP0280582A2 (fr) * 1987-02-27 1988-08-31 Axiom Innovation Limited Systèmes graphiques à ordinateur
GB2215956A (en) * 1988-03-23 1989-09-27 Benchmark Technologies Arbitrary shape clipper
GB2228164A (en) * 1989-02-08 1990-08-15 Sun Microsystems Inc Hardware implementation for providing raster offsets in a graphics subsystem with windowing
GB2228164B (en) * 1989-02-08 1993-11-17 Sun Microsystems Inc Hardware implementation for providing raster offsets in a graphics subsystem with windowing
KR980700632A (ko) * 1995-09-27 1998-03-30 로버트 에프. 도너후 메모리 매핑용 회로, 시스템 및 방법과 이를 사용하는 디스플레이 제어 시스템 (circuits, systems and methoos for memory mapping and display control systems using the same)
US7463307B2 (en) 2004-04-02 2008-12-09 Mstar Semiconductor, Inc. Display controlling device capable of displaying multi-windows and related method

Also Published As

Publication number Publication date
EP0147542B1 (fr) 1991-10-02
HK88192A (en) 1992-11-20
SG93192G (en) 1992-12-04
EP0147542A3 (en) 1989-07-26
DE3485132D1 (de) 1991-11-07

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